faculty of computing and...
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’ l'lFllTllBlFI UI'IIVERSITY
OF SCIENCE HUD TECHNOLOGY
Faculty of Computing and Informatics
Department of Computer Science
13 Storrh Street T: +264 61 207 2258
Private Bag 13388 F: 42641 61207 9258
Windhoek E: [email protected] W: www.nust,na
FACULTY OF COMPUTING AND INFORMATICS
DEPARTMENT OF COMPUTER SCIENCE
QUALIFICATION: Bachelor of (Computer Science, Informatics & Cyber Security)
QUALIFICATION CODE: 07BACS,07BAIF,07BCCS LEVEL: 5
COURSE: Computer Organisation and Architecture COURSE CODE: COA51 IS
DATE: JUNE 2017 SESSION: THEORY
DURATION: 2 Hours MARKS: 100
FIRST OPPORTUNITY EXAMINATION PAPER
EXAMINER(S): MR. JULIUS SILAA
MS. ALBERTINA SHILONGO
MR. JEREMIAH LUMBASI
MR. PINTO BAULETH
MS. EUNICE MBASUVA
MODERATOR: DR. FUNGAI BHUNU SHAVA
THIS PAPER CONSISTS OF 5 PAGES
(INCLUDING THIS FRONT PAGE)
INSTRUCTIONS
PWNT‘working.
Page 1 of 5
Answer all questions in the answer sheet provided.
Ensure that your writing is legible, neat and presentable.
No notes or any other additional material may be used in this examination.
Calculators may be used, but remember to show step by step process of your
SECTION A [10 MARKS]: Answer All Questions. Each Question Weighs 1 Mark.
1. RAM must be provided with a constant power supply. [True/False]
2. The prefetch buffer is a memory cache located on the RAM chip. [True/False]
3. l/O channels are commonly seen on microcomputers, whereas l/O controllers
are used on mainframes. [True/False]
4. An interrupt is a hardware-generated signal to the processor. [True/False]
5. In any number, the rightmost digit is referred to as the most significant digit.
[True/False]
6. Microprogramming eases the task of designing and implementing the control
and provides support for the family concept [True/False]
7. Cache memory is a much faster memory than the register file. [True/False]
8. ARM architecture has yet to implement superscalar techniques in the
instruction pipeline. [True/False]
9. Overflow can only occur if there is a carry. [True/False]
10. In the absence of parentheses, the AND operation takes precedenceover the OR operation. [True/False]
SECTION B [10 MARKS]: Answer All Questions. Each Question Weighs 1 Mark.
1. A bus that connects major computer components (processor, memory, |/O) is
called a
A. System bus B. Address bus
C. Data bus D. Control bus
Page 2 of 5
2. The exchanges data with the processor synchronized to an external
clock signal and running at the full speed of the processor/memory bus without
imposing wait states.
A. DDR—DRAM B. SDRAM
C. CDRAM D. none of the above
3. Which properties do all semiconductor memory cells share?
A. They exhibit two stable states which can be used to represent binary ’l and O
B. They are capable of being written into to set the state
C. They are capable of being read to sense the state
D. All of the above
4. The l/O function includes a requirement to coordinate the flow of traffic
between internal resources and external devices.
A. Cycle B. Status reporting
C. control and timing D. Data
5. Binary 0101 is hexadecimal
A. O B. 5
C. A D. 10
6. In representation the rule for forming the negation of an integer is to
Invert the sign bit.
A. Ones complement B. Twos complement
C. Biased D. Sign-magnitude
7. The operand yields true if either or both of its operands are true.
A. NOT B. AND
C. NAND D. OR
8. Instead of the first instruction producing a value that the second instruction uses,
with the second instruction destroys a value that the first instruction
uses.
A. ln-order issue B. Resource conflict
C. Anti-dependency D. Out-of—order completion
Page 3 of 5
9. A is a dispatchable unit of work within a process that includes a
processor context and its own data area for a stack.
A. Process B. Process switch
C. Thread D. Thread switch
10. Instructions operate on the bits of a word as bits rather than as
numbers, providing capabilities for processing any other type of data the user
may wish to employ.
A. Logic B. Arithmetic
C. Memory D. Test
SECTION C [80 MARKS]: Answer All Questions.
Question 1
(a) List and explain any two computer architectural attributes. [4 Marks]
(b) Provide any two reasons why you think it is important for the computer
programmer to study computer organisation and architecture. [4 Marks]
(c) List and explain any three types of HO commands that an l/O module may
receive when it is addressed by a processor. [6 Marks]
(d) Explain the meaning of bus arbitration. [2 Marks]
Question 2
(a) Which are the three levels of memory provided in a digital computer? [3 Marks]
(b) Registers are fast stand—alone storage locations that hold data temporarily
in CPU. List any three types of registers and explain their functions. [6 Marks]
(0) A computer has 512MB of memory. Each word in this computer is 32bytes.
How many bits are needed to address any single word in memory? [6 Marks]
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(d) Penda’s Grandpa is 69 years old. His Grandma is 12 years younger than his
Grandpa. Show using a step by step binary arithmetic approach how Penda's
laptop would compute his Grandma’s age. [10 Marks]
Question 3
(a) What is an OS Kernel? [2 Marks]
(b) There are different types of operating systems. Their use depends on the type of
computer and the type of applications that will be run on those computers.
Distinguish between the Batch 08 and Interactive OS. [4 Marks]
(0) List and explain the 2 main objectives of an operating system. [4 Marks]
(e) List and briefly explain any five services of the operating system [10 Marks]
Question 4
(a) What is Instruction pipelining? [2 Marks]
(b) Show diagrammatically how instruction pipelining can be implemented [6 Marks]
(c) Briefly describe your diagram. Demonstrate especially how instruction
number, pipeline stage and clock cycle are related. [4 Marks]
(d) Differentiate between the structure of a CISC processor and a RISC processor.
[4 Marks](e) Briefly explain what you understand by Internet of Things (loT). [3 Marks]
*****END OF PAPER*****
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