external memory & i/o

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E X T E R N A L C O M M U N I C AT I O N S

D E S I G N I N G A N E X T E R N A L 3 B Y T E I N T E R FA C E

Mark Neil - Microprocessor Course

External Memory & I/O


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You already have an external 1 Byte memory

CP (Write Data)

Byte coming in

(PORTA)

Byte Stored(PORTE)

Output Enable* (Read Data)

* = INVERTED

Control lines(PORTD)

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Computer Bus


The processor within a computer communicates with the other computer modules via a device called: Bus.

Many different Bus architectures exist in the market such as PCI; cPCI; VME….

All bus architectures include a control bus, a data bus and an address bus.

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The BUS of a computer:


Address Lines

Data Lines

Control Lines

Bus Master(CPU/Controller)

Bus Slave(e.g. Memory)

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Typical Write Sequence


The bus master places the address of the memory where the datum is to be written on the bus and validates it using the control lines.

The master signals using the control lines that this is a write sequence.

The master places the datum to be written onto the bus and validates it using the control lines.

Each slave compares the address on the bus with its own address. If the write refers to it, it takes the data and signals (acknowledges) using the control lines that this has been done.

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Typical Read Sequence


The master places the address of the memory from where the datum is to be read on the bus and validates it using the control lines.

The master signals using the control lines that this is a read sequence.

The master signals that it is ready to accept the datum using the control lines.

The slave compares the address on the bus with its own address. If the read refers to it, it places the datum on the bus and validates it using the control lines (acknowledges the data). At the end the Master latches the datum.

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Parallel Transfer


In a bus all bits of a byte or word are transferred simultaneously.

If we have a byte wide bus and a transfer frequency of 1MHz then we have a bus speed of 1Mbytes/sec

Hence, this is called Parallel Data Transfer (opposed to Serial Data Transfer that we will learn next)

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Interface to External SRAM


Bus is implemented by using two of the ports!

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Electronics Exercise


We will now make a 3 Byte interface that you can use for external read and write from/to the ATmega128 board.

This is a challenging exercise and will take some time to construct and test

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High Level Design :3 Byte Memory


We want to construct :

ATmega103Board

8-Bits of data_in

8-Bits of data_out

PORTA (Output)

PORTE (Input)

PORTD (Output Only) AS, READWRITE, A0,A1

Control andAddress

bus1-Byte

Memory

1-ByteMemory

Data Bus Out

Data Bus In

1-ByteMemory

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The data sheet for the 74F138


You will need to select which memory chip to write to using a binary address

You will convert the 2 bits of “Address” into 3 lines which can be used to control the Enable lines for the three memory chips

To do this use an address decoder

The 74F138 converts a 3 bit address into 8 control output lines When a given 3 bit number is

written on the Address lines one of the 8 output lines is set high

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The 74F138 truth table


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Memory Design

Data to write to the memory is placed on PORTA and this is wired to the memory Data Bus

The data is read from the memories into PORTE from the output Data Bus

The control lines for all this are sent on PORTD


PORTEPORTA

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Control BusWe need to set four signals to control the memories

A0:A1 – The Address Bits. These are used to define which memory chip will be addressed (00,01,10)

AS* – The address strobe to select the memory

R*/W to Read/Write the selected memory\

We will use bits on PORTD to control these signals – you chose which bits are attached to which control line


15Mark Neil - Microprocessor Course

Control Signals

AS,A1,A0R/W

On PORTD

Input Data (D0-D7) Bus – from PORTA

Output Data Bus (O0-O7) on PORTE

Basic Circuit

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Logic Gates


You will also use some basic logic gates in your circuit to build the control bus 74HC04 Hex Not 74HC08 Quad And 74HC32 Quad OR

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Logic Table for Control BusTo read a memory,

o Address it on A0/A1

o set AS* to 0

o set R*W to 0

To Write a memory,

o Address it on A0/A1

o Set AS* to 0

o Change R*W from 0 to 1

Make sure you understand the Logic table and how it is implemented using the logic gates

AS*

R*W

A1

A0

O0*

O1*

R0*

W0

R1*

W1

Function

0 0 0 0 0 1 0 0 1 0 Read Memory 0 (OE*)

0 1 0 0 0 1 1 1 1 0 Write Memory 0 (CP)

1 0 0 0 1 1 1 0 1 0

1 1 0 0 1 1 1 0 1 0

0 0 0 1 1 0 1 0 0 0 Read Memory 1 (OE*)

0 1 0 1 1 0 1 0 1 1 Write Memory 1 (CP)

1 0 0 1 1 1 1 0 1 0

1 1 0 1 1 1 1 0 1 0


Exercise: Fill in the Table for Read2*/Write2

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Sequence Diagram:


Unneccessary - need another D-Flip-Flop to remove

Unneccessary - need another D-Flip-Flop to remove

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The Memory Test Program


Start

Set data pattern onPORTA

Clock in memory 1



Clock in memory 2

Clock in memory 3

Enable memory 1 output



Copy PINE to PORTB LEDs



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Task Plan:


Construct the 3 byte memory and connect it to your ATmage128 Board

Always connect to the ports through the special cable-resistor-pack units

Proceed in steps: First the Control Bus, test it and verify that it works! Next add the first memory byte and test it Add the second memory and test it Add the third memory and test it

Write programs as you go along with the aid of a top-down-modular diagram

Use a main section Use driver subroutines that read, write, and loop data through

your memory bytes.

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Some Comments:


Make a detailed schematic of your device with all ICs (logic diagrams) and the IC pin assignments.

Make sure that you understand your design BEFORE you start building it.

Build the device in pieces which you can check using your software. Don’t build the entire design before testing. Follow the steps – don’t leap ahead and build too much

before checking that everything works at each step.Use the oscilloscope and the DVM to check what

is going on and debug your device.

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How to Draw Schematics:


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Step 1: The control bus Address lines


Start by setting the Address Strobe* high

Set the correct address on your bus.

Now lower the AS* and check that the appropriate output bits are selected for the address of each memory

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The control bus Read/Write


Add the Read/Write control logic First build Read0*/Write0

Set AS* high and R*/W high. Set the address on your bus Lower R*W and AS*

This is a read memory setting Check that Read0*/Write0 are what

you expect Bring *R/W High for 250 nsec and

then back Low This is a write memory Use a scope to verify the timing

Complete the Read1*/Write1 and Read2*/Write2 circuits Test that they are working as expected

when you select each of the memory addresses.

you are ready to add a memory Don’t this before your control bus

works!

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Step 3: Adding the first memory


Connect the Data Bus (D0-D7) to the 8 bits on PORTA

Connect the OE* to the Read* and CP to the Write lines of your control bus

Using your program Set AS* high and R*/W high . Set the correct address and put some

data on your bus. Lower R*/W and AS* Bring R*/W high for 250 nsec and then

back to Low Your data should now be stored in the

selected register, and visible on the outputs

Before you connect the output together use scope/LED+Resistors to check if the data are on the outputs and correct

Connect the Output Bus to the pins on PORTE

Try reading the data with the AVR

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Step 4

Add the second Memory Chip

Verify that it is working as expected

Finally Add the third memory chip

You should now be able to write data to the memory of your choice, and verify that it is properly stored


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Here is an example…

When you build your board Think about

Where inputs arrive

Where the outputs go

Where the memory buses will be

Where the control bus will be

What color wire you will use for what function


external memory & i/o

Documents

control bus

bus speed

byte wide bus

different bus architectures

bits of address

master signals

external read

parallel data transfer