etip - competence in power · altera dsp builder blockset target hardware quartus ii vhdl synthesis...

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Energy Technology Intellectual Property &W' ďĂƐĞĚ ^ŽůƵƟŽŶ ĨŽƌ ŽŶƚƌŽů ĂŶĚ DĂŶĂŐĞŵĞŶƚ ŽĨ ^ŵĂƌƚ 'ƌŝĚ ^LJƐƚĞŵƐ E T IP Your first choice for Smart Grids The specialist in intelligent power systems www.entesys.de www.sgcms.de www.sgcms.de ®

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Page 1: ETIP - competence in power · Altera DSP Builder Blockset Target Hardware Quartus II VHDL Synthesis Veri .ca on Veri .ca on ... ETIP - Energy Technology IP ETIP - Blocksets for Development

Energy Technology Intellectual Property

ETIPYour first choice for Smart Grids

The specialist in intelligent power systems

www.entesys.de www.sgcms.dewww.sgcms.de

®

Page 2: ETIP - competence in power · Altera DSP Builder Blockset Target Hardware Quartus II VHDL Synthesis Veri .ca on Veri .ca on ... ETIP - Energy Technology IP ETIP - Blocksets for Development

-

Target orientedAbstrac on Simula on

Valida on

System Speci ca on

PhenomenologicalDescrip on

Math. Model(Matlab/Simulink)

Altera DSP BuilderBlockset

Quartus IITarget Hardware

VHDL Synthesis

Veri ca on Veri ca on

Veri ca onVeri ca on

Problem Statement

FPGA Pla orm Target hardware oriented Modeling

Veri

caon

Design FlowETIP

ETIP

By the use of renewable energies and the decentralization of electricity generators a dramatical change in electrical energy grids is taking place. This leads to a new supply system layout covered under the transition goal called Smart Grids. In Smart Grids new system requirements for automation, communication and power quality are provi-ded and have to be fulfilled. The major challenge is to establish a dynamic control function like primary and secondary controller of conventional power plants and grids from the TSO level into the low and medium voltage grid level (DSO level). These kinds of functionalities must be implemented into the power electronic inverters and into the control function of decentralized synchronous generators as well. Additionally, the automation system for the DSO level has to be adapted to these new require-ments. The substation automation must be fitted into these new grid control functionalities. Therefore the demand for new Smart Grid orientated solutions which are flexible, adaptive, sustainable and cost effective are obvious.

EnTeSys develops and offers innovative technologies to advance the integration of distributed, renewable power supply systems. The focus is on how these decentralized systems can coexist with conventional power plants. EnTeSys developed a strategy to fulfill the complex requi-rements which electric energy supply systems of the future will have.

As a specialist for intelligent software solutions for smart grids, EnTeSys develops FPGA-based IP Cores for power system components. These Energy Technology IP Block-sets ETIP offer a platform for simple, fast and flexible FPGA based development for electronic devices in Smart System applications. The modular ETIP Blocksets are consequently designed related to the requirements of Smart Grids. ETIP Blocksets cover the different types of feeding modes and grid code from the TSO and DSO side. In terms of communication IP Cores for standard ITC technologies via Ethernet and fieldbuses are available (TCP/IP, EtherCAT, etc.). The ETIP Blocksets philosophy offers a wide range of application fields in Smart Grid devices. Starting from power electronic inverters, substati-on automation systems up to a direct PLC integration. The ETIP Blocksets cover all basic and major Smart Grid control and automation functionalities. The figure below shows in principle the wide application range of ETIP -based systems graphically.

Basic Blockset

Basic funtions for power electronics inverters (symmetrical)Feeding modes for interconnected and isolated Grids Advanced Blockset

Advanced functions for power electronics inverters (unsymmetrical)Feeding modes for interconnected and isolated Grids (unsymmetrical)Grid Code Blockset

Grid Code / Fault Right Though Functions for grid tied invertersPower Quality Blockset

Power Quality Measurement DIN EN standards. Methods for Voltage quality measurement according to EN standards and more.

Development benefits

• System optimization in early development state• High development quality and transparency in TQM• High time and cost effectivity related to complexity of Smart Grid functions• Reduction of the development risk in regard of the complexity of the target application• Reduction of development effort via automatic code generation

Distribution GridIntelligent Substation Prosumer (Producer & Consumer)

50 kW

SGAU

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ETIP - Model based Design Flow

Introduction

EnTeSys – Mission and Vision

ETIP - Energy Technology IP

ETIP - Blocksets for Development of FPGA-based Smart Grid Systems

Lf

Inverter

=3 ~

Local Grid

FPGA-based Control Platform

ETIP Collection

Basic Blockset Advanced Blockset

Power Quality BlocksetGrid Code Blockset

The specialist in intelligent power systems

www.entesys.de www.sgcms.dewww.sgcms.de

Page 3: ETIP - competence in power · Altera DSP Builder Blockset Target Hardware Quartus II VHDL Synthesis Veri .ca on Veri .ca on ... ETIP - Energy Technology IP ETIP - Blocksets for Development

ETIP - Smart Grid Inverter Starter Kit

The developed ETIP Blocksets can be used to run the Smart Grid Inverter Starter Kit in combination with the FPGA development Platform SnakeBytes from the company devboards GmbH. This combination of Hardware and ETIP Software components gives a fast entry into inverter technology for present and future requirements.

ETIP – Smart Grid Inverter • Modul-Power: up to 25 kVA• DC-Voltage: max 800 V (intermediate circuit) • AC-Voltage: 3 * 400 V • Current / Phase max 36 A • 3Leg-4Wire Topology• 2 Level Inverter

• JTAG-Interface• Clock distribution• 7 DBF-Slots for I/O and memory expansion• PCI-Interface for 32bit / 66MHz PCI• Dimension: 170x106mm²• Tyco industrial power connector

• EP3C120F780C7N ALTERA FPGA• EPCS64 configuration device• 4 power supplies for 1.2V core voltage, 2.5V and 3.3V I/O voltage• custom specific voltage• 7 I/O-Bank regulators for VCCIO• 4 LEDs and 4 buttons

Including power electronic and programmable FPGA-based controller-board

ETIP - Smart Grid Inverter FPGA Development Platform based on devboards SnakeByteThe DBF3C120 is the second baseboard of a flexible development board family based on the Altera FPGAs. The baseboard is equipped with all the necessary functions to run the FPGA like power supply, clocking, reset generation and configuration device. All the I/O pins are connected to DBF-Slots. The DBF3C120 board is equipped with 7 DBF-Slots and a PCI-Interface.

ADD ON-Cards

12V I/O

FalconEye signal interface

SDRAM

3xEthernet Phy connector

SnakeByte DBF3C120 from devboards GmbH

Measurement signals

SnakeByte DBF3C120 from devboards GmbH

SDSDSDSDDSDDDDSDDSDDDSDSDDDSDSSDSSDSSDSDSDSDSDSDSDDDSDSDDDSDDDSSDSDSSDSDSSDSSSDSDSDSDSDDSDSDDSDSDSDSDDDDDSSDSSSSDSDSSSDSDSSDSDDDDSDDSDSDSDDDDDSDSDSDSDSSDSSSSSSDSDDSDDDSDDDSDSDDDSSSSDSDSSSDDDDDSDDSDSDSSDSSDSSSSSSDSDSSDDDDDDDDDSSSDSSSDSSSDDSDDDSDDSSSSSSDDSDDDDSDSSSDSSSDDSDDDDSSSSSDSSDSDSDSDDSSSSDSSSSSDSDDDDSDSSSSSDSDDSSDSDSDSSDDDDSDSDDSSSSSSDDDSSSSSSDSSDDDDSSSSDSSSDDSDSSSSSDDDDDDDDDSSSSSSDDSSDDDDDDSSSSDDSSSDSDSDSSSSSDDSSSDDDSSDDSSSDDDSS RARRARRARARARARAAARARARARARRRRARRRRRARRRRRRRARARRARRRARARRRRARARAAARARARARARARAAARRRARARARRARRARRRARARARARARAAAAARARARARARARAARAAARARAAARRARRRRARRARARARAARAARARARAARARAAARAAAARARRARARARARRRRRRARARAAARAAARARARARARRRRRARRRARARAAAARAAAARARRARRRRRRRRAAARARAAARRRRRRRARRAAARAARRARRRRRRRRAAARAAAAARARRRRRARRRAARAARARRARRRRRRRRAARAAAARAAARRRRARRRRRRAAAARARARRARAAAARRARAARAARARRAAAAARAAAARRRRRRAARARRRRRRRRAAARAAAAARRRRRRRARRRAAARARRRRRARAARARAAARRRRRRARRARRAAARARAARRRRRRARRAAAAARRRRARRRRRRAAAARRRRRAAAAAAARRRRAARRAAAARRAAAAAMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM

g

SDRAM

FPGA Developement Platform

ure requirements.

Tough 19“ rack design

Easy and fast to connect

using HARTING Industrial Connector Han®

Photos can differ from the original

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communication

3x3xEtE hernnetet PPPhyhyhy cconononnenecto

coococ mmmmmmunnununiicicicic tatatatatiioioioionnnEtherCAT® is registered trademark and patented technology, licensed by Beckhoff Automation GmbH, Germany.

The specialist in intelligent power systems

www.entesys.de www.sgcms.de www.entesys.de

Page 4: ETIP - competence in power · Altera DSP Builder Blockset Target Hardware Quartus II VHDL Synthesis Veri .ca on Veri .ca on ... ETIP - Energy Technology IP ETIP - Blocksets for Development

Lf

Smart Grid Inverter Starter Kit SGISK2510a

=3 ~

Grid

FPGA-based Control Platform (EtherCAT® Slave)

IEC61131-based Automation Platform (EtherCAT® Master)

Other Actors and Sensors (EtherCAT® Slave‘s)

Ci

Cf

®

Fast integration in Automation SystemsFurther, this scalable power electronics with the real-time communication EtherCAT can be used in conjunction with a standard IEC61131-PLC. Thus, in addition there is the possibility to involve all the advantages of industrial automation components in the plant management. This provides the most flexible inverter platform which can be adapted to complex and unusual tasks.

ETIP - Smart Grid Inverter Starter Kit - 2 level inverter consisting of a 3Leg-4Wire topology

System Parameter • Bidirectional Inverter• Modul-Power: up to 25 kVA• DC-Voltage: max 800 V (intermediate circuit) • AC-Voltage: 400 VLL • Current / Phase up to 36 A The 3Leg-4Wire topology supports unsymmetrical load situations.

The two level inverter has a very low THD.

The specialist in intelligent power systems

www.entesys.de www.sgcms.dewww.sgcms.de

Page 5: ETIP - competence in power · Altera DSP Builder Blockset Target Hardware Quartus II VHDL Synthesis Veri .ca on Veri .ca on ... ETIP - Energy Technology IP ETIP - Blocksets for Development

The specialist in intelligent power systems

www.entesys.de www.sgcms.dewww.sgcms.de

The developed ETIP Cores (Energy Technology Intellectual Property) represent control functions blocksets for power electronic converter, inverter based on FPGA. The Cores provi-de the possibility to control one or three phase inverters in each feeding mode.

Basic Blocks:

PI-Controller, Sin/Cos Generator, Pulse Width Modulator

Transformation Blocks:

Clarke & Park transformation, band pass, symmetrical components, etc.

Space Vector Modulator (SVM) Blocks:

SVM for several one and three phase inverter topologies

Phase Locked Loop (PLL) Blocks:

PLLs for one and three phase signals

Inverter Control Blocks:

Control algorithms for different feeding modes and different inverter topologies

EN 61000-4-30, 2009 - Method for voltage quality measurement. Testing and measurement techniques - Power quality measurement methods.EN 61000-4-7, 2011 - Testing and measurement techniques - General guide on harmonics and interharmo-nics measurements and instrumentation , for power supply systems and equipment connected thereto.EN 61000-4-15, 2011 - Testing and measurement techniques - Flickermeter - Functional and design specifi-cations.

Voltage

0t

10 min

t 10 Periods

t 10 min Interval

t 10 Periods t 10 Periods

t 10 Periods t 10 Periods

ETIP - Grid Code Blockset

Voltage and Current Measurement:

RMS values over different periods (10 periods, 150 periods, 10 min, 2h) Indication by voltage deviation (voltage drops, gaps or over voltage).

Power Measurement:

Measurement of active, reactive and apparent power over 10 periods Measurement of power factor cos( ).

FFT Analysis:

Harmonics, THD, intermediate harmonics over 10 periods

Flicker:

Short time and long-time flicker, flicker level

Asymmetry:

Asymmetry of a three phase system

ETIP Power Quality Blockset

/ MATLAB® Simulink®

ETIP Basic and Advanced Blockset

10.9

0.7

0.3

3.0001.500150 7000

Disconnecting from Grid

t [ms]

Boundary Line 1 Boundary Line 2

V_pu

Dynamic Grid Support: Fault Ride Through

Supply of reactive current during voltage deviation

Inverter Feeding Modes at Grid Side

Grid Parallel

Symmetrical Asymmetrical Symmetrical Asymmetrical Symmetrical Asymmetrical

Grid Forming Grid S

ECS Driven Feeding Grid Driven Feeding

Based on:

[Department of Electrical Power Supply, University of Applied Science Soest]

[The BDEW guideline “Generating Plants in the Medium-Voltage Grid"]

III

III IV

0.48

-0.48

1.0 P/Pr

Q/Pr

-1.0-0.2

underexcited underexcited

overexcitedoverexcited

[VDE-AR-N 4105:2011-08]

[VDN TransmissionCode 2007]

Active power reduction

fgridP

50.2 Hz

P = 40% PM per Hz

50.05 Hz

10%

20%

Page 6: ETIP - competence in power · Altera DSP Builder Blockset Target Hardware Quartus II VHDL Synthesis Veri .ca on Veri .ca on ... ETIP - Energy Technology IP ETIP - Blocksets for Development

-

-

The specialist in intelligent power systems

www.entesys.de www.sgcms.de www.entesys.de

1 Freque c _ easure e 5 Vol a e_As e r

2 Overvol a e_Drop_Gap 6 Har o c_ easure e

3 Vol a e_Curre _ easure e 7 Power_ easure e

4 Fl cker

ETIP Power Quality Blockset

EnTeSys GmbHUlricherstr. 26-2859494 Soest, Germany

Telefon: +49 (0) 29 21 / 35 49 39 1Telefax: +49 (0) 29 21 / 35 49 39 19

E-Mail: [email protected]: www.entesys.de

Managing Director: Dipl.-Ing. (FH) Stephan Heger

Register Court: Amtsgericht ArnsbergCompany Registration Number: HRB 9462

© 2013 MathWorks, Inc.MATLAB® and Simulink® are registered trademarks of MathWorks, Inc. See www.mathworks.com/trademarks for a list of additional trademarks. Other product or brand names may be trademarks or registered trademarks of their respective holders.

MATLAB®, the language of technical computing, is a programming environ-ment for algorithm development, data analysis, visualization, and numeric computation. Simulink is a graphical environment for simulation and Model-Based Design for multidomain dynamic and embedded systems.

© 1995-2013 Altera Corporation. All Rights Reserved. The DSP Builder library shortens DSP design cycles by helping users create the hardware representa-tion of a DSP design in an algorithm-friendly development environment. Altera Corporation - www.altera.com 101 Innovation Drive, San Jose, CA 95134, UNITED STATES Tel: 408-544-7000, Fax: 408-544-6424, E-mail: [email protected]

MATLAB® Simulink® BlocksetsETIP1 Nor al za o _1_S al 9 PI_Co roller

2 Nor al za o _3_S al 10 UI_ o_PQ

3 UVW_ o_AlphaBe a 11 PLL_1Phase

4 AlphaBe a_ o_dq 12 PLL_3Phase

5 dq_ o_AlphaBe a 13 SV _FB

6 AlphaBe a_ o_Uac _s 14 SV _HB

7 PT1 15 SV _3L3W

8 S _Cos_Ge era or 16 PW (as VHDL)

ETIP Basic Blockset

1 Faul _R de_Throu h 4 Pac _Qse

2 S a c_Gr d_Suppor 5 cosPh _se

3 Reac ve_Curre

ETIP Grid Code Blockset

1 UVW_ o_AlphaBe a_LL 6 SV _3L4W

2 UV_ o_AlphaBe a_LL 7 SV _4L4W

3 UV_ o_AlphaBe a 8 S _Co p

4 U_ o_AlphaBe a 9 PLL_DDSRF_3Phase

5 U_ o_AlphaBe a_50Hz

ETIP Advanced Blockset

Through a close cooperation with the department of Electrical Power Supply of the University of Applied Science Soest, we have a competent partner with many years of experience to the side for the development of technical innovations.