esa contract: no. 18409/04/nl/agemits.sso.esa.int/emits-doc/ref8_annex1&ref3_sow.pdf · esa...

October 3rd, 2005 DAD/DDD Channel Simulator of 44

Version

ESA Contract:

No. 18409/04/NL/AG

ADAPTIVE CODING AND MODULATION MODEM FOR

BROADBAND COMMUNICATIONS

Demonstrator Architectural Design & Detailed

Design Document(DAD/DDD)

Part 6:

DAD/DDD Channel Simulator

Version 1.0, October 3rd, 2005

Authors Ernst Eberlein

Contributions from Enrico Casini (ESA)

Alberto Ginesi (ESA)

Rainer Perthold (IZT)

Andreas Klose (IZT)

ACM modem algorithm design report

of 44 DAD/DDD Channel Simulator October 3rd,

2005

Version

Copyright

© Fraunhofer Institute for Integrated Circuits (Fraunhofer IIS)

The information contained in this document is proprietary to Fraunhofer IIS and

shall not be disclosed by the recipient to third parties without the written consent

of the company.

Publisher

Fraunhofer Institute for Integrated Circuits

Am Wolfsmantel 33

91058 Erlangen

Germany

Fax: ++49-(0)9131-776-6399

© 2005



Version

Table of Contents

1. INTRODUCTION............................................................................................................................................... 4

1.1 PURPOSE AND SCOPE ..................................................................................................................................... 4 1.2 ACRONYMS AND ABBREVIATIONS ................................................................................................................. 4 1.3 REFERENCES .................................................................................................................................................. 5

2. FUNCTIONAL OVERVIEW ............................................................................................................................ 6

2.1 OPERATION MODES ........................................................................................................................................ 6 2.1.1 Static configuration – Interactive mode ................................................................................................ 7 2.1.2 Time variant channel............................................................................................................................. 8

2.2 USAGE SCENARIO FOR ACM ....................................................................................................................... 10 2.3 CHANNEL SIMULATOR FUNCTIONALITY – STATIC CONFIGURATION ............................................................. 12

3. IMPLEMENTATION CONCEPT – IMPLEMENTATION CONSTRAINTS........................................... 14

4. OVERALL CSIM SUB-SYSTEM ARCHITECTURE.................................................................................. 17

5. MODULE ARCHITECTURE ......................................................................................................................... 20

5.1 ADC MODULE ............................................................................................................................................. 20 5.2 INPUT AGC.................................................................................................................................................. 20 5.3 PROPAGATION DELAY .................................................................................................................................. 21 5.4 I/Q GENERATION .......................................................................................................................................... 21 5.5 COMBINER #1 (ADD INTERFERER BEFORE NON-LINEARITY) ......................................................................... 22 5.6 NON-LINEARITY SIMULATOR ....................................................................................................................... 23 5.7 COMBINER #2 .............................................................................................................................................. 26 5.8 PHASE NOISE GENERATOR ............................................................................................................................ 28

5.8.1 Specified Phase noise profiles............................................................................................................. 28 5.8.2 Phase noise generation ....................................................................................................................... 30

5.9 THERMAL NOISE .......................................................................................................................................... 31

6. EQUIPMENT SETUP ...................................................................................................................................... 33

6.1 CONTROL PARAMETER ................................................................................................................................. 33 6.2 STATUS PARAMETER.................................................................................................................................... 37

7. ANNEX .............................................................................................................................................................. 38

7.1 INPUT SIGNAL CHARACTERISTICS................................................................................................................. 38 7.2 CHARACTERISTICS OF THE TWTA............................................................................................................... 39

7.2.1 Non-linearized TWTA, ESA data......................................................................................................... 39 7.2.2 Linearized TWTA (ESA data) .............................................................................................................. 42



2005

Version

1. INTRODUCTION

1.1 Purpose and Scope

This is the DAD/DDD of the channel simulator.

The channel simulator includes two parts

• Software module generating the fading data (DLR tool = CHMOD)

• Realtime channel simulator (CS_HW)

This document focus on the CS_HW.

Note: The channel simulator is based on an existing signal generator. The hardware and most parts of the firmware

are not subject of the ACM project. Accordingly the design is also not in the scope of the project. The design

document focuses therefore on the description of the architecture and the design of the modules which have to be

modified. This is mainly the conversion of the data provided by the channel model (CHMOD) to the internal

parameter of the channel simulator and the phase noise generation. Additional details are given for the non-linearity

simulator.

Further details on the channel simulator can be found in the user manual of the existing unit [DSG2000] and the

programming manual [CSIM_PM]. Information related to the channel model provided by DLR are given in the

document [CSIM_HLD].

The same hardware subsystem will be used for the forward link (FL) and return link (RL).

1.2 Acronyms and Abbreviations

Acronym Description

ADC Analog-to-Digital Converter

AGC Automatic Gain Control

AWGN Additive White Gaussian noise

BER Bit Error Rate

CCM Constant Coding and Modulation

CGV Channel gain values (see channel simulator)

CHMOD Channel model = DLR software tool to generate the fading data

COTS Commercial Off The Shelf

CS_CM Channel simulator – Part 1: Channel Model

CS_CTRL Channel simulator – Part 2: Control software

CS_HW Channel simulator – Part 3: Realtime channel simulator hardware

DVB Digital Video Broadcasting

DVB-RCS Digital Video Broadcasting – Return Channel via Satellite

DVB-S Digital Video Broadcasting – S (forward channel)

DVB-S2 Digital Video Broadcasting – S (forward channel – version 2 of the std)

EIRP Equivalent Isotropic Radiated Power

ESA European Space Agency

FEC Forward Error Correction

FL Forward Link

FPGA Field-Programmable Gate Array

HL High-Level

HPA High Power Amplifier

HTTP The Hypertext Transfer Protocol

IP Internet Protocol

IP (core) Intellectual Property (core)

MF-TDMA Multi Frequency TDMA

NA Not Applicable

NCO Numerical Controlled Oscillator

PCR Program Clock Reference

PDF Probability Density Function



Version

PSK Phase Shift Keying

QAM Quadrature Amplitude Modulation

QPSK Quaternary Phase Shift Keying

RL Return Link

SVMB Channel simulator board

TBC To Be Confirmed

TBD To Be Decided

TBTP Terminal Burst Time Plan

TCT Time-slot Composition table

TDM Time Division Multiplex

TDMA Time Division Multiple Access

TWTA Travelling Wave Tube Amplifier

uimsbf Unsinged integer most significant bits first

UPC Uplink Power Control

UT User Terminal

VBR Variable Bit Rate

VCM Variable Coding and Modulation

1.3 References

[SOW] ESA ITT 4474/03/NL/AG: Adaptive Coding and Modulation for broadband communications,

Statement of Work

[CSIM-HLD] Channel Simulator high level design (HLD), WP1400, Version V07

Includes also information on the propagation model provided by DLR.

[DS] DS-ACM modem demonstrator detailed specification, Ver 2.2 (March 11th

, 2005)

[CSIM-PM] Channel simulator programming Manual, Ver 1.0, August 30th

, 2005,

Document title: Adaptive Coding and Modulation Modem – Programming Manual

Author: Oliver Rommelfanger

[DSG2000] DARS Simulator DSG200 - User Manual

User manual of the signal generator used as basis for the ACM channel simulator



2005

Version

2. FUNCTIONAL OVERVIEW

2.1 Operation modes

The channel simulator will provide two operation modes.

• “Static configuration” = non-time variant channel = interactive mode

• Time variant channel = ACM simulation profile generated by DLR tool is used = ACM mode

In the interactive mode (Figure 2-1) the user selects the parameter directly use the local GUI of the CS_HW or the

remote interface. In the ACM mode (Figure 2-2) a simulation scenario is generated by the CHMOD. The CHMOD

generates a file (“time series”). The file is forwarded to the CS_HW. Most of the parameters are already included in

the The user starts or stops the simulation run.

User

Select

parameters

Figure 2-1: “Static” operation mode – The parameters are set directly by the user

User

Time series

Define

Environment,

Select channel

model paameters

Generate file

Copy file (or

provide access to

file over network)

User

Start/stop

simulation

CHMOD tool

provided by

DLR

Figure 2-2: ACM Simulation setup



Version

2.1.1 Static configuration – Interactive mode

The functionality of the static configuration is mainly described in chapter 2.3. In this mode the user can set the

parameters directly. This mode is mainly relevant for the characterisation of the subsystem using running the test

bench in CCM mode.

In this mode the user controls the signal levels and the signal-to-noise ratios directly. For the parameter setting the

local GUI or the remote control interface can be used. The functionality of this mode is summarized in the following

table

Description Comments

Input signal Analog signal

Bandwidth: up to 34MHz (sampling frequency is

80MHz)

IF signal at center frequency 20, 60, 70, 140MHz

Note: In the mode IF=70MHz the signal bandwidth

is reduced

No filtering will be applied before

the A/D converter. The input signal

must be band limited

Non-linearity simulation Memory-less non-linearity characteristics will be

supported. Different characteristics are possible

The input back-off (IBO) can be selected

The output back-off (OBO) will be measured and

can be adjusted accordingly

AWGN channel A digital wideband noise generator is included. The

noise power density N0 can be set directly or

relative to the useful signal.

Phase noise Phase noise can be applied to the signal. Noise

according to the DVB-S2 and DVB-RCS phase

noise profiles are generated internally. The phase

noise level can be adjusted.

Interferer The CSIM includes two signal generators to

generate interfering signals. The interfering signals

can be applied before the non-linearity simulation

or after non-linearity simulation. The center

frequency and the level of the interfering signal can

be selected.

Multiple carrier per

transponder

Using the build in arbitrary waveform generator a

second signal can be added to the input signal to

simulate several carriers per transponder.

The second input signal can be any

signal generated at a sampling

frequency of 80MHz. It may include

already several carriers. The signal

will be loaded to the AWG memory

and replayed in a loop.

Fading, Flat fading The signal level and the noise level can be

dynamically changed to simulate flat fading. The

profile is defined by a file containing the gain

values of an attenuator matrix.

Fading, frequency

selective fading

Not used within ACM project

Output signal L-Band, compatible to RF-tuner

The CS-HW will provide access to

the output of the D/A converter.

This output is mainly useful for

testing of the receive without RF-

tuner.

Further details of the features are given in section 2.3. For details on the parameters see

• section 6.1 Overview to the Control parameter

• [CSIM-PM]: Programming manual

For background information see user manual of the available unit for SDARS application [DSG2000]



2005

Version

2.1.2 Time variant channel

Propagation effects like rain fading, scintillation, etc. introduce a time variant signal level at the input to the

receiver. The main scope of the project is the ACM project is the test of the system with adaptive coding and

modulation with time variant channels. In this case the parameters of the time variant channel will generated by a

software tool. The software generated “time series” which will be stored in a file. The software tool will be provided

by DLR and is called “CHannel MODell” = CHMOD in this document. The time series generated by the CHMOD

tool will be converted to the internal parameter of the channel simulator and forwarded to the related building blocks

in real-time.

The overall concept is summarized in the Figure 2-3. The channel model (CHMOD) provides power levels (Watt)

for the useful signal (fup (forward link) or rup (return link) ) and the interfering (fi1, fi2, fi3 or ri1, ri2, ri3) signals.

For the noise power the spectral density is provided. The data provided by the CHMOD tool are summarized in

Table 2-2.

Channel mode

(CHMOD)

fup

fi1

fi2

fi3

Convert

to

spectral

density

Channel

Simulator core

fsym

cgv

COI0

ACI0

fnd

ACI0

N0

Cin or Cout

Other System

Parameter

Input signal

(from Modulator)

Output signal

(to receiver)

Other

Parameter

Functions described in this document

Figure 2-3: Channel simulator tool overview

All parameters from the CHMOD tool are available as data file (“time series”) with a sampling frequency of typical

300Hz (the final sampling frequency can be selected during the implementation phase).

Table 2-1: Parameter required by the conversion tool

Description Default values

GRID Channel grid = default carrier spacing

fc Centre frequency of the user signal

fsym Symbol rate of the input signal

= effective bandwidth of the input signal

COIBW Bandwidth of the co-channel interferer use by the

DLR tools

identical to fsym (useful signal and

interfering signal have the same

bandwidth

ACI1BWE Bandwidth of the adjacent channel interferer 1 as

used by the CHMOD tools

identical to fsym

ACI1BWI Bandwidth of the signal generator used to generate

the adjacent channel interferer 1

TBD

ACI1Fc Centre frequency of the adjacent channel interferer ACIFc = fc-Grid



Version

ACI2BWE Bandwidth of the adjacent channel interferer 2 identical to fsym

ACI2BWI Bandwidth of the signal generator used to generate

the adjacent channel interferer 1

TBD

ACI2Fc Centre frequency of the adjacent channel interferer 2 ACIFc = fc+Grid

CLOS Nominal power for line of side reception

Table 2-2: Data provided by DLR channel model

Type code Contents

fup Forward received useful carrier power [W]

fra Forward rain attenuation [dB]

fsa Forward scintillation [dB]

fti Forward total interference power [W] (including other systems interference)

fi1 Forward co-channel interference power [W] (both polarisations)

fi2 Forward channel -1 interference power [W] (both polarisations)

fi3 Forward channel +1 interference power [W] (both polarisations)

fi4 Forward channel -2 interference power [W] (both polarisations)

fi5 Forward channel +2 interference power [W] (both polarisations)

fnd Forward noise PSD level [W/Hz]

fsn Forward SNIR [dB]

rup Reverse satellite received useful power [W]

rti Reverse total interference power [W] (including other systems interference)

ri1 Reverse co-channel interference power [W] (both polarisations)

ri2 Reverse channel -1 interference power [W] (both polarisations)

ri3 Reverse channel +1 interference power [W] (both polarisations)

ri4 Reverse channel -2 interference power [W] (both polarisations)

ri5 Reverse channel +2 interference power [W] (both polarisations)

rsn Reverse SNIR [dB]

rra Reverse rain attenuation [dB]

rsa Reverse scintillation [dB]

The channel simulator will monitor the power of the input signal and the power at the output of the non-linearity.

This level is considered as reference for the LOS reception: Pout,LOS. = CLOS + level_offset. The output level of the

channel simulator can be set to an arbitrary value. Therefore to all signal power levels provided by the DLR tool a

constant level offset has to be added to achieve the desired C/N0, C/I etc.

The time series given in Table 2-2 are converted to the internal parameter used by the channel simulator using the

following formulas.

CGV Gain for applied to the signal CGV(t) = fup(t)/CLOS

COI0 Spectral density of the co-channel interferer COI0(t) = fi1(t)/COIBW

ACI10 Spectral density of the adjacent channel interferer 1 ACI10(t) = fi2(t)/ACIBWE

ACI20 Spectral density of the adjacent channel interferer 2 ACI20(t) = fi3(t)/ACIBWE

N0 Noise power spectral density N0(t) = fnd(t)



2005

Version

2.2 Usage Scenario for ACM

An overview to the test bench is given in Figure 2-4. The channel simulator can be considered as general purpose

channel simulator. For the ACM test bench two simulator subsystems will be used.

The subsystem #1 is used for the forward link (FL)

The subsystem #2 is used for the return link (RL)

Figure 2-4: ACM test bench overview

Each channel simulator subsystem includes

• Non-linearity simulation module

• Signal generator #1 (typical used to simulate an adjacent channel interferer

• Signal generator #2 (typical used to simulate an second adjacent channel interferer or an on-channel

interferer

• Noise generator

• Phase noise generator

The FL and RL module are implemented with the same hardware platform. Only the configuration parameters are

different. Three operation modes are considered for ACM

• FL: Single carrier per transponder (see Figure 2-5)

• RL (see Figure 2-6)

• FL: Two (or more) carrier per transponder (see Figure 2-7)

In the mode “FL, single carrier” the non-linearity simulator simulates the satellite TWTA characteristics. The

interfering signal is added after the non-linearity simulator. It is assumed that the fading for the different carrier is

highly correlated. Therefore the fading is applied to the signal after the interferers are added.

In the mode “RL” the non-linearity simulator is mainly used to simulate the non-linearity of the SSPA of the user

terminal. For the RL it is assumed that the user terminals are at different locations. Therefore the fading may be

independent. Independent fading can by applying an independent level profile to each signal generator. Accordingly

is the fading of the main signal applied before the interferers are added.



Version

In the mode “FL, several carrier per transponder” the additional carrier should be added before the non-linearity

simulator of the satellite. In a typical configuration the AWG of the channel simulator is used to generate other

carrier. The file for the AWG can be generated by any software tool (MATLAB for example) and downloaded to the

CS_HW. The file may include one carrier or already a combination of several carriers.

An additional interferer simulating signal from another transponder can be added after the non-linearity simulator.

Figure 2-5 Block diagram of FL channel simulator (single carrier)

Figure 2-6 Block diagram of RL channel simulator

Figure 2-7 Block diagram of FL channel simulator (several carrier per transponder)

Satellite Non-linearity X

(Shaped noise) +

Phase Noise

+

Noise

DLR DATA

(CHMOD tool)

Fading

Interferer

X +

X

Signal

Generator #1

Other carrier

relativ level

Ccarrier1 to Cother

Signal

Generator 2

(File)

Satellite Non-linearity X +

(Shaped noise) +

Signal Generator 2 (File)

Phase Noise

+

Noise

X

DLR DATA

(CHMOD tool)

Fading

Adjacent Co-channel/ACI

X +

X

Terminal Non-linearity X +

Signal Generator 1 (File)

+

Signal Generator 2 (shape noise)

Phase Noise

+

Noise

X

DLR DATA

(CHMOD tool)

Fading

Adjacent Co-channel

X

X

Signal

Generator #1

+

X



2005

Version

2.3 Channel simulator functionality – Static configuration

Figure 2-8 gives an overview to the channel simulator for the Forward Link. The figure focus on the static scenario

(=AWGN channel, constant interferer level). Time variant fading is not shown. In case of time variant fading the

parameters are adapted according to the parameters provided by the DLR software tool.

The input signal is an IF-band signal that is converted in digital form and down converted to baseband. It is a

complex signal (indicated by double line). Single line represents real signals.

A first level adjustment (#1) sets the power of the useful signal to a known value ( i.e. = 0 dBm ) . An interference

generator (#1) adds an interference signal whose power is consistent with the input C/I .

Then there is another level adjustment (#2) that normalizes the power of the whole signal (useful one plus interferers

if present). This block must have a command to set it in automatic mode (the behaviour just explained) or manual

mode, in order to set from outside the gain factor (A1). The level detector #2 also estimates the power of the signal

for monitoring purposes.

The actual IBO factor is

[dB]

2010

IBO−

and it is multiplied by the total signal. Obviously this multiplication is correct

only when Level adjustment #2 works in automatic mode, i.e. the power of the signal is unitary.

Then there is the HPA model. The input envelope is measured, ρ , as well as input phase, ϕ . The envelope is given

to a look-up table that has previously stored the HPA Characteristic. The output is a couple of numbers, i.e. the

output amplitude and the output phase. These are passed to a block that creates the complex output as in picture, that

is ( )( )

( )i

A eϕ ϑ ρ

ρ+

� .

At the output of the HPA there is the Level Control #3 to measure the output power and to normalize the signal to

unitary power again. When this level control is set to manual and A3 is set to 1, the measured power corresponds to

OBO, provided that the used HPA characteristic is normalized.

After level adjustment (#3), co-channel and adjacent channel interference is added according to the setting (C/I

output) and eventually the signal is multiplied by the fading factor and the phase noise jitter before adding the

Gaussian Noise.

In the return link insertion of the fading is a different position, as well as the phase Noise generation should be at the

output of the transmitter. See return Link comment for more details.

The AWGN Generator does not need any power measure as input because the level adjustment #3 set the power of

the HPA output signal to 1. It generates a noise PSD No that can be set by the user in manual mode, or in automatic

mode, is such that the useful signal power to Noise Ratio corresponds to the desired 0

CN

. The Noise PSD shall be

0

0

1NC

N

=

.

In case of multi-carrier operation, assuming m equipower signals, the total signal power will be unitary and noise

PSD shall be set accordingly. The AWGN Generator shall generate a Noise PSD equal to 0

0

1tot

NC

N

=

, i.e

m times smaller than the single carrier case.


Version

Figure 2-8: Functional block diagram

LevelAdjustment

#1

InterferersGenerator

#1

LevelAdjustment

#2

from External Setting:Automatic/Manual

To externaldisplay/monitor

LevelDetector #2

Envelope amplitudemeasure

TWTA Look-upTable

2 2I Qρ = + ( )A ρ

( )ϑ ρϕ

Complexnumber

generation

( )( )( )

iA e

ϕ ϑ ρρ

+�

HPA Model

From externalload TWTA

characteristic

LevelAdjustment

#3

P1 = 1

AWGN

Generatoroutputsignal

inputsignal

LevelDetector

DelayDown

ConversionADC

LevelMeasurment

#1

înP

ManualA2

Automatic

[dB]

2010

IBO−

Manual

A3Automatic

to externalDisplay Freeze

Hold

ôutP

CO-channelInterferers

Generator #2

[ ]/in

C I

Automatic

Manual

No [dBW/Hz]

C/No[dBHz]

DAC& upconversion

1ôutP

1ôutP

1în

P

Hold theNo value

freeze

CO-channelInterferers

Generator #3

[ ]/ACI outC I [ ]/COI out

C I

Phase NoiseGenerator

Fading

externalprobe



2005

Version

3. IMPLEMENTATION CONCEPT – IMPLEMENTATION CONSTRAINTS

The Figure 2-8 represents a floating point implementation (Level are normalized to unity power, for example). The

implementation is based on integer arithmetic. Therefore the signals have to be scaled according to the selected

word length. The reference level at each point is selected to achieve the minimum performance and to minimize the

complexity. For the optimisation the following rules apply

• The selected FPGA family provides 18*18bit hardware multiplier. If the signal path is scaled correct, the

dynamic range is not critical.

• Two types of level adjustments has to be distinguished

o Static adjustment to keep the signal in the dynamic range of the integer arithmetic

o Variable level adjustment by the user or according to measured signal levels.

• The main signal path runs at a sampling frequency of 80MHz. A variable level adjustment for complex

signals requires 2 multipliers running at 80MHz. Static adjustments can be implemented by selecting the

right bits (equivalent to a bit-shift operation). Accordingly it is the goal to avoid variable level adjustments

in the signal if possible. A variable level adjustment can be also implemented by scaling the “scale factor”.

For each internal signal point the scale factor represents the nominal value. This scaling is typically done

by the control software.

• Furthermore it is the goal to avoid AGC or ALC control loops if possible. Due to the full digital

implementation most of the level can be calculated directly or are known a-priori. For example the

interfering signal is loaded to a memory. The signal level can be calculated during the down-load, for

example.

In many cases a mathematical equivalent implementations is feasible. As an example is the TWTA non-linearity

simulation:

The output of the non-linearity simulator can be described

with

x(..) = input signal

y(..) = output signal

(..)

(..)(..))( (..))(

x

yeg i =•∂ ∂ϑ

22*(..)(..)(..) QIxx +=•=∂

by ))(())((

1

)))((( ))(()())(()())(()( nTinTiinTi enTgnTxeenTgnTAenTAnTy ∂∂∂+ •∂•=••∂•=•∂= ϑϑϕϑϕ

(..)(..)(..) (..) ibaeg i +=• ϑ (“gain values”) are stored in a look-up table. Storing the gain values instead of the

output samples allows that the channel simulator can also work with low signal levels (typically linear region) at the

input of non-linearity simulator.

The address for the table look-up is derived from (..)∂ , the measured envelope of the signal. If the look-up table

stores gain values the IBO can be also adjusted by scaling (..)∂ instead of adjusting the input signal.

Assuming

2010(..)(..)2

IBO

xx−

•=

should be the nominal input signal to the TWTA, the envelope can be calculated by

*20* (..)(..)10(..)2(..)2(..)2 xxxx

IBO

••=•=∂−

It is an equivalent implementation if



Version

(..)10(..)2 20 ∂•=∂−

IBO

is used for the table look-up without scaling the input signal before the TWTA non-linearity simulator.

According to this principle the following simplifications can be made to Figure 2-8.

• Level adjustment #2 and scaling of the signal according to the IBO is not required.

• The non-linearity simulator can be implemented by storing the gain values only (no scale down of the input

signal at the input of the TWTA non-linearity simulator is required --> no additional quantisation effects).

• Storing the gain values in the table allows precise simulation also for small input levels (for small input

values the table will include the linear gain --> reduced problems with small table sizes.

Based on this the block diagrams given in Figure 3-1 (copy of figure given in [CSIM-HLD] document) represents an

identical implementation of the channel simulator functionality.

The level adjustment #3 shown in Figure 2-8 is implemented by the combiner#2 implementing the fading and the

adding of the interferer. The line-of-sight signal level is measured by level detector #2 measuring the signal level at

the output of the TWTA. The fading data (CGV data) provided by the DLR tool has to be converted to the internal

format in any case. The normalisation of the level is done by this conversion function. Further details on the

combiner #2 and the detailed design of the conversion functions are subject of the detailed design phase.

The block diagram defines the following main building blocks:

• ADC module

• Insert delay, Input AGC, Level adjustment #1, I/Q generation downconversion to baseband

• Combiner #1 (add interferer before non-linearity generation)

• Non-linearity simulation

• Combiner #2 (add interferer after non-linearity generation, level adjustment according to CGV values)

• Add phase noise

• Add thermal noise

• DAC and up-conversion

And the related supporting modules including

• Signal generator #1 (generate band limited noise)

• Signal generator #2 (Arbitrary waveform generator with 4GByte memory)

• Up-sampling filter for the fading coefficients

• Level detectors


Version

Figure 3-1: Building block overview


Version

4. OVERALL CSIM SUB-SYSTEM ARCHITECTURE

The channels simulator subsystem of the ACM test bench is based on the S-DARS simulator shown in Figure 4-1.

As described in [CSIM-HLD] the chassis includes

• Two SVMB boards

o one is used for the FL

o the other for the RL

• Subsystem controller (Industrial PC compatible main board with operating system Linux) with

o local display (see Figure 4-1)

o local keyboard see (Figure 4-1).

o Harddisc drive (HDD) and DVD

o remote control interface (Ethernet) for control by the CMS station provided by Astrium

Figure 4-1: front view of the chassis

The PC serves as system controller and data source for the Modulator Cards (SVMB).

The PC implements the following functions

• Read CGV data from the hard disc (local hard disc (for short test sequences) or hard disc accessible over

the network (simulations scenarios are generated by DLR tool)

• Format conversion

• Forward data to SVMB board

• Remote control interface

• Local GUI

The Signal Generator can be remote controlled via Ethernet which is connected via appropriate interfaces (A605) to

the PC (C605). The front panel board (FPUI) interfaces a jog dial and additional interfaces (PS2, USB) via the

backplane (BPCI) to the PC.

The block diagram of the Signal Processor (SVMB board) is shown in Figure 4-2.



2005

Version

SH4R-Microcontroller

CPU-Bus

Basis-FPGA

Virtex II Pro

DDR-RAM4GB

Buffered

SRAM128kB

PC

I-Bus (3

2 B

it)

GigabitLAN-

Controller

PC

I-Bus (6

4 B

it)0R

PCI-Bridge Options-FPGA

DC/DC

SDRAM128MB

DAC I/Q

DAC I/Q

DAC I/Q Upconverter

Takt-

erzeugung10MHz

1PPS

Trigger

1

L-Band LO

80 MHz

TEI1

DAC I/Q Upconverter

DAC I/Q Upconverter

DAC I/Q Upconverter

Trigger2

RF 2(RFU)

RF 1

RFU 1 - I

RFU 1 - Q

RFU 2 - I

RFU 2 - Q

LAN von PC

PCI von PC

SDRAM128MB

ZBT-RAM

1MB

(getrennte PCI-Busse, Verbindung möglich)

Flash2x16MB

UART

2x RS232 Port

EEPROM

16kB

ADC 1 In 1

ADC 2In 2

(RFU)

Figure 4-2: Block Diagram of the Signal Processor Board

The signal processor cards (SVMB) are inserted from the rear as shown in Figure 4-3 (the figure shows the rear

panel with one card).

Figure 4-3: rear view of the chassis with cards inserted



Version

Figure 4-4: photo of the IZT DSG2000 main board (SVMB boards)



2005

Version

5. MODULE ARCHITECTURE

5.1 ADC Module

The signal will be provided at a low IF frequency to the channels simulator. The following IF frequencies will be

supported

• 20MHz

• 60MHz

• 70MHz if bandwidth is less than 15MHz

• 140MHz

Using a low IF for the input, one ADC is sufficient. The baseband signal will be generated digitally.

According to the specification the nominal input level is -10dBm (RMS value). The peak to mean ratio should be

less than 3 (amplitude), -->10dB, resulting in a peak signal level of 0dBm.

The ADC will run at a sampling frequency of 80MHz and will provide a nominal resolution of 14bit.

Note: No anti-aliasing filter will be provided by the channels simulator. Accordingly the input signal must be band-

limited.

5.2 Input AGC

The channel simulator itself is implemented fully digital. To achieve a high accuracy also in case of slightly varying

signal level at the input (e.g. temperature drift), an input AGC is included. The goal of the input AGC is to keep the

level at a desired (and well known) level at the input of the digital part.

The input AGC includes a level detector and a level adjustment. The level detector will measure the input signal

power according to

)()(65535

2

)(

2

)(

0

0

∑+

=

+=n

nn

nTnT QItP

If the AGC is inserted before the I/Q generation and down conversion the equation can be simplified. Q will be 0 in

this case.

In the first step the input power will be accumulated for 216

input samples to get a first average of the signal level.

For a sampling frequency of 80MHz this is equivalent to an averaging over 0.8192ms. Further averaging will be

provided in software to implement also longer averaging time.

The measures signal level will be compared to the desired input level and the gain of the level adjustment selected

accordingly. Assuming the input signal is nearly constant (we assume only a minor temperature drift in the range of

less than 0.1dB per second) the time constant of the AGC loop can be made very long. This is typically implemented

by using a small step size for incrementing/decrementing the gain. Assuming a dynamic range of the input AGC of

30dB the LSB of the 18bit multiplier is equivalent to a level change of 0.001dB (relative to nominal input level).

Further details of the AGC control loop are subject of the detailed design.

The level adjustment can be frozen (= keep last value) or set directly to a nominal value. In this case the level

detector is used for monitoring purpose only.



Version

5.3 Propagation delay

The input data are stored in a FIFO implemented by a 128MByte RAM. The 14bit input samples will be stored as

16bit values resulting in a maximum supported propagation delay of

(128MByte/2)/80MHz = 800ms

The write and read addresses of the input FIFO will be generated by the FPGA.

The difference between the write and the read pointer defines the propagation delay. The propagation delay can be

set by the user and should be not changed during a measurement.

5.4 I/Q generation

The I/Q generation includes a digital mixer and two FIR filters to generate the baseband signal. Using an IF

frequency of fs/4+N*fs/2 a simplified implementation of the digital mixer is sufficient.

The I/Q generation has to implement

I(nT) = LPF(x(nT) cos(n 2πfIF/fS) )

Q(nT) = LPF(x(nT) sin(n 2πfIF/fS) )

With

x(nT) are the input samples

LPF(…) is the output of a digital low pass filter

If fIF/fS is 0.25+N*0.5 the cos(..) and sin(..) by 1,0,-1,0 and 0, 1, 0, -1. This is equivalent to sorting the input

samples to an I and Q path and toggling the sign. Therefore no multipliers are required for the I/Q generation itself.

Multipliers are only required for the LPF.

LPF 1

LPF 2

x(nT)

x(..), 0, -x(..), 0

0, x(..), 0, -x(..)

Simple

I/Q

Generation

I(nT)

Q(nT)

For the LPF a 32 tap FIR filter will be used. The preliminary design of the filter is summarized by

Related parameters (MATLAB syntax):

iqgen_f = [ 0 0.4 0.6 0.99];

iqgen_a = [ 0 0 40 50 ]; % dB

iqh = firls(32, iqgen_f, exp(log(10)*(iqgen_a/(-10))));

Resulting frequency response:



2005

Version

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1-2000

-1500

-1000

-500

0

Normalized Frequency (×π rad/sample)

Phase (

degre

es)

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1-150

-100

-50

0

50

Normalized Frequency (×π rad/sample)

Magnitude (

dB

)

5.5 Combiner #1 (add interferer before non-linearity)

Signal generator #1 (filtered noise) or signal generator#2 (Arbitrary waveform generator) can be used to add

interferer before the non-linearity simulator. This allows the simulation of the multi-carrier scenarios.

The interfering signal can be defined by

• Used signal generator

• If signal generator #1 is used

o center frequency of the interferer

o Used filter for the noise shaping

• If signal generator #2 is used

o Filename of the file containing the I and Q samples

For the combiner #1 no CGV value will be provided by the CS_CM software. Accordingly the signal level will be

set to a constant (average) signal level. Time variant interferer (e.g. TDMA burst operation) can be generated using

the arbitrary waveform generator as signal source.



Version

5.6 Non-linearity Simulator

The block diagram of the non-linearity simulator is shown in Figure 5-1.

Note: All wordlength values of the integer implementation are TBC

The signals at the intermediate points are represented by integer values. The signal representation at the different

points is summarized in the following table. The input signal is normalized to a nominal value which typically

representing the nominal input signal level of -10dBm. The maximum input signal level of the ADC is app. +7dBm

(500mV, 50Ohm input impedance).

Nominal level Representation

ADC input Cin' -20 .. -5dBm analog signal

ADC output Cin' -20 .. -5dBm

14bit, full scale =

500mV (+7dBm)

After level adjust Cin -10dBm

app. 11bit (+sign)

average amplitude

Interferer #1 C_Int1 max. 20dBm max level = 15bit

TWTA input Cin+C_Int1 max. 25dBm max level = 16bit

TWTA output Cout = g*(Cin+C_int1) max. 25dBm max level = 16bit

Figure 5-1: Block diagram of the non-linearity simulator

A look-up table is used for the non-linearity simulation. The address of the look-up table entry is derived from the

envelope (..)∂ of the input signal. Before table look-up the address is scaled according to the level representing the

IBO=0 and the desired IBO using the following formula:

*220* (..)(..)10(..)2(..)2(..)2 xxcxx

IBO

•••=•=∂−

with:

x represents the signal at the TWTA simulator inputs (complex number !)



2005

Version

c represents the scaling factor from the nominal input level to the level representing IBO=0dB.

IBO is the desired IBO.

The look-up table includes “gain values” ))(())(( nTienTg ∂•∂ ϑ

. The gain is calculated from the AM/AM

(magnitude) and AM/PM (phase) curves.

-25 -20 -15 -10 -5 0 5 10-18

-16

-14

-12

-10

-8

-6

-4

-2

0AM/AM curve

IBO [dB]

OBO [dB]

-25 -20 -15 -10 -5 0 5 100.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

2.2

2.4

gain values versus IBO

IBO [dB]

gain [lin

ear]

Figure 5-2: AM/AM curve and resulting gain values (magnitude) of a typical TWTA

The gain values are stored in a look-up table. The table index represents the measured envelope of the signal.

Typical values of the table content (Parameter set: Non-linearized TWTA) are shown in Figure 5-3 and Figure 5-4.

Characteristics of other TWTA are given in the annex. The values are stored as complex number a+i*b. Values

between two table values are derived by linear interpolation.



Version

0 200 400 600 800 1000 12000.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

2.2

2.4

table values non-linearity simulator

gain

table index

Figure 5-3: TWTA Look-Up table – Gain values. The X-axis is the table index, the Y-axis the magnitude of

the gain “g”.

0 200 400 600 800 1000 12000

10

20

30

40

50

60

70table values non-linearity simulator

phase

[deg]

table index

Figure 5-4: TWTA loop-up table – Phase shift. The X-axis is the table index, the Y-axis the phase of the gain

value



2005

Version

5.7 Combiner #2

The channel simulator includes a combiner matrix. The combiner matrix adds the signal sources. The gain values of

the signals are derived from the time series generated by the software tool provided by DLR (CS_XM). The

sampling rate of the time series is 1kHz.

The output signal of the combiner can be described as:

y(t) = g1(t) • x1(t) + g2(t) • x2(t) + g3(t) • x3(t)

with:

g1(t), g2(t) g3(t) are gain values received as time series from the DLR channel model. The time resolution

is 1ms.

x1(t) is the interfering signal #1 (e.g. adjacent channel signal = ACI)

x2(t) is the interfering signal #2 (e.g. co-channel signal = COI)

x3(t) it the input signal

Figure 5-5: Combiner matrix overview

For the gain values of the main signal a digital upsampling is applied. The step response of the filter is give in

Figure 5-6. Note: The up-sampling factor is 80000 (1kHz to 80MHz). The upsampling will be implemented by:

• The first upsampling stage is implemented as digital upsampling filter. This first stage converts the CGV

value to a sampling rate of 64kHz.

• The second stage is a linear interpolation (for the typical bandwidth of the time series the repetition of the

last values would be also sufficient).



Version

0 1 2 3 4 5 6 7 8 9

x 105

-0.2

0

0.2

0.4

0.6

0.8

1

1.2Step response upsampling filter 1kHz -> 80MHz

Samples (fspl = 80MHz)

Figure 5-6: Step response of the upsampling filter for the gain values



2005

Version

5.8 Phase noise generator

5.8.1 Specified Phase noise profiles

The following phase noise profiles has been specified by the document DS and the SOW.

Source Description Values Comments

DS

FL_D4

Worst Case Phase Noise

(phase noise that should be

supported by receiver)

-25 dBc/Hz @ 100 Hz

-50 dBc/Hz @ 1 kHz

-73 dBc/Hz @ 10 kHz

-93 dBc/Hz @ 100 kHz

-103 dBc/Hz @ 1 MHz

-114dBc/Hz @ >10 MHz

DVB-S2 Aggregate 1 phase-noise

mask

DS

FL_M19

Modulation Phase Noise Mask,

Phase noise requirements for the

FL modulator

-65 dBc/Hz@ 100Hz

-75 dBc/Hz@ 1 kHz

-85 dBc/Hz@ 10 kHz

-95 dBc/Hz@ 100 kHz

-105 dBc/Hz@ 1 MHz

-115 dBc/Hz@ 10 MHz

This mask is not relevant for the

channel simulator. It is included only

for information only.

SOW DVB-RCS -16 dBc/Hz @ 10Hz

-54 dBc/Hz@ 100Hz

-64 dBc/Hz@ 1 kHz

-74 dBc/Hz@ 10 kHz

-89 dBc/Hz@ 100 kHz

-106 dBc/Hz@ 1 MHz

-116 dBc/Hz@ 10 MHz

102

104

106

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

Frequency, Hz

PS

D,

dB

/Hz

Phase noise masks

LNB

DVB-S2 typical

DVB-S2 critical

DVB-RCS

Figure 5-7: FL and RL aggregate phase noise mask.



Version

The characteristics of the FL and RL phase noise mask are compared in Figure 5-7. The DVB-S2 phase noise masks

are an aggregate of different contributions. The assumptions for the aggregated phase are summarized in the

following table. The following conclusions can be taken from the table:

• The phase noise components for frequencies below 10kHz result mainly from the LNB

• If an RF tuner with PLL is used the dominating part at 100kHz is the phase noise of the RF tuner

Table 5-1: Phase noise contributions

100 Hz 1 kHz 10 kHz 100 kHz 1 MHz >10 MHz

LNB -25 -50 -75 -95 -105 -115

Tuner (CAN) -75 -75 -81 -101 -111 -121

Tuner (RFIC-VCO) -75 -75 -75 -95 -115 -135

Tuner (RFIC-PLL) -85 -85 -85 -85 -105 -125

Aggregate (CAN) -25 -50 -74 -94 -104 -114

Aggregate (VCO) -25 -50 -72 -92 -104.5 -115

Aggregate (PLL) -25 -50 -74.5 -84.5 -102 -114.5

Aggregate -25 -50 -73 -85 -93 -103 -114

The aggregated DVB-S2 phase noise mask is mainly applicable to the signal at the input to the baseband part of the

demodulator. If the RF tuner input is used as input to the demodulator, it is more realistic to use a phase noise profile

derived from the LNB and other contributions (modulator, uplink, satellite). The following test scenarios are

considered:

• RF-Tuner bypass:

The channel simulator should generate a phase noise profile according to the DVB-S2 phase noise profiles

• RF-Tuner is used:

The channel simulator should generate a phase noise profile representing the phase noise of the modulator,

the uplink and the LNB.

The phase noise profile for the FL modulator can be derived from DS, FL-M19. Typical profiles for the LNB are

given in Table 5-1. Contributions from the uplink and the satellite are TBD. Accordingly the channel simulator

should support different phase noise profiles. Assuming the phase noise contribution of the modulator is not

negligible it may be useful to define one phase noise mask if the performance of the modulator is available. This

allows the definition of a mask that generates together with the modulator phase noise a phase noise at the input to

the receiver inline with the DVB-S2 assumptions.

MaskPower [rad

2] rms [deg] Power [rad





2] rms [deg]

DVB-S2, Typical 1.05 58.9 0.42 37.3 4.47E-04 1.21 0.41 36.6 0.0146 6.9 1.10E-03 1.9

DVB-S2, Critical 1.05 58.9 0.42 37.4 4.47E-04 1.21 0.41 36.6 0.0146 6.9 2.50E-03 2.9

RL- SOW 5.03 128.5 0.0053 4.2 2.70E-04 0.95 0.0018 2.5 1.80E-03 2.5 1.40E-03 2.1

LNB 1.05 58.8 0.42 37.2 3.40E-04 1.06 0.41 36.6 1.30E-02 6.5 7.16E-04 1.5

1kHz - 10kHz 10kHz - 1MHz0-40MHz 100Hz - 1MHz 1MHz - 40MHz 100Hz - 1KHz



2005

Version

5.8.2 Phase noise generation

The phase noise simulator shall support at least the phase noise profiles as referenced by DVB-S2 specification and

DVB-RCS specification. The overall phase noise level can be adjusted. Therefore it is possible so simulate different

phase noise levels (e.g. DVB-S2 mask + 3dB). Within the capability of the filters used to generate the phase noise

profile other profiles can be generated by using different filter coefficients.

The reference designs for the phase noise masks provided by ESA can’t be used for the channel simulator.

• The coefficients are designed for sampling frequencies equal to the symbol rate. The channel simulator

runs at higher sampling frequencies to support also the non-linearity simulation. Therefore the phase noise

has to be generated for a sampling frequency of 80MHz.

• The designs are based on IIR filters. The required coefficients may require floating point implementation

(or at least a word length which exceeds the capability of the hardware multiplier available within the

FPGA). Furthermore IIR filters are not supported by the Xilinx libraries.

A concept based on FIR filters and digital upsampling is easier to implement. The concept is: shown in Figure 5-8.

• The low frequency components are generated with a noise source #1 and a FIR filter #1. Possible sampling

frequency for this part is 80MHz/2048 = 39.062kHz. This component is upsampled to a higher sampling

frequency using a standard upsampling filter which can be easily implemented.

• The mid range frequency components are generated with a noise source #2 and a FIR filter #2. This part

runs at a sampling frequency of 80MHz/32 = 2.5MHz

• No high frequency components are generated. For the demodulator behaviour mainly the components

below 100kHz are relevant. Therefore the main focus is on the synthesis for the frequency components

below 100kHz.

• To ensure that the high frequency components (components above 100kHz) have the same energy as the

reference mask, the level of the point 1MHz is slightly increased to achieve the same energy for the

components above 100kHz as for the reference mask.

ADD

To second up-

sampling

filter (x32)

and/or mixer

Noise

Source

Noise

Source

FIR1

Up-

sampling

(x64)

FIR2

Figure 5-8: Phase noise generation (preliminary design)

The filters have been designed for the DVB-S2 phase noise mask. The resulting phase noise spectrum is shown in

Figure 5-9. Note: The filter design does not include any fine adjustment up to now. The design was made with a

straight forward MATLAB program reading the phase noise mask and designing the filters according the target

mask. Manual fine adjustment may help to improve the match with the target mask.

The channel simulator will support



Version

103

104

105

106

107

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

Frequency, Hz

PS

D,

dB

/Hz

Synthesized phase noise PSD (blue line) and target mask (red line)

Figure 5-9: Resulting phase noise spectrum for the preliminary design

5.9 Thermal Noise

The channel simulator includes a digital noise generator. The spectral density N0 of the noise generator can be set

directly. To allow a well defined Es/N0 setting N0 can be selected relative to the output of the following level

detectors:

• Cin representing the signal before the TWTA

• Cout representing the signal after the TWTA

The scaling factor resulting from the integer implementation and the internal signal representation are taken into

account automatically.

The nominal operation mode is:

• The input AGC is active --> assuming the operation mode “constant IBO” the signal level after the AGC is

kept constant --> Cin = const.

• The interferer #1 is generated internally by a digital signal generator or by an arbitrary waveform generator.

Accordingly the power at the input of the non-linearity simulator can be calculated

PTWTAin= Cin+ Pint1

• The (average) power Pout at the TWTA output depends on the signal and non-linearity characteristics and

will be measured by a digital level detector. The ratio

Pout/(Cin+Pint1)

depends on the IBO and the signal characteristics.

• Assuming the user power can be estimated by

Cout = Pout • Cin/(Cin+Pint)



2005

Version

The ratio Cout/Cin can be calculated even if the interfer #1 (usage scenario: Multi carrier modulation) is

active.

• From these values the following parameters can be derived

Cin/N0

Cout/N0

Cout/N = Es/N0 available to the receiver

and displayed or set by the user.

Different operation modes can be considered:

1. N0 is set directly --> Cin/N0, Cout/N0 and Cout/N are dependent parameters (can be displayed only)

2. Cout/N is set --> Cin/N0, Cout/N0 and N0 (optional also N = N0*symbol rate) are dependent parameter

Note: In this mode the symbol rate must be set by the user

3. Cout/N0 is set

4. Cin/N0 is set

Note: The level detector measures the signal before the combiner #2. Accordingly the displayed values

represent the “clear Sky” signal-to-noise ratios.

In case of ACM the level detector measures the average signal level. The ratio between Cin and Cout depends on the

signal statistics. If Cout is used as reference values for N0 the following procedure is proposed:

• For a well known MODCOD statistic (simplest example is CCM mode) the level Cout is measured and N0

adjusted accordingly.

• The reference Cout value is stored (= “hold”) and N0 is set relative to the stored value.

• The current measured Cout (or estimated Cout calculated according to the formula given above if case of

interferer#1 is active) are displayed for monitoring purpose.


Version

6. EQUIPMENT SETUP

6.1 Control parameter

The following table summarize the parameters required to run the channel simulator. All parameters can be set locally or via remote control interface.

Parameter Related module Allowed values Default values, comments Related commands of channel simulator

Note – general commands not included in this document, refer to

programming manual

Input IF I/Q generation 20, 60, 140MHz

70MHz1

60MHz ACM:INPut:FREQuency

Reference

level for AGC

Input AGC -302 … -6dBm -10dBm ACM:INPut:AGC

Propagation

delay

Propagation

delay

13 … 750ms 1ms (no propagation delay is

inserted, only processing delay)

ACM:INPut:DELay

Signal

generator #1,

center

frequency

Signal generator

#1

-30 …+30MHz +20MHz (TBC) ACM:SOURce1:FREQuency

Signal

generator #2,

Filter ID

Signal generator

#1

FIR1, FIR2

(Filter characteristics TBD)

FIR1 ACM:SOURce1:FILTer

Signal

generator #1,

level

Signal generator

#1

-40 .. +20dB 0dB ACM:SOURce1:ATTenuation

Signal

generator #2

Filename

Signal generator

#2

Linux file system file name - ACM:SOURce2:NAME

Signal

generator #2,

level adjust

Signal generator

#2

-40 .. +20dB (relative to RMS

value of file)

0dB ACM:SOURce2:ATTenuation

1 The IF=70MHz will be considered as signal at the IF frequency of 60MHz with a frequency offset of 10MHz. A reduced signal bandwidth will be available in this mode.

2 The value defines only the reference value for the input AGC. A reduced input level reduces the signal-to-noise level due to quantisation noise of the ADC.

3 The 1ms includes the processing delay. Therefore 0ms is not supported.



2005

Version

Interferer #1,

signal source

(Multi carrier

signal)

Combiner #1 no interferer,

Signal generator #1

signal generator #2

no interferer (single carrier mode) ACM:SOURce1:STATe

ACM:SOURce2:STATe

are used to disable the source or to combine them at combiner 1 or 2

Interferer #2,

signal source

(COI

interferer)


Signal generator #1

signal generator #2

no interferer (interference is

switched off (no COI))

“

Interferer #3,

signal source

(ACI

interferer)


Signal generator #1

signal generator #2

no interferer (interference is

switched off (no ACI)

“

TWTA on/off Non-linearity

simulator

on

off

off ACM:NONLinearity:STATe

IBO Non-linearity

simulator

-20 .. +5dB 0dB ACM:NONLinearity:ATTenuation

ACM:NONLinearity:IBO?

ACM:NONLinearity:OBO?

TWTA type Non-linearity

simulator

File name of TWTA parameter

set

- ACM:NONLinearity:NAME

LOS level

COI

Combiner #2 Reference value to normalize

CGV values

Nominal values (clear sky) of COI ACM:SIMulator:SOURce:ATTenuation

LOS level

ACI


CGV values

Nominal values (clear sky) of ACI ACM:SIMulator:SOURce:ATTenuation

LOS level

Cout


CGV values

Nominal value (clear sky) of Cout ACM:SIMulator:SOURce:ATTenuation

Symbol rate

(effective

BW)

Noise generator 1 … 25MHz 25MHz ACM:SOURce3:BW

Noise on/off Noise generator on

off

off ACM:SOURce3:STATe

Hold Cout Noise generator - Use the current Cout value as

reference for N0

ACM:SOURce3:REFerence



Version

Cout/N0 Noise generator (-6 … +30dB) +10*log10(fsym) The other values are calculated

accordingly and displayed. The

display update rate is ????. To

calculate the values the symbol rate

has to be set (see command symbol

rate)

Note: It is recommended to set this

value only in the CCM mode or if

the non-linearity simulation is

switched off.

ACM:SOURce3:CN0


Cin/N0 Noise generator (-6 …+30dB) +10*log10(fsym) The other values are calculated

accordingly and displayed.

ACM:SOURce3:CN0


Cin/N Noise generator -6 …+30dB The other values are calculated

accordingly and displayed

ACM:SOURce3:CN


Cout/N = Es/N0 Noise generator -6 …+30dB The other values are calculated

accordingly and displayed

Note: It is recommended to set this

value only in the CCM mode

ACM:SOURce3:CN


N0 Noise generator The other values (Cout/N0 and Cin/N0)

are calculated accordingly and

displayed

ACM:SOURce3:N0

Pout Up-converter TBD Output signal level at output

(Ptot=Cout+N+Interferer)

ACM:OUTPut:POWer

fCarrier Up-converter TBD Center frequency ACM:OUTPut:FREQuency

Start fading Combiner CGV file name

File offset

Start simulation of fading ACM:SIMulator:STATe

ACM:SIMulator:NAME

ACM:SIMulator:OFFSet

Pause fading Combiner - The reading of the CGV value is

paused. The last used CGV value is

kept.

ACM:SIMulator:STATe

Stop fading Combiner - Stop fading simulation, return to

LOS mode (all CGV are set to 1)

ACM:SIMulator:STATe



2005

Version

Phase noise

on/off

Phase noise

generator

off (no phase noise)

profile ID

The profile ID selects the filter

coefficient sets for the phase nosie

generation process.

At least three profiles will be

supported

DVB-S2, typical

DVB-S2, critical

DVB-RCS

ACM:SOURce4:STATe

Phase noise

level

Phase noise

generator

-10 … +10dB The phase noise level can be adjusted

by +/- 10dB.

ACM:SOURce4:ATTenuation



Version

6.2 Status Parameter

All control parameter can be read back. On top of the control parameter the following read-only status parameters are available.

Parameter Related module Nominal range Comments Related commands of channel simulator

Input signal

level

Input AGC -30 … -6dBm Signal level before the input AGC.

The input AGC normalize the input

level to the desired value (see control

parameter “Reference level for

AGC”)

Input status Input AGC Overflow

low level

Underflow

Overflow means clipping of the

ADC.

In case of “low input level” the

performance of the equipment is

reduced due to ADC quantisation

noise

Underflow: The signal exceeds the

dynamic range of the input AGC

TWTA output

level

Non linearity

simulator

Equipment

status

all

CGV values Combiner Currently used CGV values (note:

the sampling rate of the CGV values


Version

7. ANNEX

7.1 Input signal characteristics

The peak-to-mean ratio of the input signal is relevant for the design of the ADC. The following table gives an

overview for DVB-S2 signal. Please note: The numbers has been achieved by a short simulation numbers with better

accuracy (peak value is defined by probability that the signal amplitude exceed this value) may give slightly

different values. For the ADC design only a order of magnitude is relevant.

Mode Roll-off comments

[lin] [dB]

32APSK, R=3/4 0.35 2.53 8.05 no noise, linear channel

16APSK, R=2/3 0.35 2.35 7.44 no noise, linear channel

8PSK 0.35 2.06 6.27 no noise, linear channel

QPSK 0.35 1.60 4.08 no noise, linear channel

8PSK 0.2 2.53 8.05 no noise, linear channel

QPSK 0.2 1.87 5.46 no noise, linear channel

Peak to average



Version

7.2 Characteristics of the TWTA

The following diagrams represent the magnitude and the phase of the gain values stored in the non-linearizer look-

up table.

Note 1: The envelope detector measures the power of the signal. The X axis represents the power (= I2+Q

2).

Note 2: Each data point represents a data value stored in the look-up table. Values in between are achieved by linear

interpolation.

7.2.1 Non-linearized TWTA, ESA data

-25 -20 -15 -10 -5 0 5 10-18

-16

-14

-12

-10

-8

-6

-4

-2

0AM/AM curve

IBO [dB]

OB

O [dB

]

-25 -20 -15 -10 -5 0 5 100

10

20

30

40

50

60

70AM/PM curve

IBO [dB]

phase s

hift [d

eg]



2005

Version

-25 -20 -15 -10 -5 0 5 100.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

2.2

2.4

gain values versus IBO

IBO [dB]

gain

[lin

ear]

0 200 400 600 800 1000 12000.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

2.2

2.4

table values non-linearity simulator

gain

table index



Version

0 200 400 600 800 1000 12000

10

20

30

40

50

60


phase

[deg]

table index



2005

Version

7.2.2 Linearized TWTA (ESA data)

-25 -20 -15 -10 -5 0 5 10-25

-20

-15

-10

-5

0AM/AM curve

IBO [dB]

OB

O [

dB

]

-25 -20 -15 -10 -5 0 5 100

5

10

15

20

25

30Phase shift versus IBO

IBO [dB]

phase s

hift

[deg]



Version

-25 -20 -15 -10 -5 0 5 100.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2gain values versus IBO

IBO [dB]

gain

[lin

ear]

0 200 400 600 800 1000 12000.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8


gain

table index



2005

Version

0 200 400 600 800 1000 12000

5

10

15

20

25


phase

[deg]

table index

esa contract: no. 18409/04/nl/agemits.sso.esa.int/emits-doc/ref8_annex1&ref3_sow.pdf · esa...

Documents