ERROR CONTROL

What is error control?

It is the process of monitoring, detecting and, if possible, correcting the errors found in the information sent through the data communication systems to ensure 99.999% accuracy.

It is divided in 2 categories1. Error detection2. Error correction

Error ControlHandling of network errors caused by

problems in transmission Network errors

e.g., changing a bit value during transmission Controlled by network hardware and software

Human errors: e.g., mistake in typing a number Controlled by application programs

Categories of Network Errors Corrupted (data changed) Lost data

Errors can be classified generally as

1. Single bit error• Error affects only 1 bit of the given data string.

2. Multiple bit error• When 2 or more nonconsecutive bits within the

information are in error

3. Burst error• When 2 or more consecutive bits within the

information are in error

Sources of Errors

Line noise and distortion – major cause More likely on electrical media Undesirable electrical signal Introduced by equipment and natural

disturbances Degrades performance of a circuit Manifestation

Extra bits “flipped” bits Missing bits

Source of Error What causes it How to prevent it

Line Outages 

Faulty equipment, Storms, Accidents (circuit fails)

 

White Noise (hiss)

(Gaussian Noise)Movement of electrons (thermal energy)

Increase signal strength (increase SNR)

Impulse Noise (Spikes)

Sudden increases in electricity (e.g., lightning, power surges)

Shield or move the wires

Cross-talk Multiplexer guard bands are too small or wires too close together

Increase the guard bands, ormove or shield the wires

Echo 

Poor connections (causing signal to be reflected back to the source)

Fix the connections, ortune equipment

Attenuation 

Gradual decrease in signal over distance (weakening of a signal)

Use repeaters or amplifiers

Intermodulation Noise

Signals from several circuits combine

Move or shield the wires

Jitter 

Analog signals change (small changes in amp., freq., and phase)

Tune equipment

Harmonic Distortion 

Amplifier changes phase (does not correctly amplify its input signal)

Tune equipment

Sources of Errors and Prevention

mo

stly on

analo

gM

ore im

po

rtant

Error detection

It is the process of monitoring data and determining when errors have occurred during transmission.

Error detection techniques do not identify which bits are in error nor correct errors.

Error Detection: How it Works?

Mathematical calculations

?=

Mathematical calculations

Data to be transmitted

Sender calculates an Error Detection Value (EDV) and transmits it along with data

Receiver recalculates EDV and checks it against the received EDV

– If the same No errors in transmission

– If different Error(s) in transmission

EDV

Most common error –detection techniques

1. Redundancy2. Echoplex3. Exact-count coding4. Redundancy checking

a. Vertical Redundancy Checking (VRC)b. Longitudinal Redundancy Checking (LRC)c. Checksum Checkingd. Cyclic Redundancy Checking

End

Redundancy Checking

It is a form of error detection where each data is sent multiple times, usually twice. At the receiving end, the two units are compared. If the same, no errors have occurred.

Back

Echoplex

Sometimes called echo checking If a character or message is

received, it is transmitted back to the transmitting end for verification.

Back

Exact-count Coding

The number of ones (or zeros) in each character is the same. The Code 39 bar code is an example of an exact-count code where the nine-bit codes contains 3 logic 1’s and 4 logic 0’s

Back

Redundancy Checking

It is the adding of bit or bits for error detection

It has 4 schemes1. Vertical Redundancy Checking (VRC)2. Longitudinal Redundancy Checking (LRC)3. Checksum4. Cyclic Redundancy Checking

Back

Vertical Redundancy Checking (VRC) The simplest error-detection scheme for

asynchronous data communications systems. It uses even-parity bits or odd-parity bits. Generally, VRC uses odd parity bits

Longitudinal Redundancy Checking (LRC) It also uses even-parity or odd-parity bits

but often, even-parity is used.

C l a i r e B e n n e t LRC

43 6C 61 69 72 65 20 42 65 6E 6E 65 74

b0 1 0 1 1 0 1 0 0 1 0 0 1 0 0

b1 1 0 0 0 1 0 0 1 0 1 1 0 0 1

b2 0 1 0 0 0 1 0 0 1 1 1 1 1 1

b3 0 1 0 1 0 0 0 0 0 1 1 0 0 0

b4 0 0 0 0 1 0 0 0 0 0 0 0 1 0

b5 0 1 1 1 1 1 1 0 1 1 1 1 1 1

b6 1 1 1 1 1 1 0 1 1 1 1 1 1 0

b7 0 0 0 0 0 0 0 0 0 0 0 0 0 0

VRC 0 1 0 1 1 1 0 1 1 0 0 1 1 0

Back

Checksum

It is a simple form of redundancy error checking where the data is summed together to produce an error checking character or characters.

The checksum is appended to the end of the message.

5 types of checksum1. Check character checksum – a decimal value

is assigned to each character. The decimal values are added to produce the checksum character. E.g., Code 39 (bar code)

2. Single-precision checksum – the most common method of calculating checksums. The checksum is calculated simply by performing the binary addition of the data within the message. The checksum is n bits long, so if a carry occurs in the MSB, it is discarded.

3. Double precision checksum – It is the same as single-precision checksum except that the checksum is 2n bits long. Therefore, the carry in addition is included.

4. Honeywell – It is another form of double-precision checksum. However, the checksum is based on interleaving consecutive data words to form double-length words. The double-length words are summed to produce the checksum.

5. Residue – it is like single-precision checksum except that the carry is added to the LSB.

Back

Cyclic Redundancy Checking

For a block of R bits transmitter generates n bit sequence

Transmit R+n bits which is exactly divisible by some number

Receive divides frame by that number• If no remainder, assume no error

Cyclic Redundancy Checking - Steps

Given a Specific Polynomial G(x) called the generator, and a Data Message P(x), Calculate a Frame Check Sequence (FCS), or Checksum

Append the FCS (Checksum) to the Data Message for Transmission

At the Receiver, Recalculate the Checksum, and Check with the Transmitted Value

P / G = Q + R / G

Cyclic Redundancy Check (CRC)

– Most powerful and most common– Detects 100% of errors (if number of errors <= size of R)

– Otherwise: CRC-16 (99.998%) and CRC-32 (99.9999%)

Message (treated as one long binary number)

A fixed number (determines the length of the R)

Remainder:–added to the message as EDV)

–could be 8 bits, 16 bits, 24 bits, or 32 bits long

Quotient (whole number)

Example:P = 58G = 8Q = 7R = 2

Examples of G(x) Polynomials

CRC-12• X12 + X11 + X3 + X2 + X + X0

CRC-16• X16 + X15 + X2 + X0

CRC-ITU• X16 + X12 + X5 + X0

CRC-32• X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10

+ X8 + X7 + X5 + X4 + X2 + X + X0

CRC’s Are Implemented in Shift registers

CRC Algorithm

1. Multiply xr P(x), where r = degree of G(x) Add r Zeros to M(x), or Shift M(x) Left

2. Divide xr P(x)/G(x) = R(x)• R(x) = Reminder of Divide Operation

3. Transmit xr P(x) + R(x) = T(x)• XOR the Shifted Message and R(x)

4. At the Receiver, Recalculate the R(x) and Check Equal to the Transmitted FCS

5. If not equal, errors occurred in transmissionBack

Hamming Code

Each data bit figures into three EVEN parity bit calculations

If any one bit (parity or data) changes change in data bit can be detected and corrected

Works only for one bit errors