en.wikichip.org · 1 1 2 2 3 3 4 4 5 5 a a b b c c d d e e enhanced am486 microprocessor...

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

Table of Contents: COVER.SCHPage 2: CPU.SCH

Page 6: M1489.SCHPage 7: L2_CACHE.SCHPage 8: SIMM_SKTS.SCHPage 9: EIP_MEM1.SCH

Page 11: PCI_CONN.SCHPage 12: PCI_VIS.SCHPage 13: ENET1.SCHPage 14: ENET2.SCHPage 15: IDE.SCHPage 16: M1487.SCHPage 17: ROM_MISC.SCHPage 18: CLOCK.SCHPage 19: ISA_CONN.SCH

Page 4: CPU_VIS1.SCHPage 3: CPU_POWER.SCH

Page 20: SUPER_I/O.SCHPage 21: SERIAL_PARALLEL.SCHPage 22: ISA_MEM1.SCH

Page 24: RTC_TIP.SCHPage 23: ISA_MEM2.SCH

Page 10: EIP_MEM2.SCH

Page 25: KEYBOARD.SCHPage 26: CPU_PINOUT.SCH

Original designRev 1.0:

Rev 1.1:

Rev 1.2:

Minor modifications after Design Review

Added External 8042 Style Keyboard Controller (SH24)Removed Support for M1487 Internal KBC (SH15)Removed Keyboard Interface From Clock Page (SH17)Changed design name to Am486PCI C.D.P.

Rev 1.3: Added Extra Bypass Capacitors (SH5 & SH14 & SH15 & SH17)Swapped Around Some Signals Within Resistor Networks (SH6 & SH20)Renamed MCLK1 net to M_CLK1 (SH24)Added 0-ohm resistor to make pin 10 & 11 pullup work (SH17)Added Pin to HS1 for NetLister (SH3)Fixed Error in 3.3V Regulator Circuit (SH12)

Rearranged Clock Nets to Facilitate Routing (SH17)Changed Some Components to Standard Values(50ohm to 49.9ohm, 1% on SH 13 and 40pF to 39pF,5% on SH19)

Rev 1.4:

Page 5: CPU_VIS2.SCH

Note: Unless otherwise stated the capacitors are a 0805 package and 10% Tol.

Note: Unless otherwise stated the resistors are a 0805 package and 5% Tol.

Added jumpers to allow mulitple BIOS images in a single Flash ROM deviceRemoved 1 diode from VBAT generation circuitAdded new NMI generation circuit and spare ’F14 gatesAdded jumper for external RESET# pushbutton

Fixed wiring error on crystalRemoved MCLK1 net (16MHz) and rewired MCLK2 to drive all 33MHz clock netsRemoved CLKCNTL signal from DOZE# pin of U17

Removed unneeded 0-ohm resistors from Super I/O chipFixed wiring error on crystalAdded ’ABT125 buffer to drive serial port LEDs

MACH device outputs changed for new ISA Flash support

Changed ISA Flash to 1MByte (512Kx16)

Removed unneeded logic from RTC interfaceAdded inverter to generate proper CS# for RTC chipFixed wiring error on crystalGrounded U22-pin 22Removed 1 unused OR gate for use on SH17

Switched mouse connector to verticle typeChanged ’F06 symbol to show o/c

SH17:

SH18:

SH20:

SH22:

SH23:

SH24:

SH25:

Am486 Microprocessor Development System With PCI Expansion and On-Board Am79C972 100MB/s Ethernet Controller

Note: Unless otherwise noted all logic operates off a 5V power supply

SH11:

SH16:

SH9:

SH15:

Changed SIP resistor packs to 10-pin (SH2, SH3, SH11, SH15, SH16, SH17, SH19, SH20 & SH21)Changed 330ohm SIP Resistor Pack to 8-pin (SH19)

Added a 4K serial EEPROM for user parameters and mux. circuit to daisy chain it off the 1K device.’972 E/net device loads its configuration from 1K SEEPROM.CLKCNTL signal from M1487 used to select 1K or 4K SEEPROM.

Broke CPU Logic Analyzer Headers into 2 pagesAdded PAL to gnerate CPU A0 and A1 and also generate a Logic Analyzer Qualify signalBuffered BE[0..3], RDY#, BRDY#, and ADS# through the new PAL

Swapped R107 and R109; R109 is 49.9ohm, 1%Fixed wiring error on crystal

Added 5 more 0.1uF bypass capacitors for new chips (’F14, ’ABT125, 22V10, ’F08, ’C66)

SH4 & 5:

Fixed wiring error on crystalFixed wiring error in generation of low-active reset signal RSTDRV#Removed unused inverter (used on SH24)Changed net on NMI pin to 1487NMI for use in new circuitChanged R58 to be a populated component

Rev 2.0:

SH14:

Added diagram to correct Power Connector FootprintSH3:

SH13:

Added configuration information for PCI slotsRemoved circuit to generate PCI PERR# to causeM1487 to assert NMI to Am486 microprocessor

Added better explanation of EIP Flash memory operation

Rev 2.0 (continued):

Modified ROM jumpers to allow mulitple BIOS images in a single Flash ROMdevice and support 256K or 512K BIOS for non-PC applications

Added XBUSCSJ signal to Mach device so it does not respond when Am486fetches the reset vector at FFFF FFF0

SH17:

SH22:

Rev 2.1: Updated revision level and prototype warning on all sheets

SH14 &15 &20: Connected pins 1 and 2 on all LEDs for greaterpurchasing/manufacturing flexibility

Am486 MicroprocessorPCI CustomerDevelopment Platform

Am486 MICROPROCESSORPCI CUSTOMER DEVELOPMENT PLATFORM

Changed Cache Tag SRAM Speed to 10nsSH7:

Rev 2.1A: SH1: New Rev. of cover sheet text; no design changes made!

2.1A

(C) Advanced Micro Devices, Inc. (800) 222-9323

5204 E. Ben White Blvd.Austin, TX 78741AMD Proprietary/All Rights Reserved

1 26Friday, December 18, 1998

COVER.SCH

Title

Size Document Number Rev

Date: Sheet of

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

Enhanced Am486Microprocessor(SOCKET1-PGA169)

Tie CLKMUL pin to GND for AMD DX2-66and AMD DX5-133; use 10K pullup forAMD DX4-100

JTAG Connector

2

9

1

10

Top View

JTAG Connector

CPU.SCH


Am486 MICROPROCESSOR, PULLUPS, AND JTAG INTERFACE

2.1




Title


Date: Sheet of

GD7

GD12

DP2

DP0

GD[0..31]

GD1

GA[2..31]

K2VCC

GD10

GD21

GD23GD24

GD29

GD2

GD25

GD16

GD30

DP1

GD3GD4

GD8

GD14

GD19

GD13

GD6

GD26

GD31

GD5

GD11

GD17

GD22

DP3

DP[0..3]

GD0

GD9

GD15

GD20

GD18

GD27GD28

GA10

GA16

GA21

GA24

GA29

GA13

GA3

GA11

GA25

GA30

GA22

GA4

GA8

GA14

GA19

GA28

GA26

GA31

GA5

GA17

GA9

GA15

GA23

GA20

GA7

GA18

GA27

GA2

GA12

GA6

BEJ3

BEJ1BEJ2

BEJ0

BEJ[0..3]

GA29GA30

GA26

GA31

GA24

GA27

GA25

GA28

CLKMUL

TCK

TDITDO

TMS

MIOJDCJWRJ

ADSJ

GA[2..31]

PCD

PULLHI1

FERRJ

LOCKJ

HITMJ

BEJ[0..3]

WB-WT#

P24T5

SMIACKJ

SMIJPCHKJ

INTR

EADSJ

GD[0..31]

A20MJ

KENOJ

RDYOJBRDYOJ

IGNNEJ

BOFFJ

CPUVCC3

ZRSTDRV

AHOLD

BS8JBS16J

FLUSHJ

DP[0..3]

K2VCC

CPUCLK

NMI

STPCLKJ

HITMJCPURST

PCD_CACH

BLAST#

PULLHI1

HDLAPWT

BREQ

INV

PLOCK#

VCC

VCC

VCC

VCC

C401000pF

P35

HEADER2X5; SHRD

1 23 45 67 89 10

R9110K

R11*10K

R1310K

R1480

RP1

10K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP8

4.7K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

U25

Am486-PGA

37501632625817346849155157566980

1096579

5

24 26 28 38 39 60 63 72 75 81 8390 93 99 102

105

117

138

141

143

144

145

146

149

111104112110134169151133116988848

156

3 14 33

4410 1213 29

31

74

2543

842404123

642

191

183654856791537335615266979684

10378

107108113

47

7 9 11 20 21 22 59 64 71 76 77 82 89 94 95 100

101

106

118

120

139

158

160

161

162

163

164

166

119115114136153154137124155125123126122140121127142157128159147165129148131167130168150132

70868792

13527304546152

55

CLKRESETINTRNMIHOLDBOFF#AHOLDEADS#KEN#FLUSH#IGNNE#BS16#BS8#A20M#RDY#BRDY#

DP0DP1DP2DP3

VC

CV

CC

VC

CV

CC

VC

CV

CC

VC

CV

CC

VC

CV

CC

INC

(DX

4VC

C5)

VC

CV

CC

VC

CV

CC

VC

CV

CC

VC

CV

CC

VC

CV

CC

VC

CV

CC

VC

C

M/IO#D/C#

W/R#LOCK#

PLOCK#ADS#

BLAST#BREQHLDAPWTPCD

FERR#

VO

LDE

T(D

X2N

C)

TC

KT

DI

TD

O

SR

ES

ET

INV

(DX

2IN

C)

HIT

M#(

DX

2IN

C)

INC

CA

CH

E#(

DX

2IN

C)

TM

S

ST

PC

LK#

D31D30D29D28D27D26D25D24D23D22D21D20D19D18D17D16D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0

INC

(DX

2NC

)

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

A31A30A29A28A27A26A25A24A23A22A21A20A19A18A17A16A15A14A13A12A11A10

A9A8A7A6A5A4A3A2

BE3#BE2#BE1#BE0#

PCHK#SMI#

WB/WT#(DX2INC)UP#

SMIACT#CLKMUL(DX2INC)

SKT1_NC

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

3-4: 3.3V

CPU_POWER.SCH

1-2: 3.45V


5-6: 2.5VV(out)= 1.235(1+ R/15.0K)

1-2: 5V CPU2-3: OTHERS

Overlap To Make An Oval

J2J3

16

Power Connector(s)

2345 16 2345

= Connector Polarizing Key

POWER CONNECTOR, CPU PULLUPS, CPU POWER SUPPLY, CPU BYPASS CAPACITORS

2.1




Title


Date: Sheet of

BASEDP1DP2

CPUV3

COLLECTORDP3 U6VINDP0

K2VCC

U6FB

DP[0..3]

CPUV2

U6O/P

CPUV1

CPUVCC3

CPUVCC3

RDYOJ

BS8J

BRDYOJ

MIOJ

K2VCC

PWG

CPUVCC3

BOFFJ

FLUSHJBS16J

DP[0..3]

IGNNEJ

CPUVCC3

VCCVCC

-12V -5VVCC

+12V-5V

VCC

VCC

-12V

+12V

VCC

VCC

C110.01uF

+TC9

10uF

R2327.4K, 1%1/8W

1%

R2615.8K, 1%1/8W

1%

J2

PWR-CN6

123456

C340.01uF

+ TC1910uF

R310K

C5

0.1uF

+ TC2010uF

J3

PWR-CN6

123456

R30

100

C8

0.1uF

+TC1810uF

JP2

HEADER 3X1

123

U6

LP2951

1234 5

678O/P

SENSDGND ERR

TAPFB

VIN

R2733

+ TC747uF

+ TC2110uF

R2525.5K, 1%1/8W1%

C350.01uF

+ TC447uF

R510K

C390.1uF

+ TC8100uF

+ TC147uF

JP3

HEADER 3X1

123

R28330

C36

0.1uF

C130.01uF

+TC610uF

C37

0.1uF

C7

0.1uF

R2915.0K, 1%1/8W1%

C90.01uF

C3

0.1uF

C120.01uF

+TC510uF C4

0.1uF

C100.01uF

C6

0.1uF

+ TC1047uF

+

TC310uF

R410K

R6110K

JP4

HEADER 3X2

1 23 45 6

Q5TIP127

3

1

2E

B

C

MT2

MountingHole

1

MT3

MountingHole

1

MT4

MountingHole

1

MT1

MountingHole

1

MT8

MountingHole

1

MT7

MountingHole

1

MT6

MountingHole

1

MT5

MountingHole

1

MT10

MountingHole

1

MT9

MountingHole

1

C166

0.1uF

C167

0.1uF

C168

0.1uF

C169

0.1uF

C165

0.015uF

C164

0.015uF

C163

0.015uF

C162

0.015uF

THERMALLOY ML32

HS1

HEATSINK (TO-220)

1 1

RP2

10K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

CPU_VIS1.SCH

HP Conn.

1 2

19 20

Top View Am486 MICROPROCESSORPCI CUSTOMER DEVELOPMENT PLATFORM

POD 3

POD 4

POD 7

SIGNALS NOT NEEDED BY HP DISASSEMBLER

Using Logic Analyzer Headers:

Clock the analyzer off the clock signal on P41 (POD1)

Qualify the clock using the LA_QUAL signal on P39 (POD2)This qualification signal is asserted (1) when ADS#, RDY# or BRDY# isasserted on the Am486 Microprocessor bus.Thus cycles where valid address or data information is not transferredcan be filtered out when neededSignals are arranged on the LA Headers to work with the HP Disassembler for the 16500 analyzer

BUFFERS AND LOGIC ANALYZER HEADERS FOR CPU SIGNALS

2.1




Title


Date: Sheet of

VGD30VGD28VGD26VGD24VGD22VGD20VGD18VGD16


GD25

GD18

GD3

GD23

GD26

GD29

GD9

GD6

GD24

GD21

GD1

GD31

GD7

GD13

GD11

GD4

GD12

GD5

GD27

GD22

GD15

GD10

GD20

GD14

GD2

GD30

GD0

GD8

GD19

GD17GD16

GD28



VGD[0..31]

VGD31VGD30VGD29VGD28VGD27VGD26VGD25VGD24VGD23VGD22VGD21VGD20VGD19VGD18VGD17VGD16

VGD15VGD14VGD13VGD12VGD11VGD10VGD9VGD8VGD7VGD6VGD5VGD4VGD3VGD2VGD1

GD[0..31]

VSRESETVHITMJ

VPCHKJVSMIJVWB-WT#VSMIACKJVFERRJVAHOLDVNMIVIGNNEJ

VPLOCK#

VGD0

VCACHE#VSTPCLKJ

VINV

FERRJ

WB-WT#SMIACKJ

SMIJPCHKJ

GD[0..31] IGNNEJ

AHOLDNMI

STPCLKJ

HITMJCPURSTPCD_CACH

INVPLOCK#

VCC

VCC

VCC

P47

HP CONN3M:2520-6003UB

23 45 67 89 10

11 1213 1415 1617 1819 20

1 CLK2CLK1 D15D14 D13D12 D11D10 D9D8 D7D6 D5D4 D3D2 D1D0 GND

+5V

P36


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

P38


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

U26

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC

1A11A21A31A42A12A22A32A43A13A23A33A44A14A24A34A4

GNDGNDGNDGND

1Y11Y21Y31Y42Y12Y22Y32Y43Y13Y23Y33Y44Y14Y24Y34Y4

GNDGNDGNDGND

U28

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

U47

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

CPU_VIS2.SCH


POD 1

PLACE THEVENIN TERMINATORNEAR HP LOGIC ANALYZERCONNECTOR

PLACE THEVENINTERMINATOR NEAR’ABT16244BUFFER

POD 2

19

1

HP Conn.

20

Top View

2

POD 5

POD 6

5nsecLACNTL.JED

BUFFERS AND LOGIC ANALYZER HEADERS FOR CPU SIGNALS, AND PAL TO AID LOGIC ANALYZER USE

2.1




Title


Date: Sheet of

VWRJVBRDYOJVRDYOJVADSJ

VINTR

VBRDYOJ

VLOCKJ

VBLAST#

VPCD

VCPUCLK1

VHLDA

VBEJ1

VWRJ

VBEJ3VDCJ

VPWTVHOLD

VCPUCLK

VKENOJ

VZRSTDRV

VBS8J

VADSJ

VBS16J

VEADSJ

VCPUCLK

VBEJ2

VRDYOJ

VFLUSHJ

VBOFFJ

VBREQVA20MJ

VMIOJ

GA24

GA22

GA8

GA30

GA27

GA17

GA15

GA10

GA28

GA20

GA23

GA31

GA26

GA4

GA7

GA9

GA25

GA16

GA13

GA11

GA5

GA19

GA[2..31]

GA12

GA29

GA3

GA6

GA18

GA21

GA2

GA14

VBEJ0

VBRDYOJVADSJVRDYOJ

VGA7

VGA22

VGA4

VGA30

VGA13VGA13

VGA4

VGA24

VGA26

VGA11

VGA3VGA7

VGA15

VGA10

VGA23

VGA12

VGA31

VGA25VGA28

VGA5

VGA29

VGA18

VGA27

VGA10

VGA22

VGA19VGA21

VGA17

VGA15

VGA27

VGA9

VGA16

VGA23

VGA14

VGA21

VGA6

VGA25

VGA14

VGA16

VGA20

VGA11

VGA28

VGA2

VGA24

VGA6

VGA8

VGA18

VGA9

VGA20

VGA19

VGA26

VGA5

VGA30

VGA8

VGA12

VGA2

VGA31

VGA3

VGA[2..31]

VGA17

VGA29

VGA0VGA1

VGA1VGA0

BEJ0

BEJ[0..3]

BEJ1BEJ2BEJ3

VBEJ0VBEJ1VBEJ2VBEJ3

LA_QUAL

LA_QUAL

VWRJVBRDYOJVRDYOJVADSJ

BLAST#

BS8JPCD

BS16J

BREQ

DCJ

WRJ

VCPUCLK1

EADSJ

A20MJ

ZRSTDRV

MIOJ

PWT

BOFFJ

INTR

CPUCLK3

LOCKJ

FLUSHJ

HDLA

KENOJ

GA[2..31]VGA[2..31]

BEJ[0..3]

ADSJBRDYOJRDYOJ

VCC

VCC

VCC

VCC

VCC

VCCR95470

P41


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

U31

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

R94330

U49

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

P39


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

R157470

P40


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

P42


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

U32

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

U80

PALCE22V10_PLCC (5ns)

2

345679

10111213

2726252423212019181716

CLK/I0

I1I2I3I4I5I6I7I8I9I10

I/O9I/O8I/O7I/O6I/O5I/O4I/O3I/O2I/O1I/O0I11

U30

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

R156330

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

M1489.SCH

PARITY


FOR IDE MASTER: DONOT POPULATE

FINALi M1489 INTERFACE

2.1




Title


Date: Sheet of

GA[2..31] PAD[0..31]

TAG[0..7]

GD[0..31]

MA[0..11]

GA2 PAD0GA3 PAD1GA4 PAD2GA5 PAD3GA6 PAD4GA7 PAD5GA8 PAD6GA9 PAD7GA10 PAD8GA11 PAD9GA12 PAD10GA13 PAD11GA14 PAD12GA15 PAD13GA16 PAD14GA17 PAD15GA18 PAD16GA19 PAD17GA20 PAD18GA21 PAD19GA22 PAD20GA23 PAD21GA24 PAD22GA25 PAD23GA26 PAD24GA31 PAD25

PAD26PAD27PAD28PAD29PAD30PAD31

TAG0TAG1TAG2TAG3TAG4TAG5TAG6TAG7

GD

0G

D1

GD

2G

D3

GD

4G

D5

GD

6G

D7

GD

8G

D9

GD

10

GD

11

GD

12

GD

13

GD

14

GD

15

GD

16

GD

17

GD

18

GD

19

GD

20

GD

21

GD

22

GD

23

GD

24

GD

25

GD

26

GD

27

GD

28

GD

29

GD

30

GD

31

MA

0M

A1

MA

2M

A3

MA

4M

A5

MA

6M

A7

MA

8M

A9

MA

10

MA

11

PD1

PD3

PD0

PD2

HD

D15

HD

D8

HD

D4

HD

D2

HDD[0..15]

HD

D13

HD

D6

HD

D10

HD

D14

HD

D11

HD

D7

HD

D1

HD

D12

HD

D9

HD

D0

HD

D5

HD

D3

HDRQ1HDACK1HDRQ0HDACK0

CASJ0CASJ1CASJ2CASJ3RASJ0RASJ1RASJ2RASJ3

MA[0..11]

WEJ

TAGWE J

CWEJ0

COEJ0

TAG[0..7]

PAD[0..31]

FRAMEJC_BEJ3C_BEJ2C_BEJ1C_BEJ0TRDYJIRDYJSTOPJPARDEVSELJ

PERRJ

A3IIA3I

PD0PD1PD2PD3

MDP0MDP1MDP2MDP3

ADSJMIOJDCJWRJRDYOJBRDYOJ

KENOJEADSJ

BEJ0BEJ1BEJ2BEJ3

PCD_CACHLOCKJ

BOFFJ

HITMJ

GA[2..31]

AHOLD

GD[0..31]

HDD[0..15]

HDIOWJHDIORJHDA0HDA1HDA2

HDIO16JHDCSJ0HDCSJ1HDCSJ2HDCSJ3

PCICLK

SMIACKJIBCSTJCMPSTJCMPGNTJ

RSTDRV

HDIORDY

CPUCLK1

CLEAROKJ

HDRQ1HDACK1HDRQ0

HDACK0

VCC

C380.1uF

+TC11

10uFU5

M1489

157158173172171170167165163162164169166161160159174175176177178179180183184181

47464845

186187188189

3940

185190191

42414443

131127129192155152154153

5 6 7 8 9 10 12 11 13 14 15 16 17 18 20 19 21 23 24 25 26 27 29 28 30 31 32 33 35 36 37 38 58 57 56 55 54 51 50 49 62 61 60 59 66 65 64 63 71 70 69 68

1991974138206207123205204203202198195193196200194201151102150103149105148106146107145108143109142110115136116135117134118126124121125119133120132122

208

168

156

128

104

90725334182

144

130

785222111

147

141

137

123

112

140

113

114

139

75767374818279807783848586889193959799101

100

989694928987

67

GA2GA3GA4GA5GA6GA7GA8GA9GA10GA11GA12GA13GA14GA15GA16GA17GA18GA19GA20GA21GA22GA23GA24GA25GA26GA31BEJ0BEJ1BEJ2BEJ3ADSJMIOJDCJWRJRDYOJBRDYJLOCKJPCDHITMJAHOLDBOFFJKENOJEADSJRSTDRVPCICLKCPUCLK1SMIACKJIBCSTJCMPSTJCMPGNTJCLEAROKJ

GD

0G

D1

GD

2G

D3

GD

4G

D5

GD

6G

D7

GD

8G

D9

GD

10G

D11

GD

12G

D13

GD

14G

D15

GD

16G

D17

GD

18G

D19

GD

20G

D21

GD

22G

D23

GD

24G

D25

GD

26G

D27

GD

28G

D29

GD

30G

D31

MA

0M

A1

MA

2M

A3

MA

4M

A5

MA

6M

A7

MA

8M

A9

MA

10M

A11

CA

SJ0

CA

SJ1

CA

SJ2

CA

SJ3

RA

SJ0

RA

SJ1

RA

SJ2

RA

SJ3

CA3CA2

TAGWEJPERRJ

TAG7TAG6TAG5TAG4TAG3TAG2TAG1TAG0

CCSJ3CCSJ2CCSJ1CCSJ0

CWEJ1CWEJ0COEJ1COEJ0PAD31PAD30PAD29PAD28PAD27PAD26PAD25PAD24PAD23PAD22PAD21PAD20PAD19PAD18PAD17PAD16PAD15PAD14PAD13PAD12PAD11PAD10

PAD9PAD8PAD7PAD6PAD5PAD4PAD3PAD2PAD1PAD0

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DV

CC

VC

CV

CC

VC

CV

CC

VC

CF

RA

ME

JC

/BE

J3C

/BE

J2C

/BE

J1C

/BE

J0T

RD

YJ

IRD

YJ

ST

OP

JP

AR

DE

VS

ELJ

HD

CS

J3H

DC

SJ2

HD

CS

J1H

DC

SJ0

HD

IO16

JH

DIO

RD

YH

DA

2H

DA

1H

DA

0H

DIO

RJ

HD

IOW

JH

DD

15H

DD

14H

DD

13H

DD

12H

DD

11H

DD

10H

DD

9H

DD

8H

DD

7H

DD

6H

DD

5H

DD

4H

DD

3H

DD

2H

DD

1H

DD

0

WE

J

R851K

R162 *0R164 *0

R166 *0R168 *0

R163 0R165 0

R167 0R169 0

C1710.1uF

C1720.1uF

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

L2_CACHE.SCH


L2 CACHE TAG AND DATA SRAMS AND BYTE CONTROL; DRAM SERIES TERMINATION AND WE* FANOUT

2.1A




Title


Date: Sheet of

AMA[0..11]

TAG[0..7]

COEJ0CWEJ0

AMA0AMA2AMA4

TAG0

AMA6

TAG1TAG2TAG3TAG4

AMA1

TAG5

AMA3

TAG6

AMA5

TAG7

AMA7

AMA8AMA9AMA10AMA11

MA1

MA0

MA7MA5

MA9

MA3

MA10

MA6

MA2MA4

MA11

MA8

MA[0..11]

ZMWEJ1ZMWEJ0

U1PD

ZMWEJ2

GA16

GA13

GA13

GA11

GA8GA7

GA[2..19]

GA14

GA12

GA9

GA18

GA6GA5 GA5

GA8 GD28

GD25GD9

GA12

GA9

GA11GD7

GA14

GA18

GA16

GA11

A3I

GA4

GA14

GA18

GA6

GD[0..31]

GA17

GD13

GD10

GA18GA17

GA11

GD0

GA10

GD8

GA15

GA14

GA12

GA5

GD12GD29

GA17

GA16

GA11

GA8GA7

GD6

GA[4..18]

GA10

GD26

GA9

A3II

GA17

GD30

GD17

GD11GA6

GA7

GD5

GD31

GD19

GD16GA5

GA13

GD22GD14

GA15

GA6

GA16

GD1

GA10

GA4

GD15

GA15

GA12 GA12

GA16

GA8

GA7

GA4

GD23

GD18

GA18

GD21GD20

GD27

GA15

GA5

GA7

GD3

GD24GA4

GA15

GA9

GA17

GA13 GA13

GA8

GA10GA10

GA4

GA14

GA9

GA6

GD4

GD2

AMA[0..11]

MRASJ0MRASJ1MRASJ2MRASJ3

MCASJ2MCASJ3

MCASJ0MCASJ1

MWEJ 0MWEJ 1

CSJ1

CSJ2

CSJ3

CSJ0

GD[0..31]

COEJ0CWEJ0

CSJ0

CSJ2CSJ3

GA[2..19]

TAG[0..7]

WEJ

MA[0..11]

RASJ1RASJ2RASJ3

CASJ0CASJ1CASJ2CASJ3

WRJ

BEJ3

BEJ2

BEJ1

BEJ0

MWEJ 2

TAGWE J

A3I

A3II

GA[4..18]

CSJ1

RASJ0

VCCVCC VCCVCC

VCCVCC

VCC

VCC VCC

VCC

VCC

U24A

74F08

31

2

U24B

74F08

64

5

U24C

74F08

89

10

U24D

74F08

1112

13

U1

74F245

2 183 174 165 156 147 138 129 11

191

A1 B1A2 B2A3 B3A4 B4A5 B5A6 B6A7 B7A8 B8

GDIR

R1910K

R96470

R8 33R7 33

RN4

33-8B

1357

2468

RN1

33-8B

1357

2468

RN3

33-8B

1357

2468

RN9

33-8B

1357

2468

R124 33

U11

32Kx8-10

109876543

25242123

226

1

2027

22

28

14

1112131516171819

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14

CE#WE#

OE#

VCC

GND

DQ1DQ2DQ3DQ4DQ5DQ6DQ7DQ8

U10

128Kx8-15

16

1314151718192021

222924

32

30

121110

98765

27262325

428

331

21

GND


CE1#WE#OE#

VCC

CE2

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16NC

U7

128Kx8-15

16

1314151718192021

222924

32

30

121110

98765

27262325

428

331

21

GND


CE1#WE#OE#

VCC

CE2


U8

128Kx8-15

16

1314151718192021

222924

32

30

121110

98765

27262325

428

331

21

GND


CE1#WE#OE#

VCC

CE2


U9

128Kx8-15

16

1314151718192021

222924

32

30

121110

98765

27262325

428

331

21

GND


CE1#WE#OE#

VCC

CE2


RN2

33-8B

1357

2468

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

SIMM_SKTS.SCH


SIMM0 SIMM1 SIMM2

SINGLE BANK SINGLE BANK SINGLE BANK

SINGLE BANKDOUBLE BANK

SIMM SOCKET POPULATION CHART

SIMMS CAN BE SINGLE BANK OR DOUBLE BANK, USING1Mbit, 4Mbit, or 16Mbit DRAM CHIPS. POPULATESIMM SOCKETS AS SHOWN IN THIS CHART.

DRAM 72-PIN SIMM SOCKETS

2.1




Title


Date: Sheet of

GD31GD30GD29GD28GD27GD26GD25GD24GD23GD22GD21GD20GD19GD18GD17GD16GD15GD14GD13GD12GD11GD10GD9GD8GD7GD6GD5GD4GD3GD2GD1GD0

MCASJ3MCASJ2 MDP3MCASJ1 MDP2MCASJ0 MDP1

MDP0

AMA10AMA11

GD[0..31]

MCASJ[0..3]

MDP[0..3]

AMA[0..11]

GD31GD30GD29GD28GD27GD26GD25GD24GD23GD22GD21GD20GD19GD18GD17GD16GD15GD14GD13GD12GD11GD10GD9GD8GD7GD6GD5GD4GD3GD2GD1GD0

MCASJ3MCASJ2 MDP3MCASJ1 MDP2MCASJ0 MDP1

MDP0

MDP2

GD26GD27

GD21

GD8

GD16

GD25

GD17

MCASJ0

GD0GD1

GD3

GD5

MDP3

GD6

GD11

GD15

GD2

GD22

MCASJ2

GD10

GD28

MDP1

MCASJ3

GD4

GD29

GD12

GD14

GD30

GD7

MDP0

GD20

GD31

MCASJ1

GD13

GD19

GD9

GD24

GD18

GD23

AMA11AMA10

AMA1

AMA10

AMA0

AMA2AMA3AMA4

AMA8AMA9

AMA5AMA6AMA7

AMA11

GD[0..31]

MCASJ[0..3]

MDP[0..3]MDP[0..3]

MCASJ[0..3]

GD[0..31]AMA[0..11]

AMA[0..11]

AMA2

AMA5

AMA9

AMA0

AMA4

AMA7

AMA3

AMA8

AMA6

AMA1

AMA3

AMA9

AMA5AMA4

AMA2AMA1

AMA8

AMA0

AMA6AMA7

MDP[0..3]

GD[0..31]

MDP[0..3]

GD[0..31]

MDP[0..3]

GD[0..31]

MWEJ 1

AMA[0..11]

MRASJ2

MRASJ1

MCASJ[0..3]

MWEJ 0

MRASJ1

MRASJ0

MCASJ[0..3]MCASJ[0..3]

MRASJ0

AMA[0..11]

MWEJ 2

MRASJ2

AMA[0..11]

VCCVCC

VCC

SIMM1

SIMM72

64626058565452502725232197536563615755535149262422208642

38353736

66484611

696867

344544

414340

10 30 59

1 39 72

70

33

42

47

71291932312818171615141312

IO34IO33IO32IO31IO30IO29IO28IO27IO25IO24IO23IO22IO21IO20IO19IO18IO16IO15IO14IO13IO12IO11IO10

IO9IO7IO6IO5IO4IO3IO2IO1IO0

IO35IO26IO17

IO8

NC4NC3NC2NC1

PRD2PRD1PRD0

RAS2RAS1RAS0

CAS2CAS1CAS0

VC

CV

CC

VC

C

GN

DG

ND

GN

D

PRD3

RAS3

CAS3

WE

A12A11A10A9A8A7A6A5A4A3A2A1A0

SIMM2

SIMM72

64626058565452502725232197536563615755535149262422208642

38353736

66484611

696867

344544

414340

10 30 59

1 39 72

70

33

42

47

71291932312818171615141312



IO35IO26IO17

IO8

NC4NC3NC2NC1

PRD2PRD1PRD0

RAS2RAS1RAS0

CAS2CAS1CAS0

VC

CV

CC

VC

C

GN

DG

ND

GN

D

PRD3

RAS3

CAS3

WE


SIMM0

SIMM72

64626058565452502725232197536563615755535149262422208642

38353736

66484611

696867

344544

414340

10 30 59

1 39 72

70

33

42

47

71291932312818171615141312



IO35IO26IO17

IO8

NC4NC3NC2NC1

PRD2PRD1PRD0

RAS2RAS1RAS0

CAS2CAS1CAS0

VC

CV

CC

VC

C

GN

DG

ND

GN

D

PRD3

RAS3

CAS3

WE


1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

EIP_MEM1.SCH


EIPCNTL.JED REV. 0.9

Makes 2 banks of 1Mx32 Flash ROM appear as 1 bank of 2Mx32 DRAM (70ns, FPM) to M1489 MemoryController. Program M1489 for 2Mx8 (11/10) DRAM chips. MA8 (CPU A22) used as Flash ROMBank Select when RAS3# asserted by M1489 Memory Controller.

PAL

4 ea. 1Mx8Flash ROM Chips

4 ea. 1Mx8Flash ROM Chips

Bank1 Cntl.

Bank2 Cntl.

VA(2:21)

VA(22)

Am486MICROPROCESSOR

A(2:22)

’ABT244

A(22)=0

A(22)=1

CPU Address Bit A(22) Used As Flash Bank Select

PLACE THEVENIN TERMINATORNEAR 22V10 PAL

Supports burst Read Cycles or single-beat Read Cycles

Access as 32-bits wide always

Set M1489 Memory Controller to "Fast" for proper operation, even if installed DRAM is 60ns and can run at the "Fastest" setting

Supports single-beat Write Cycles only; no back-to-back Write Cycles

Compatible with CAS-before-RAS Refresh Cycles only

Limitations and Operation of the EIP Interface:

Flash chip A0 pin tied to Am486 Microprocessor A2 pin, so multiply desired Flash chip address by 4h to find Am486 Microprocessor address needed to access the desired memory cell (ex: Flash Chip AAAh accessed by Am486 Microprocessor at 2AA8h)EIP Flash Array start address moves, depending on how much DRAM is installed (ex: 48MByte DRAM puts EIP start address at 48MB or 3000000h for first bank of Flash ROMs and 3400000h start address for second bank of Flash ROMsUses 29F800T, 55ns devices in "Byte" mode

Accessable from Am486 Microprocessor only; not accessable from PCI Bus Masters

Uses fourth DRAM bank of M1489 Memory Controller

EIP FLASH MEMORY CONTROLLER

2.1




Title


Date: Sheet of

REFCIP

WRCIP

MRASJ3MCASJ3MCASJ2

VWRJ

MCASJ1MCASJ0

VCPUCLK1

EIPCE1#EIPCE2#

EIPOE1#EIPOE2#

EIPWE2#

AMA8

EIPWE1#

VGA22RSTDRV

VCC

R158330

R159470

U60

PALCE22V10_PLCC (5ns)

2

345679

10111213

2726252423212019181716

CLK/I0

I1I2I3I4I5I6I7I8I9I10

I/O9I/O8I/O7I/O6I/O5I/O4I/O3I/O2I/O1I/O0I11

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

EIP_MEM2.SCH


EIP FLASH MEMORY ARRAY

2.1




Title


Date: Sheet of

GD0GD1GD2GD3GD4GD5GD6GD7

RSTDRV#

EIPOE1#EIPCE1#

RSTDRV#

EIPWE1#

GD14

GD9

GD15

GD8

GD13GD12GD11GD10

VGA2VGA2 VGA2

GD18GD19

GD22

GD16

GD23

GD20GD21

GD17GD26GD27

GD30

GD24

GD31

GD28GD29

GD25

VGA2

EIPOE1#EIPCE1#

RSTDRV#

EIPWE1#EIPOE1#EIPCE1#

RSTDRV#

EIPWE1#

GD0GD1GD2GD3GD4GD5GD6GD7

RSTDRV#

EIPWE2#EIPOE2#EIPCE2#

RSTDRV#

GD10GD11

GD14

GD8

GD15

GD12GD13

GD9

VGA2VGA2 VGA2

GD17

GD21GD20

GD23

GD16

GD22

GD19GD18

GD25

GD29GD28

GD31

GD26

GD30

GD27

GD24

VGA2

EIPCE2#EIPOE2#EIPWE2#

RSTDRV#


RSTDRV#

VGA3VGA4VGA5VGA6VGA7VGA8VGA9VGA10VGA11VGA12VGA13VGA14VGA15VGA16VGA17VGA18VGA19VGA20VGA21








VGA[2..31]

GD[0..31]

GD[0..31]

VGA[2..31]

RSTDRV#


EIPOE2#EIPWE2#

EIPCE2#

VCC VCC VCC VCC

VCC VCC VCC VCC

U61

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND

DQ0A0A1A2A3A4A5A6A7A8A9A10

DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

U63

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND


DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

C122

0.1uF

C123

0.1uF

C125

0.1uF

C124

0.1uF

U62

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND


DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

U64

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND


DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

C127

0.1uF

C126

0.1uF

C129

0.1uF

C128

0.1uF

U67

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND


DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

C131

0.1uF

C130

0.1uF

C133

0.1uF

C132

0.1uF

U66

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND


DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

U68

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND


DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

C134

0.1uF

C135

0.1uF

C136

0.1uF

C137

0.1uF

U65

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND


DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

PCI_CONN.SCH


IDSEL = AD19Device #3


PCI PULLUPS AND SLOT CONNECTORS; PCI IDSEL GENERATION

PCIBus INT Slot1 Slot2 Ethernet

INT0#

INT1#

INT2#

INT3#

INTA#

INTB#

INTC#

INTC#

INTD#

INTA#

INTB#

INTC#

INTA#

2.1




Title


Date: Sheet of

PAD0PAD2

PAD4PAD6

PAD9

PAD11PAD13

PAD15

PAD16PAD18

PAD20PAD22

PAD24

PAD26PAD28

PAD30

C_BEJ0

PAR

STOPJ

TRDYJ

FRAMEJ

PGNTJ1

PCIID2

PCIRSTJ

INT1JINT3J

PAD19

PAD20PAD21

FRAMEJ

TRDYJ

STOPJ

INT0J

PAD6

PCIRSTJ

PAD0

PAD26

INT2J

PCIID1

PAD16

PGNTJ0

PAD30

PAD18

PAR

PAD4

PAD2

PAD22

PAD13

PAD20

PAD9

PAD28

PAD11

PAD24

PAD15

C_BEJ0

PAD1

PAD7PAD8

PAD10PAD12

PAD14

PAD17

PAD19PAD21

PAD23

PAD25PAD27

PAD29PAD31

SERRJ

PERRJPLOCKJ

DEVSELJ

IRDYJ

C_BEJ1

C_BEJ2

C_BEJ3

PREQJ0

SERRJ

PREQJ1

PREQJ2

PREQJ0PGNTJ1

PGNTJ2

PGNTJ0

STOPJ

PAR

C_BEJ0

C_BEJ1C_BEJ2

C_BEJ3

FRAMEJ

IRDYJ

TRDYJDEVSELJ

PLOCKJ

INT1JINT3J

INT0JINT2JINT1J

PCICLK1

INT3JPCIID1

PCIID2PCIID3

PAD8

PAD31

PAD17C_BEJ2

IRDYJ

INT2J

PAD27

PAD14

PAD5PAD3

PAD1

PAD19

PAD10

INT0J

PCICLK2

PAD21

DEVSELJ

PAD29

PERRJ

C_BEJ1

PAD7

PREQJ1

C_BEJ3

SERRJ

PAD12

PAD23

PLOCKJ

PAD25

PAD5PAD3

VCC

VCCVCCVCC

-12V +12V-12V+12V

VCC

C4215pF

RN8

33-8B

1357

2468

SLT1

PCI Slot

1234567891011121314151617181920

2221

232425262728293031

626364656667686970717273747576777879

8180

82838485868788899091

61

9293949596979899

100101102103104105106107108109

110111112113114

323334353637383940414243444546474849

505152

115116117118119120

5354555657585960

TRST#+12VTMSTDI+5V

INTA#INTC#

+5VRSRVD

+5V(I/O)RSRVD

GNDGND

RSRVDRST#

+5V(I/O)GNT#GND

RSVRDAD30

AD28+3.3V

AD26GNDAD24

IDSEL+3.3VAD22AD20GNDAD18

TCKGNDTDO+5V+5VINTB#INTD#PRSNT1#RSRVDPRSNT2#GNDGNDRSRVDGNDCLKGNDREQ#+5V(I/O)

AD29AD31

GNDAD27AD25+3.3VC/BE3#AD23GNDAD21AD19+3.3V

-12V

AD17C/BE2#GNDIRDY#+3.3VDEVSEL#GNDLOCK#PERR#+3.3VSERR#+3.3VC/BE1#AD14GNDAD12AD10GND

AD8AD7+3.3VAD5AD3

AD16+3.3V

FRAME#GND

TRDY#GND

STOP#+3.3V

SDONESBO#GNDPAR

AD15+3.3VAD13AD11GNDAD9

C/BE0#+3.3V

AD6

GNDAD1+5V(I/O)ACK64#+5V+5V

AD4GNDAD2AD0

+5V(I/O)REQ64#

+5V+5V

SLT2

PCI Slot

1234567891011121314151617181920

2221

232425262728293031

626364656667686970717273747576777879

8180

82838485868788899091

61

9293949596979899

100101102103104105106107108109

110111112113114

323334353637383940414243444546474849

505152

115116117118119120

5354555657585960

TRST#+12VTMSTDI+5V

INTA#INTC#

+5VRSRVD

+5V(I/O)RSRVD

GNDGND

RSRVDRST#

+5V(I/O)GNT#GND

RSVRDAD30

AD28+3.3V

AD26GNDAD24

IDSEL+3.3VAD22AD20GNDAD18

TCKGNDTDO+5V+5VINTB#INTD#PRSNT1#RSRVDPRSNT2#GNDGNDRSRVDGNDCLKGNDREQ#+5V(I/O)

AD29AD31

GNDAD27AD25+3.3VC/BE3#AD23GNDAD21AD19+3.3V

-12V

AD17C/BE2#GNDIRDY#+3.3VDEVSEL#GNDLOCK#PERR#+3.3VSERR#+3.3VC/BE1#AD14GNDAD12AD10GND

AD8AD7+3.3VAD5AD3

AD16+3.3V

FRAME#GND

TRDY#GND

STOP#+3.3V

SDONESBO#GNDPAR

AD15+3.3VAD13AD11GNDAD9

C/BE0#+3.3V

AD6

GNDAD1+5V(I/O)ACK64#+5V+5V

AD4GNDAD2AD0

+5V(I/O)REQ64#

+5V+5V

RP10

4.7K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP11

4.7K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP9

4.7K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

HP Conn.

1 2

19 20

Top View

PCI_VIS.SCH

PLACE NEAR PCI0 CONNECTOR

PLACE NEAR PCI1 CONNECTOR

PLACE NEAR Am79C972 E/NETCHIP

PLACE THEVENINTERMINATOR NEAR’ABT16244 BUFFER


PLACE THEVENINTERMINATOR NEARHP LOGIC ANALYZERCONNECTOR

BUFFERS AND LOGIC ANALYZER HEADERS FOR PCI BUS

2.1




Title


Date: Sheet of

PAD18

PAD6

PAD23

PAD16

PAD5PAD4

PAD30

PAD3PAD2PAD1

PAD19

PAD31

PAD21

PAD0

PAD17

PAD9

PAD29

PAD10

PAD28

PAD8

PAD13

PAD24

PAD22

PAD11

PAD15

PAD25

PAD14

PAD26PAD27

PAD20

PAD12

PAD7

VPAD19

VPAD11

VPAD9

VPAD31

VPAD2

VPAD17

VPAD12

VPAD12 VPAD11

VPAD30

VPAD3

VPAD29VPAD28

VPAD25

VPAD27VPAD26

VPAD6

VPAD0

VPAD24VPAD25VPAD23

VPAD8

VPAD1

VPAD0

VPAD22 VPAD21

VPAD7

VPAD10

VPAD5VPAD4

VPAD27

VPAD6

VPAD15

VPAD9

VPAD14

VPAD1

VPAD20

VPAD3

VPAD10

VPAD18

VPAD15

VPAD19

VPAD13

VPAD17

VPAD4

VPAD18

VPAD13

VPAD7

VPAD14

VPAD5

VPAD16

VPAD29VPAD30VPAD31

VPAD2

VPAD23

VPAD8

VPAD24

VPAD28

VPAD22VPAD21VPAD20

VPAD16

VPAD26

VFRAMEJVIRDYJVTRDYJVDEVSELJVPCICLKVINT0JVINT1JVINT2JVINT3JVPCIRSTJVSTOPJVPAR

VPLOCKJVPERRJVSERRJ

VC_BEJ1VC_BEJ0

VC_BEJ2VC_BEJ3

VFRAMEJVIRDYJVTRDYJ

VDEVSELJ

VC_BEJ1VC_BEJ0VC_BEJ2

VC_BEJ3

VINT1JVINT2J

VSERRJ VPLOCKJVPERRJVPAR

VINT0J

VINT3J

VPCIRSTJ

VSTOPJ

VPAD[0..31]

VPCICLK

STOPJPCIRSTJ

TRDYJ

INT3J

C_BEJ3

INT1J

FRAMEJ

PAR

PAD[0..31]

PGNTJ1

PGNTJ0

C_BEJ1

IRDYJ

INT2J

INT0JPCICLK

DEVSELJ

PERRJ

C_BEJ2

PREQJ1

C_BEJ0

SERRJ

PLOCKJ

PREQJ0

PREQJ2PGNTJ2

VCC

VCC

VCC

VCC

VCC

U42

74ABT244

2468

11131517

119

181614129753

1A11A21A31A42A12A22A32A4

1G2G

1Y11Y21Y31Y42Y12Y22Y32Y4

R97330

R98470

P46


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

P43


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

P44


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

P45


23 45 67 89 10

11 1213 1415 1617 1819 20


+5V

JP29

HEADER 3X1

123

JP30

HEADER 3X1

123

JP31

HEADER 3X1

123

U36

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

U38

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

U40

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

R160330

R161470

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

ENET1.SCH


PLACE INPUT AND OUTPUT FILTER CAPS AS CLOSE AS POSSIBLE TO REGULATOR


Set CSR116 bit 0 to "1" for proper PHY_RST operation

Spare "AND" Gates

Defaults to "1"

For ’972 E/net Config. For User NV Data

ETHERNET CONTROLLER, BYPASS CAPACITORS AND POWER SUPPLY FOR ETHERNET CONTROLLER, AND SERIAL EEPROMS

2.1




Title


Date: Sheet of

PAD0PAD1PAD2PAD3PAD4PAD5PAD6PAD7PAD8PAD9PAD10PAD11PAD12PAD13PAD14PAD15PAD16PAD17PAD18PAD19PAD20PAD21PAD22PAD23PAD24PAD25PAD26PAD27PAD28PAD29PAD30PAD31

EEDO

EN

ET

PG

EECS

ENETEBCLK

CLKCTR#

EECSEECS_1K

EECS_4K

EESKEEDI

EECS_4KEECS_1K

PAR

STOPJ

PGNTJ2

INT2J

FRAMEJ

PCIRSTJ

C_BEJ2

PCICLK3

SERRJ

PREQJ2

C_BEJ1

PERRJ

DEVSELJ

C_BEJ3

PAD[0..31]

C_BEJ0

PCIID3

IRDYJTRDYJ

PHY_RSTMDIOMDCERXD3ERXD2ERXD1ERXD0RX_DVRX_CLK_RXCLK

TX_EN_TXEN

ETXD0_TXDAT

TX_CLK_TXCLKTX_ER

ETXD3

ETXD1

COL_CLSNCRS_RXEN

CLKCTR

RX_ER_RXDAT

ETXD2

VCC3

VCC VCC3

VCC3

VCC3

VCC

VCC3

VCC3VCC3

VCC3

VCC3

VCC VCC

C88

0.1uF

+ C862.2uF

+ C8710uF

C90

0.1uF

C91

0.1uF

C92

0.1uF

C93

0.1uF

C94

0.1uF

C95

0.1uF

C89

0.1uF

C96

0.01uF

C97

0.01uF

C79

0.1uF

+ C782.2uF

C81

0.1uF

C82

0.1uF

C83

0.01uF

C80

0.1uF

R1051K

R1031K

R10410K

R1064.7K

+ C8410uF

C85

1uF

U54

NM93C46N

12 6

8

5

3 4

7

CSSK ORG

VCC

GND

DI DO

NC

U53

MC33269DT-3.3

3 4

1

VIN VOUT

GND_ADJ

U82B

74F08

4

56

U82C

74F08

9

108

U82D

74F08

12

1311

U83A

74F14

1 2

U81

NM93C66M8

12 6

8

5

3 4

7

CSSK ORG

VCC

GND

DI DO

NC

U82A

74F08

1

23

U51

Am79C972 (PQR160)

55545250494746444140393736343331141210

97642

159158156154153152151148

423015

160

11718202223252628

142143

144

146145

134

135

139

137

16 32 56 72 90 110

130

150

3 11 19 27 35 43 51 62 74 84 95 106

117

127

138

149

157

141

133

132

131

13 21 29 38 45 53 147

155

65 77 88 101

113

124

136

8 24 48 64 100

140

5

122123125120121126128

119118116115114112111109108107105104103

102999897

9694

7170696867666361

9392918987868583

7375767879808182

57

5958

60

129

AD0AD1AD2AD3AD4AD5AD6AD7AD8AD9AD10AD11AD12AD13AD14AD15AD16AD17AD18AD19AD20AD21AD22AD23AD24AD25AD26AD27AD28AD29AD30AD31

C_BE0#C_BE1#C_BE2#C_BE3#

IDSELFRAME#IRDY#TRDY#DEVSEL#STOP#PERR#SERR#PARINTA#PCIRST#

PCICLK

PCIREQ#PCIGNT#

TC

KT

MS

TD

IT

DO

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

VS

SB

PG

RW

UW

UM

I#P

ME

#

VD

D_P

CI

VD

D_P

CI

VD

D_P

CI

VD

D_P

CI

VD

D_P

CI

VD

D_P

CI

VD

D_P

CI

VD

D_P

CI

VD

DB

VD

DB

VD

DB

VD

DB

VD

DB

VD

DB

VD

DB

VD

DV

DD

VD

DV

DD

VD

DV

DD

VD

D_P

CI

TBC_INTBC_EN

LED2#/SRDCLK/MIIRXFRTGEEEDO/LED3#/SRD/MIIRXFRTGD

EEDI/LED0#EESK/LED1#/SFBD

EECS

PHY_RSTMDIOMDC

RXD3RXD2RXD1RXD0

RX_DVRX_CLK/RXCLKRX_ER/RXDAT

TX_ERTX_CLK/TXCLK

TX_EN/TXEN

TXD0/TXDATTXD1TXD2TXD3

COL/CLSNCRS/RXEN

EBUA_EBA7EBUA_EBA6EBUA_EBA5EBUA_EBA4EBUA_EBA3EBUA_EBA2EBUA_EBA1EBUA_EBA0

EBD0EBD1EBD2EBD3EBD4EBD5EBD6EBD7

EBDA8EBDA9

EBDA10EBDA11EBDA12EBDA13EBDA14EBDA15

EROMCS#

AS_EBOE#EBWE#

EBCLK

EAR#

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

ENET2.SCH


1 2

34ECLIPTEK ECSMA-25.00MTR

ECLIPTEK ECSMA-25.00MTR

12

34

56

78

119

1012

EDGE OF BOARD

PINS: 1-8NP MOUNTING HOLES: 9, 10SHIELD MOUNTING HOLES:11, 12

RJ45 PINOUT, COMPONENT SIDE VIEW

LINK SPEED TX DATA RX DATALUMEX SOT23 LED

1 2

3

Red Green Green

ETHERNET PHY CHIP, ETHERNET CONNECTOR, AND LEDS

2.1




Title


Date: Sheet of

MFV0

R11

7NE

T

PHY_X I

ENET_R1

ENET_RX+ENET_RX-RXCT

TXCT

ENET_TX+ENET_TX-

PHY_XO

ENET_R2

ENET_C AP

ENET_RD-

ENET_RD+

RD

_CT

ENET_TD+

ENET_TD-

ENET_TREF

ENET_RE S

AVCC

AGND

RBIAS

AAVCC

AAGND

LEDS# LEDT# LEDR#

LEDS#

LEDT#LEDR#

RLE

DS

#

RLE

DT

#

RLE

DR

#

PHY_RST

TX_CLK_TXCLK

COL_CLSN

ETXD2ETXD1

ETXD3

TX_ER

ETXD0_TXDAT

TX_EN_TXEN

RX_ER_RXDATRX_CLK_RXCLK

RX_DV

ERXD0ERXD1ERXD2ERXD3

MDC

MDIOCRS_RXEN

VCC3

VCC

VCC

VCC

VCC

L5

FB

1 2

R1151.00K, 1%

R1141.00K, 1%

R1171.00K, 1%

T1

PE68515

123

765

141516 10

1112

RD+RD-RD_CT

RX+RX-

RX_CT

TD_CTTD+TD- TX-

TX+TX_CT

R11175, 1%

R11075, 1%

R11375, 1%

C98

33pF

C99

33pF

+ C11010uF

C1110.1uF

C1120.1uF

R107100, 1%

R10849.9, 1%

R10949.9, 1%

555153-1

J10

AMP RJ45A

12345678

1112

12345678

GND1GND2

R11275, 1%

C101

0.001uF, 2KV (MIN.)

C1000.1uF

C1050.1uF

L4

FB

1 2

+ C10610uF

+ C10710uF

C1030.01uF

C1020.01uF

R11622K, 1% C104

0.01uF

L7

FB

1 2

L6

FB

1 2

+ C10810uF

C1090.01uF

U52

LXT970QC

12 11

9

19

24

37

53

22

26

31

43 52 10

56

5960616263

575864515554

5049484746

144

245

1315

345678

33143416

3839404142

323536

2827

1718

25

21

20

30

29

23

XI

XO

VCCD

VCCT

VCCA

VCCR

VCCIO

GNDT

GNDA

GNDR

GN

DD

GN

DIO

TE

ST

TX_ER

TXD0TXD1TXD2TXD3TXD4

TX_CLKTX_ENCOLRX_DVRX_ERRX_CLK

RXD0RXD1RXD2RXD3RXD4

CRSMDIOFDS/MDINTMDC

FDEMDDISTRSTEMF4MF3MF2MF1MF0CFG1CFG0PWRDWNRESET#

LEDS#LEDC#LEDL#LEDT#LEDR#

NC1NC2NC3

FIBINFIBIP

FIBOPFIBON

RBIAS

TPOP

TREF

TPIN

TPIP

TPON

Y5

25MHz_SMD

12 3

4

R149270

R150270

R151270

D10

LED (SOT23)

312

D11

LED (SOT23)

312

D12

LED (SOT23)

312

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

HD ACTIVE LED

HD ACTIVE LED

IDE HARD DISK 1

IDE HARD DISK 2

IDE.SCH


LUMEX LED (SOT23)

2

13 CATH

Top View

Byass Capacitors For The Board

Place one bypass capacitor near each chip Vcc pin, except:’ABT chips get one on each side near end Vcc pinsQFP chips get one on each side by central Vcc pin

Distribute Tantalum capacitors around the board

IDE INTERFACE AND BOARD BYPASS CAPACITORS

2.1




Title


Date: Sheet of

HDD[0..15]

HDD7 HDD8HDD6 HDD9HDD5 HDD10HDD4 HDD11HDD3 HDD12HDD2 HDD15HDD13 HDD14HDD1 HDD0



HDCSJ1HDCSJ0HDCSJ3HDCSJ2

HDA0HDA2HDA1

HDIO16J

HDIORJ

HDIOWJ

HDIORDY

J5LE

DJ7

LED

J7LEDR

J5LEDR

HDIO16J

HDA2HDCSJ1

HDIO16J

HDA2

HDD[0..15]

HDCSJ3

HDIORJHDIOWJ

HDA1HDA0

HDCSJ0

SYSRSTJ

HDIORJHDIOWJ

HDA1HDA0

HDCSJ2

HDIORDY

HDIORDY

IRQ14

IRQ15

HDRQ0

HDACK0

HDRQ1

HDACK1

SYSRSTJ

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

BC15

0.1uF

BC16

0.1uF

BC17

0.1uF

BC18

0.1uF

BC19

0.1uF

BC21

0.1uF

BC22

0.1uF

BC23

0.1uF

BC24

0.1uF

BC25

0.1uF

BC26

0.1uF

BC27

0.1uF

BC28

0.1uF

BC20

0.1uF

J7

CNN-40C

13579111315171921232527293133353739

2468

10121416182022242628303234363840

J5

CNN-40C

13579111315171921232527293133353739

2468

10121416182022242628303234363840

R62

270

R63

270

R21

1KR20

1KR90

4.7k

BC3

0.1uF

BC4

0.1uF

BC5

0.1uF

BC6

0.1uF

BC7

0.1uF

BC2

0.1uF

BC8

0.1uF

BC9

0.1uF

BC10

0.1uF

BC11

0.1uF

BC12

0.1uF

BC13

0.1uF

BC1

0.1uF

+ TC1210uF

+ TC210uF

BC14

0.1uF

+ TC2410uF

+ TC2510uF

BC29

0.1uF

BC30

0.1uF

BC31

0.1uF

BC32

0.1uF

BC33

0.1uF

BC35

0.1uF

BC36

0.1uF

BC37

0.1uF

BC38

0.1uF

BC39

0.1uF

BC40

0.1uF

BC41

0.1uF

BC42

0.1uF

BC34

0.1uF

BC43

0.1uF

BC44

0.1uF

BC45

0.1uF

RP6

10K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP5

10K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP7

10K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

BC46

0.1uF

BC47

0.1uF

D13LED (SOT23)

312

D14LED (SOT23)

312

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

M1487.SCH

ON: DISABLE INTERNAL RTCOFF: ENABLE INTERNAL RTC

OFF: 1X CPU-TO-PCI BUS FREQUENCYON: 2X CPU-TO-PCI BUS FREQUENCY


ECLIPTEKECPSM29T-32.768KTR

1 2

34ECLIPTEK ECPSM29T-32.768KTR

(COMPONENT SIDE VIEW)

DISABLES INTERNAL KBC

*=Do Not Populate

FINALi M1487 INTERFACE

2.1




Title


Date: Sheet of

SD[0..15]

SA[0..19]

LA[17..23]

GA[2..17]

SD0SD1SD2SD3SD4SD5SD6SD7SD8SD9SD10SD11SD12SD13SD14SD15

SA0SA1SA2SA3SA4SA5SA6SA7SA8SA9SA10SA11SA12

OSCI SA13OSCO SA14

SA15SA16SA17SA18SA19

LA17LA18LA19LA20LA21LA22LA23

GA

2G

A3

GA

4G

A5

GA

6G

A7

GA

8G

A9

GA

10

GA

11

GA

12

GA

13

GA

14

GA

15

GA

16

GA

17

SYSRST

JRESET

RRDRV#

LA[17..23]

DRQ1DRQ2DRQ3

DRQ6DRQ7

SD[0..15]

SA[0..19]

IOCHKJTCMASTERJZIOWJZIORJ

ZAENZSBHEJZREFSHJ

N0WSJIOCHRDYJZSMEMW JZSMEMRJZMWJZMRJMEM16JIO16J

ENRTC

CMPSTJ ZBALE

CMPSTJ

CLEAROKJXBUSCSJ

CMPGNTJ

DRQ5

DRQ0

IRQ15IRQ14IRQ12IRQ11IRQ10

IRQ9

IRQ8J

IRQ7IRQ6IRQ5IRQ4IRQ3IRQ1

DACK1DACK2DACK3

DACK6DACK7

CPURST

M1487NMISMIJ

PCICLK

OSCATCLKPWGPREQJ0PREQJ1PREQJ2PGNTJ0PGNTJ1PGNTJ2FRAMEJIRDYJINT0JINT1JINT2JINT3J

RTCAS

SPEAKTURBOEXTSMI

ENRTC

VBAT

CMPGNTJCMPSTJ

IBCSTJ

GA[2..17]

CLKCTR

PCIRSTJ

STPCLKJ

DACK5

DACK0

ZRSTDRV

RSTDRV#

CLEAROKJ

A20MJ

CPUCLK2

FERRJINTR

IGNNEJ

XBUSCSJ

ENRTC

IBCSTJ

SYSRSTJ

VCC

VCC

U15A

74F04

12

U15B

74F04

34

U15D

74F04

98

C5310pF C54

10pF

+

TC17

10uFU21

M1487

612063222316171819214681497013505354

515547485759565873781415656474757271

44 43 45 42 39 38 24 25 26 27 29 31 33 34 32 28 30 35 36 37 110

111

67 79 66 76 139

2 68 69 77 82 95 129

158

159

140

1151161171181411421431451538914614714814915015115215415515615747122123124125126127121119130131132133134135136137

160

138

128

98624110144

120

8060401109

107

105

859187103

108

106

104

849486102

100

101

999796838889909293113

52

56

112113114

12

CPUCLKCPURSTSYSRSTA20MJINTRFERRJIGNNEJNMISMIJSTPCLKJPCICLKSYSRSTJOSCATCLKPWGPREQJ0PREQJ1PREQJ2

PGNTJ1PGNTJ2FARMEJIRDYJINT0JINT1JINT2JINT3JXBUSCSJRTCASOSC1OSC2SPEAKERTURBOEXTSMISPLEDCLKCTRENRTC

CLE

AR

OK

JC

MP

GN

TJ

CM

PS

TJ

IBC

ST

JH

A2

HA

3H

A4

HA

5H

A6

HA

7H

A8

HA

9H

A10

HA

11H

A12

HA

13H

A14

HA

15H

A16

HA

17IO

CS

16J

ME

MC

S16

JM

EM

RJ

ME

MW

JS

ME

MR

JS

ME

MW

JIO

CH

RD

YO

WA

ITJ

BA

LEIO

RJ

IOW

JM

AS

TE

RJ

TC

IOC

HC

KJ

RE

FR

ES

HJ

SB

HE

JA

EN

LA20LA19LA18LA17SA19SA18SA17SA16SA15SA14SA13SA12SA11SA10

SA9SA8SA7SA6SA5SA4SA3SA2SA1SA0

SD15SD14SD13SD12SD11SD10

SD9SD8SD7SD6SD5SD4SD3SD2SD1SD0

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DV

CC

VC

CV

CC

VC

CV

CC

VC

CD

RE

Q7

DR

EQ

6D

RE

Q5

DR

EQ

3D

RE

Q2

DR

EQ

1D

RE

Q0

DA

CK

J7D

AC

KJ6

DA

CK

J5D

AC

KJ3

DA

CK

J2D

AC

KJ1

DA

CK

J0IR

Q15

IRQ

14IR

Q12

IRQ

11IR

Q10

IRQ

9IR

Q7

IRQ

6IR

Q5

IRQ

4IR

Q3

IRQ

1IR

Q8J

PGNTJ0

KBCLKKBDATA

LA23LA22LA21

VBAT

R7910M

R59

*1K

R58

1K

U15C

74F04

56R147

22

Y4

32.768KHz_SMD

123

4

R170

1K

C50

0.1uF

C173

0.1uF

C174

0.1uF

RP12

10K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

ROM_MISC.SCH


12

Battery Socket

C&K SWITCH

2

4

Reset, SMI Switches

1

3

Press Switch To Assert SMI

ROM DataTransferred onFINALi LinkBus

TURBO SWITCH FUNCTION

3

21MMBD4148 (SOT23)MMBT3904 (SOT23)MMBT3906 (SOT23)

Press Switch To Assert NMI

Press Switch To Assert RESET

(TO Am486 CPU)

(FROM M1487)

SPARE ’F14 GATES

Jumpers to allow multiple 128K BIOSimages in the same Flash ROM chipand/or non-PC applications that can usemore than 128Kx8 BIOS ROM

FINALi only supports 1MBit Flash ROM chip(128Kx8 worth of address space) for legacy,desktop PC applications

Jumper for external RESET# pushbutton

BIOS ROM, ISA SIGNAL SERIES TERMINATION; BATTERY AND SPEAKER CIRCUITS; RESET, SMI, AND NMI PUSHBUTTONS

2.1




Title


Date: Sheet of

SA[0..19]

SA0SA1SA2SA3SA4SA5SA6SA7SA8SA9SA10SA11SA12SA13SA14SA15SA16

CSPEAK CRSPEAK

RRSPEAK RCSPEAK

GA2GA3GA4GA5GA6GA7GA8GA9

GA[2..9]

BT1P

Q1R

Q2RR

RREXTSMI

Q2R

QQ

1RQ

SW2NET EXTNMI# EXTNMI

RRPWG

ROM_A17ROM_A18

SA18

SA17

ZAEN

ZSMEMW J

ZIOWJ

ZREFSHJ

BALE

SMEMRJIORJ

MRDJZMWJ

ZSBHEJZRSTDRV

ATCLK

GA[2..9]

VBAT

SA[0..19]

XBUSCSJMRDJ

ZBALE

ZSMEMRJZIORJ

AEN

SMEMWJ

IOWJ

MWTJ

REFRESHJZMRJ

SBHEJRSTDRV

SPEAK

ATCLKO

SMEMWJ

TURBO

EXTSMI

PWG

M1487NMI

NMI

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

C5522pF

C52

0.1uF

R47

0

R7610K

R7710K

R6810K

R81

33

R80

470

R70*2.2K

R71470

R4851K

R5010K

R4910K

RN11

33-8B

1357

2468

RN10

33-8B

1357

2468

RN12

33-8BCTS 743 08-3 330 J TR

1357

2468

+ TC1310uF

BT1

3V Coincell (socket)KEYSTONE 103 or 106

12

LS1

SPEAKER

R5210K

R140100

SW3PBNO

1 3

+ TC2310uF

D1

MMBD4148 (SOT23 )

1 3

D9MMBD4148 (SOT2 3)

13

D6MMBD4148 (SOT23 )

13

Q4MMBT3904 (SOT23)

12

3

Q2MMBT3904 (SOT23)

12

3

Q1MMBT3906 (SOT23)

1

2 3

R341K

R139100

SW2PBNO

1 3

+ TC2210uF

D8MMBD4148 (SOT2 3)

13

U83B

74F14

3 4U77A

74F32

1

23

+ TC1610uF

R6410K

R65100

SW1PBNO

1 3

D5MMBD4148 (SOT23 )

13

RP1810K-10P

23456789

1

10

O2

O3

O4

O5

O6

O7

O8

O9

C

O10

U83C

74F14

5 6

U83D

74F14

9 8

U83F

74F14

13 12

U83E

74F14

11 10

JP34

HEADER 2X1

12

U14

Am29F010-90

2224

1

31

30

32

16

121110

98765

27262325

42829

32

1314151718192021

CEOE

A18

WR

A17

VCC

GND

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7 R177

1KJP32

HEADER 3X1

123

R1781K

JP33

HEADER 3X1

123

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

CLOCK.SCH

INSTALL PULLUPRESISTOR AND REMOVE0-OHM RESISTOR FOR25MHz CPU AND PCI BUS

PLACE SERIES TERMINATORS ASCLOSE TO U17 AS POSSIBLE

PCICLK AND CPUCLK3 HAVE MULTIPLE LOADS AND ARETHEVENIN TERMINATED AT THE END OF THE NET


1 2

34ECLIPTEK ECSMAT-14.318MTR


CLOCK GENERATOR

2.1




Title


Date: Sheet of

CLKAVDD2

CLKAVDD1

CLKPU1

CLKPU2

CLKAVSS

CLKLF1

B1OUT1B1OUT2B1OUT3B1OUT4

B2OUT1B2OUT2B2OUT3

RROSC1RROSCROSCC

B2OUT4

CLKOSCOUTC

LKO

SC

IN

MCLK2

OSC

OSC1

PCICLK1PCICLK2

CPUCLK2CPUCLK1

CPUCLK3

PCICLK3PCICLK

CPUCLK

VCC

VCC

VCCVCC

VCC

U15E

74F04

11 10

C480.1uF

C470.1uF C41

15pF

C43

15pF

C46

15pF

C33

15pF

C56

15pF

C57

15pF

C6015pF

C66

15pF

+ TC1510uF

+TC14

10uF

R42

10

R924.7KR93

*4.7K

R31 10R33 0

R22 10R35 10

R57 0

R36 10R38 10

R54

10

R394.7K

R41

10

R99 10

U17

IMI SC464

1

2

18

111017

15

28

327

2425

14

12

13

16

26194

5689

20212223

7

OSCin

OSCout

ST#

S0S1S2

DOZE#

14.318

B1inB2in

MCLK1MCLK2

AVDD

AVSS

LF1

VDD2

VSS3VSS2VSS1

B1out1B1out2B1out3B1out4

B2out1B2out2B2out3B2out4

VDD1

C650.1uF

Y2

14.318MHz_SMD

12 3

4

C154

15pF

C155

10pF

C161

10pF

L3

FB

C1700.1uF

R1760

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

ISA_CONN.SCH


ISA BUS CONNECTORS AND PULLUPS

2.1




Title


Date: Sheet of



LA[17..23]

SD15

SD9

SD0SD1 SD14

SD4

SD12

SD8

SD[0..15]

SD13SD2

SD8

SD3

SD10

SD5

SD7

SD15SD14

SD12

SD6

SD9

SD3

SD13

SD4

SD7

SD2

SD10

SD11

SD6

SD11

SD5

SD1SD0

SD[0..15]

SA2

SA13SA14

SA7

SA0

SA8

SA3

SA1

SA16

SA13

SA4

SA6

SA10

SA3

SA15

SA11

SA5

SA6

SA9

SA14

SA9

SA11

SA2

SA16

SA10

SA18

SA0

SA17

SA4

SA15

SA19

SA1

SA12

SA7SA8

SA19

SA12

SA18

SA5

SA17


SD8

SD12

SD4

SD1SD2

SD7

SD10SD11

SD0

SD15

SD9

SD13

SD5

SD3

SD14

SD6

SA14

SA10

SA5

SA16

SA12

SA18

SA15

SA4

SA19

SA13

SA9

SA17

SA2

SA6

SA8

SA11

SA0SA1

SA7

SA3

SA

[0..1

9]

IOCHKJ

AENIOCHRDYJ

SBHEJ

MWTJMRDJ

IRQ3

IRQ6

IRQ4IRQ5

IOCHKJ

IOCHRDYJAEN

MRDJMWTJ

SBHEJ

BALE

OSC1

SMEMWJ

DRQ3

IRQ6

DACK3

DRQ2

IORJ

IRQ7

IRQ3

N0WSJ

TC

IRQ9

IOWJ

REFRESHJ

IRQ4

RSTDRV

DACK2

SMEMRJ

DRQ1

IRQ5

DACK1

MASTERJ

DACK7

DACK6

DACK5

DACK0

IO16JMEM16J

DRQ6

DRQ5

DRQ0


DRQ7

IRQ15IRQ14

IRQ9

IRQ7IRQ8J

IRQ12

IRQ10IRQ11

SD[0..15]

LA[17..23]

MASTERJREFRESHJ

N0WSJ

MEM16J

ATCLKO

IRQ9

DRQ2

SMEMWJSMEMRJ

IOWJIORJ

DRQ3

DRQ1REFRESHJ


BALE

RSTDRV

N0WSJ

DACK3

DACK1

DACK2TC

OSC1

ATCLKO

DACK7

DACK6

DACK5

DACK0

IO16JMEM16J

MASTERJ

DRQ7

DRQ6

DRQ5

DRQ0


SA[0..19]

IO16J

-5V VCC+12V -12V

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

-12V VCC-5V+12V

C6447pF

C5847pF

R75

4.7K

R781K

SL1

ISA AT ConnectorAMP 645169-3

50515253545556575859606162636465666768697071727374757677787980

12345678910111213141516171819202122232425262728293031

323334353637383940414243444546474849

818283848586878889909192939495969798

GNDRESDRV+5VIRQ9-5VDREQ2-12V-0WS+12VGND-SMEMW-SMEMR-IOW-IOR-DACK3DREQ3-DACK1DREQ1-REFSHSYSCLKIRQ7IRQ6IRQ5IRQ4IRQ3-DACK2TCALE+5V14.3MHZGND

-IOCHCKD7D6D5D4D3D2D1D0

IOCHRDYAENA19A18A17A16A15A14A13A12A11A10

A9A8A7A6A5A4A3A2A1A0

-SBHELA23LA22LA21LA20LA19LA18LA17

-MEMR-MEMW

SD8SD9


-MEMCS16-IOCS16IRQ10IRQ11IRQ12IRQ15IRQ14-DACK0DREQ0-DACK5DREQ5-DACK6DREQ6-DACK7DREQ7+5V-MASTERGND

SL2

ISA AT ConnectorAMP 645169-3

50515253545556575859606162636465666768697071727374757677787980

12345678910111213141516171819202122232425262728293031

323334353637383940414243444546474849

818283848586878889909192939495969798

GNDRESDRV+5VIRQ9-5VDREQ2-12V-0WS+12VGND-SMEMW-SMEMR-IOW-IOR-DACK3DREQ3-DACK1DREQ1-REFSHSYSCLKIRQ7IRQ6IRQ5IRQ4IRQ3-DACK2TCALE+5V14.3MHZGND

-IOCHCKD7D6D5D4D3D2D1D0

IOCHRDYAENA19A18A17A16A15A14A13A12A11A10

A9A8A7A6A5A4A3A2A1A0

-SBHELA23LA22LA21LA20LA19LA18LA17

-MEMR-MEMW

SD8SD9


-MEMCS16-IOCS16IRQ10IRQ11IRQ12IRQ15IRQ14-DACK0DREQ0-DACK5DREQ5-DACK6DREQ6-DACK7DREQ7+5V-MASTERGND

D7MMBD4148 (SOT23 )

13

RP15

4.7K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP13

330-8P

2345678

1O2O3O4O5O6O7O8

C

RP1910K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP1610K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP1710K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP14

10K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP21

4.7K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

RP20

10K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

SUPER_I/O.SCH

SuperI/O IrDA Port


9

7

TFDS6000

1

6

43

8

2

10

COMPONENT SIDE VIEW

5

1 2

34ECLIPTEK ECSMA-25.00MTR KINGBRIGHT SOT23 LED

12

3

(COMPONENT SIDE VIEW) (COMPONENT SIDE VIEW)

SUPER I/O CHIP, IrDA INTERFACE, FLOPPY DISK INTERFACE, SERIAL PORT ACTIVITY LEDS

2.1




Title


Date: Sheet of

PP[0..7]

SD[0..7]

PP3

PP0PP1

SD1

SD3

PP2

PWG

SD2

SD7

PP4

SD6

SD0

PP5

PP7

SD4

PP6

SD5

SA3

SA1

SA7SA8

SA0

SA6

SA4SA5

SA9

SA2

SA[0..10]

SA10

IR1LEDA

VCCIR1

IR1SD

IRRX

IRRXIRTX

IRTX

SIO_IRQINIIRQ9

IIRQ11

SIO_NCSJ

TXD1_LED

RXD1_LED

SIO

OS

C2

SIO

OS

C1

TXD2_LED

RXD2_LED

RR

TX

D2

RR

RX

D2

IIRQ10 TXD1

RXD1

TXD2

RXD2

RR

TX

D1

RR

RX

D1

DR1J

RPM

INDEXJ

FDIR

HDSEL

WRTPRTJ

WGATE J

STEPJ

DR0J

MTR0J

PP[0..7]

DSKCHG

RDATAJ

TRK0J

WDATAJ

SD[0..7]

MTR1J

IOCHRDYJ

IRQ7

RTS2J

DR1J

RPM

FDIR

IRQ4

MTR1J

TXD2

IRQ6

DR0J

DTR1JRTS1J

WGATE JHDSEL

MTR0J

STEPJ

IRQ3

DRQ2

IRQ5

TXD1

DTR2J

WDATAJ

CTS1J

IORJ

DSKCHG

RXD1

DACK2

TRK0J

RI2JDCD2J

PWG

DSR2J

RSTDRV

CTS2J

RDATAJ

IOWJ

WRTPRTJ

TC

RI1J

AEN

INDEXJ

DCD1JDSR1J

PINITJ

PSTROBJPAUTOFDJ

PPEPACKJ

PSLCTINJPERRORJ

PBUSY

PSLCT

DRQ1

SA[0..10]

RXD2

DRQ3DACK3

DACK1

IRQ11

IRQ9

IRQ10

VCC

VCC

VCC

VCC

VCC

C4439pF

C4539pF

C670.1uF

C690.1uF

+C686.8uF

J6

CNN-34CFLOPY-CON

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 34

R10110

R10010

R10247

U43

M5113A

27293031323334414243

464445

36

35

57

1819

61 62 60 59 75 73 74 76 77

4849505153545556

52

3837

4039

98

97

96

99

899193

94

28 23

24

2526

22

58

21 20 15 72 6 47 67 95

100

71 70 69 68 66 65 64 63

7882808584

8892908786

798183

12

345

78910111213141617

SA0SA1SA2SA3SA4SA5SA6SA7SA8SA9

AENIOR#IOW#

DACK2#

TC

MR

IDE_OE#/IRQ10NCSJ

BU

SY

AC

K#

PE

SLC

TE

RR

OR

#S

LCT

IN#

INIT

#A

UT

OF

D#

ST

RO

B#

SD0SD1SD2SD3SD4SD5SD6SD7

DRQ2

IRQ4IRQ3

IRQ6IRQ7

DRQ3

SA10

DACK3#

PDIR/IRQIN

TxD2/FDC_ENRTS2#/UR2_ADD0DTR2#/UR2_ADD1

IRQ5/ADRx#/PP_MODE1

DACK1# DRQ1/UR1_ADD1

IDE_CS0#/IRQ9/UR1_ADD0

IRTX/CFG_PORTIRRX/FDC_ADD

IDE_CS1#/IRQ11

PWRGD

OS

C2

OS

C1

VC

CV

CC

GN

DG

ND

GN

DG

ND

IOCHRDY

PD

0P

D1

PD

2P

D3

PD

4P

D5

PD

6P

D7

RxD1CTS1#DSR1#DCD1#RI1#/IDE_EN

RxD2CTS2#DSR2#DCD2#RI2#/IDE_ADD

TxD1/PP_ADD0RTS1#/PP_ADD1

DTR1#/PP_MODE0

DENSELMOT0

DRV1DRV0MOT1

DIR#STEP#

WDATA#WGATE#HDSEL#INDEX#TRK0#

WP#RDATA#

DSKCHG#

R1181K

R130

1K

R1270

Y1

24MHz_SMD

12 3

4

R1521.5K

R1531.5K

R1541.5K

R1551.5K

RP41K-10P

2 3 4 5 6 7 8 9

1

10

O2

O3

O4

O5

O6

O7

O8

O9

C

O10

U84A74ABT125

2 3

1

U84B74ABT125

5 6

4

U84C74ABT125

9 8

10

U84D74ABT125

12 11

13

U44TFDS6000

4

3

6

1

5

910

8

27

GND

VCC

SD

LEDC

NC

GP1GP2

LEDA

RXDTXD

D15

LED (2mA, SOT23)

321

D16

LED (2mA, SOT23)

321

D17

LED (2mA, SOT23)

321

D18

LED (2mA, SOT23)

321

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

SERIAL_PARALLEL.SCH


(Component Side View)

Connector

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

Parallel

1

83

94

Serial Connector(Component Side View)

6

72

5

1

SERIAL AND PARALLEL PORT INTERFACES

2.1




Title


Date: Sheet of

RXD1PDSR1P#

TXD1P

DCD1P#

RTS1P#

SIO1C2MSIO1VP

SIO1C1P

SIO1C1M

SIO1C2P

SIO1VM

SIO2C2P

RIN2P#

SIO2C1MSIO2VP

SIO2C2M

RTS2P#

SIO2VM

DCD2P#

TXD2P

DSR2P#

DTR2P#

RXD2P

SIO2C1P

CTS2P#

PP2

PP6

PP[0..7]

PP5PP4

PP7

PP1PP0

PP3

PPAUTOFDJPPP0

PPP1PPERRORJ

PPINTJPPP2PPSLCTINJPPP3

PPP4

PPP5

PPP6

PPP7

PPACKJ

PPBUSY

PPPE

PPSLCT

PPSTROBJ

RIN1P#DTR1P#CTS1P#

RRTS2P#RTXD2P#RCTS2P#RDTR2P#RRIN2P#

RRXD2P#RDSR2P#RDCD2P#

RRTS1P#RTXD1P#RCTS1P#RDTR1P#RRIN1P#

RRXD1P#RDSR1P#RDCD1P#

RTS1JTXD1

DTR1J

RXD1DSR1J

CTS1J

DCD1J

RI1J

TXD2RTS2J

DTR2JRI2J

DCD2JDSR2J

CTS2J

RXD2

PSTROBJ

PAUTOFDJ

PINITJ

PSLCTINJ

PERRORJ

PACKJ

PBUSY

PPE

PSLCT

PP[0..7]

VCC

VCC

VCC

VCC

VCC

C72

0.1uF

C70

0.1uF

C71

0.1uF

C74

0.1uF

C75

0.1uF

C76

0.1uF

C77

0.1uF

R61K

R14 22

R17 22

R15 22

R16 22

R18 22

RN5

22-8B

1357

2468

RN6

22-8B

1357

2468

RN7

22-8B

1357

2468

U46

RS232-5V LTC1349CG

2122202319242518

9810

116512

133

4

27

261 282 17

7

RO3RO2RO4DI2DI3RO1DI1RO5

RI3RI2RI4

DO3RI1

DO1RI5

ON/OFFC1+

C1-

C2+

C2-V+ V-VCC GND

DO2

J8

SERIAL PORTAMP 745410-1

594837261

J4

Parallel PortAMP 745967-7

1325122411231022

921

820

719

618

517

416

315

214

1

C73

0.1uF

C19

180pF

C23

180pF

C15

180pF

C17

180pF

C30

180pF

C31

180pF

C22

180pF

C20

180pF

C29

180pF

J9

SERIAL PORTAMP 745410-1

594837261

RN13

22-8B

1357

2468

RN14

22-8B

1357

2468

U45

RS232-5V LTC1349CG

2122202319242518

9810

116512

133

4

27

261 282 17

7

RO3RO2RO4DI2DI3RO1DI1RO5

RI3RI2RI4

DO3RI1

DO1RI5

ON/OFFC1+

C1-

C2+

C2-V+ V-VCC GND

DO2

C25

180pF

C27

180pF

C32

180pF

C16

180pF

C18

180pF

C21

180pF

C24

180pF

C26

180pF

C145

180pF

C144

180pF

C143

180pF

C142

180pF

C141

180pF

C140

180pF

C139

180pF

C138

180pF

RN15

22-8B

1357

2468

RN16

22-8B

1357

2468

C151

180pF

C146

180pF

C147

180pF

C150

180pF

C152

180pF

C153

180pF

C148

180pF

C149

180pF

RP3

1K-10P

23456789

1

10

O2O3O4O5O6O7O8O9

C

O10

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

ISA_MEM1.SCH


2

9

1

10

Top View

JTAG Connector

81

53

49 50

78

32

1

79

82

51

29

80

52

100

MACH221SP

2

30

31

99

PORT 80

PORT 680

INTERFACE FOR ISA BUS MEMORY AND HEX DISPLAYS

ISACNTL.J1Rev. 1.6

2.1




Title


Date: Sheet of

MACH_TCK

LOW

ATCLKO

ATCLKO

MACH_TMSMACH_TDIMACH_TDO

LA18LA17

BALE

LA23LA22LA21LA20LA19

SA15SA16

SA7SA6

SA9

SA2

SA11SA10

SA4SA3

SA12

SA8

SA14

SA5

SA13

SA1

SD0SD1SD2SD3SD4SD5SD6SD7SD8SD9SD10SD11SD12SD13SD14SD15

ISAD0ISAD1ISAD2ISAD3ISAD4ISAD5ISAD6ISAD7ISAD8ISAD9ISAD10ISAD11ISAD12ISAD13ISAD14ISAD15

EN245#DIR245

EN245#

DIR245

ISAD4 ISAD0ISAD5 ISAD1ISAD6 ISAD2ISAD7 ISAD3

P80CS#

P80HDP80LD

ISAD6ISAD3

P680CS#

P680LD

ISAD4ISAD1ISAD2

ISAD5ISAD0

ISAD7

P680HD

P80CS#P680CS#

IORJRSTDRV

ISAA19

ISAA7

ISAA13

ISAA18

ISAA17ISAA11

ISAA6

ISAA4

ISAA4

ISAA16

ISAA2

ISAA8

ISAA22

ISAA18

ISAA5

ISAA16ISAA15ISAA14

ISAA9

ISAA3

ISAA19

ISAA12

ISAA1

ISAA1

ISAA13ISAA5

ISAA22

ISAA21

ISAA7

ISAA15ISAA23

ISAA20

ISAA10

ISAA6

ISAA10

ISAA20

ISAA21

ISAA17

ISAA23

ISAA9

ISAA3ISAA2

ISAA11

ISAA12

ISAA14

ISAA8

SA0

SA0

XBUSCSJ IOCHRDYJAENMRDJMWTJ

SMEMWJSMEMRJ

IOWJ

REFRESHJ

BALE

N0WSJ

ATCLKO

IORJ

MEM16J

LA[17..23] ISAA[1..23]

BALE

SA[0..16]

SD[0..15] ISAD[0..15]

ROMCE#ROMOE#ROMWE #

RSTDRV

XBUSCSJ

VCC

VCC

VCC

VCC

VCC VCC

VCC VCC

P48

HEADER2X5; SHRD

23 45 67 89 10

1

R134 1K

U70

74ABT16244

148

718

2524

3142

47464443414038373635333230292726

214

1015

23568911121314161719202223

28343945

1OE#2OE#

VCCVCC

3OE#4OE#

VCCVCC


GNDGNDGNDGND


GNDGNDGNDGND

U69

74ABT373

3478

13141718

111

256912151619

D0D1D2D3D4D5D6D7

OE#E

Q0Q1Q2Q3Q4Q5Q6Q7

U71

74ABT16245

47 23568911121314161719202223

4443414038373635333230292726

46

3142

718

4825

124

28343945

214

1015

1A1 1B11B21B31B41B51B61B71B82B12B22B32B42B52B62B72B8

1A31A41A51A61A71A82A12A22A32A42A52A62A72A8

1A2

VCCVCC

VCCVCC

1G#2G#

1DIR2DIR

GNDGNDGNDGND

GNDGNDGNDGND

U72

Hex DisplayTI - TIL311

14

7

32

1312

1

584

10

6911

VCC

GND

DADBDCDD

LED

STRBBLNKLDCRDC

NCNCNC

U73


14

7

32

1312

1

584

10

6911

VCC

GND

DADBDCDD

LED

STRBBLNKLDCRDC

NCNCNC

R135330 R136

330

R137330

U75


14

7

32

1312

1

584

10

6911

VCC

GND

DADBDCDD

LED

STRBBLNKLDCRDC

NCNCNC

R138330

U74


14

7

32

1312

1

584

10

6911

VCC

GND

DADBDCDD

LED

STRBBLNKLDCRDC

NCNCNC

U55

MACH221SP-7Y

565859606162697071727375828485868788

939495969799

689

101112192021222325323435363738434445464749

131826546368764

3285378

12

1617293040415152666779809091

5724273133485055577477818398100

1415394264658992

I/O30I/O31I/O32I/O33I/O34I/O35I/O36I/O37I/O38I/O39I/O40I/O41I/O42I/O43I/O44I/O45I/O46I/O47

I/O0I/O1I/O2I/O3I/O4I/O5I/O6I/O7I/O8I/O9I/O10I/O11I/O12I/O13I/O14I/O15I/O16I/O17I/O18I/O19I/O20I/O21I/O22I/O23I/O24I/O25I/O26I/O27I/O28I/O29

I0/CLK0I1/CLK1

I2I3

I4/CLK2I5/CLK3

I6I7

TDITCKTMSTDO

GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND

N/CN/CN/CN/CN/CN/CN/CN/CN/CN/CN/CN/CN/CN/CN/CN/C

VCCVCCVCCVCCVCCVCCVCCVCC

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

ISA_MEM2.SCH


1MByte ISA Flash Memory

Configured as 512Kx16bit (29F800T device in "word" mode)

Access at even ISA Memory addresses between 15MB and 16MB-1

Use CSR 12h bit 3 to access 0f00000-0ffffffh as ISA Memory (instead of DRAM, if installed)

Flash chip A0 pin tied to ISA Address Bit 1; mulitply desired Flash chip address by 2h to find correct ISA address for access

(ex: Flash chip address 555h is accessed at ISA address AAAh)

ISA BUS FLASH MEMORY

2.1




Title


Date: Sheet of

RSTDRV#WORD

ISAA17

ISAA15

ISAA8

ISAA4

ISAA14

ISAA9

ISAA13

ISAA11

ISAA18

ISAA12

ISAA6ISAA7

ISAA2

ISAA19

ISAA3

ISAA5

ISAA1

ISAA16

ISAA10

ROMCE#ROMOE#ROMWE#

ISAD1ISAD0

ISAD7ISAD6

ISAD2ISAD3ISAD4ISAD5

ISAD12

ISAD15

ISAD9ISAD10

ISAD8

ISAD14

ISAD11

ISAD13

RSTDRV#

ISAA[1..21]

ISAD[0..15]

ROMCE#ROMOE#ROMWE #

VCC

VCC

R131

10K

U56

29F800-55 TSOP48

15

12

2628

44

11

37

4627

292524232221201918

876

424038

543

35

21

481716

30323436

33

39414345

47

31

RY/BY#

RESET#

CE#OE#

DQ7

WE#

VCC

GNDGND


DQ6DQ5DQ4

A11A12A13

DQ3

A14A15A16A17A18

DQ8DQ9

DQ10DQ11

DQ2

DQ12DQ13DQ14

DQ15/A-1

BYTE#

DQ1

C115

0.1uF

C114

0.1uF

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

RTC_TIP.SCH


T.I.P.CONNECTOR

ETHERNET IRQ

PARALLEL PORT IRQ

SERIAL PORT1 IRQ

SERIAL PORT0 IRQTIP TEST IRQ

12.5pF

(RTCSJ)

OPTIONAL Y2K COMPLIANT RTC

Set RAMCLR Bit in CR 4B to enable RAM_Clear Function

Set CS Bit in CR 4B for12.5pF Xtal

21

6059

RTC Address/DataTransferred onFINALi LinkBus

1 2

34ECLIPTEK ECPSM29T-32.768KTR


EDGE OF BOARD

PLASTIC SHROUDNOTCH ON TOP

T.I.P. CONNECTOR

Top View

OPTIONAL Y2K RTC AND TEST INTERFACE PORT CONNECTOR

2.1




Title


Date: Sheet of

ENETIRQPARIRQ

SA14 SA15SA13

SA9SA8

SA10SA12

SA16SA18

SA5

SA1SA2 SA3SA4SA6

SA0

SA7

SA11

SA17SA19

SWIRQ SERIRQ1SERIRQ0

GA2GA3GA4GA5GA6GA7GA8GA9

RTCX1

RTCX2

RTCWR#

RTCRD#

RTCKS#

RTCPWR#

SD7SD6

SD0SD3

SD4SD2

SD1

SD5

RTCCS#

SA[0..19]

RSTDRVPWG

IOWJ

IOCHRDYJ

AEN IRQ12

IRQ15

IRQ11

IRQ10IRQ14

IORJ

GA[2..9]

PWG

ENRTC

ZIOWJ

RTCAS

ZIORJ

VBAT

IRQ8J

RSTDRV#

SD[0..15]

VCC

VCC

VCC

VCC

+C11310uF16VC-CASE

R1210

R1230

R1190

R1200

R1220

U22

DS1685-5

456789

1011

1

20

1923

2

3

24

1216

22

13141517

1821

AD0AD1AD2AD3AD4AD5AD6AD7

PWR#

VBAT

IRQ#SQW

X1

X2

VCC

GNDGND

VBAUX

CS#ALEWR#RD#

KS#RCLR#

U77C

74F32

9

108

U77B

74F32

4

56

U77D

74F32

12

1311

Y6

32.768KHz_SMD

123

4

R14210K

P31

COND60

12345678910

1112131415161718192021222324252627282930313233343536373839404143454749

4244464850

5153555759

5254565860

R14110K

U15F

74F04

13 12

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

KEYBOARD.SCH


KEYBOARD INHIBIT FUNCTION

41

3

5-PinDin

25

EDGE OF BOARD

CONNECTOR

4

1

5

KEYBOARD

3

2

(COMPONENT SIDE)

6

7

(PINS 6 AND7 GROUND THEMETAL SHELL)

5

4

CONNECTOR

3

MOUSE

12

6

(COMPONENT SIDE)

EDGE OF BOARD

5

2

6-PinMini-Din

31

46

7

8

PC KEYBOARD AND MOUSE INTERFACE

2.1




Title


Date: Sheet of

MDATA1

MVCCM_CLK1MMCLK

ATCLK

MMDATA

GA6

KBINHIBIT

IORJ

GA2

GA[2..9]

IOWJ

KB

SS

#

IRQ1

XBUSCSJ

GA7

KCLKKDATA

KBINHIBIT

GA3GA4GA5

GA8

KKCLKIRQ12

KCLK1KKDATA

SA2

GA9KBVCC

RSTDRV#

MCLKMDATA

KKDATAMMDATA

KKCLKMMCLK

KDATA1

IRQ12

XBUSCSJ

GA[2..9]

RSTDRV#

ATCLK

SA2

IOWJ

IORJ

IRQ1

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

C1600.1uF

R1714.7K

R1724.7K

L8FB

L9FB

C15947pF

C15847pF

R145470

R146*2.2K

C1

0.1uF

R1741K

F1

FUSE--0.5A

R1731K

C2847pF

R444.7KR45

4.7K

C1447pF

L2 FB

AMP 212044-1

J1

KYBD CONN

12345

67

U79

M5042

2

3

5

6

43

97

810

12

15161718192021

28

3031323335363738

2425262739404142

11

4422

29

1

4

14

13

2334

T0

NC2

RESET#

SS#

T1

RD#CS#

EAA0

NC3

D1D2D3D4D5D6D7

PROG

P10P11P12P13P14P15P16P17

P20P21P22P23P24P25P26P27

WR#

VC

CG

ND

VC

C

NC1

OSC

D0

SYNC

NC4NC5

L1 FB

R17510K

F2

FUSE--0.5A

C1560.1uF

C1570.1uF

U78D

74F06

9 8

U78C

74F06

5 6

U78A

74F06

1 2

U78B

74F06

3 4

U78E

74F06

11 10

U78F

74F06

13 12

J11

MOUSE_CONAMP 750329-2

123456

78

123456

GNDGND

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

E E

CPU_PINOUT.SCH

(2)-D22

(3)-TCK

(4)-D23

(5)-DP3

(6)-D24

(7)-GND

(8)-D29

(9)-GND

(10)-INV

(11)-GND

(12)-HITM#

SOCKET1Am486 MICROPROCESSOR(PIN #)-PIN DESIGNATION(PIN SIDE VIEW)

(1)-D20

(13)-INC

(14)-TDI

(15)-IGNEE#

(16)-INTR

(17)-AHOLD

(18)-D19

(19)-D21

(20)-GND

(21)-GND

(22)-GND

(23)-D25

(24)-VCC

(25)-D31

(26)-VCC

(27)-SMI#

(28)-VCC

(29)-CACHE#

(30)-WB/WT#

(31)-TMS

(32)-NMI

(33)-TDO

(34)-EADS#

(35)-D11

(36)-D18

(37)-CLK

(38)-VCC

(39)-VCC

(40)-D27

(41)-D26

(42)-D28

(43)-D30

(44)-SRESET

(45)-UP#

(46)-SMIACT#

(47)-INC

(48)-FERR#

(49)-FLUSH#

(50)-RESET

(51)-BS16#

(52)-D9

(58)-BOFF#

(55)-SKT1_NC

(53)-D13

(54)-D17

(57)-BS8#

(56)-A20M#

(60)-VCC

(59)-GND

(64)-GND

(61)-D10

(63)-VCC

(62)-HOLD

(70)-BE3#

(68)-KEN#

(67)-D15

(66)-D8

(69)-RDY#

(65)-DP1 (71)-GND

(72)-VCC

(76)-GND

(74)-STPCLK#

(75)-VCC

(73)-D12

(77)-GND

(78)-D3

(82)-GND

(80)-BRDY#

(81)-VCC

(79)-DP2

(83)-INC

(84)-D5

(88)-PCD

(86)-BE2#

(87)-BE1#

(85)-D16

(89)-GND

(90)-VCC

(94)-GND

(92)-BE0#

(93)-VCC

(91)-D14

(95)-GND

(96)-D6

(100)-GND

(98)-PWT

(99)-VCC

(97)-D7

(101)-GND

(102)-VCC

(106)-GND

(104)-D/C#

(105)-VCC

(103)-D4

(107)-D2

(108)-D1

(112)-W/R#

(110)-LOCK#

(111)-M/IO#

(109)-DP0

(113)-D0

(114)-A29

(118)-GND

(116)-HLDA

(117)-VCC

(115)-A30

(120)-GND

(121)-A17

(122)-A19

(123)-A21

(124)-A24

(125)-A22

(126)-A20

(127)-A16

(128)-A13

(129)-A9

(130)-A5

(119)-A31

(131)-A7

(132)-A2

(133)-BREQ

(134)-PLOCK#

(135)-PCHK#

(137)-A25

(138)-VCC

(139)-GND

(140)-A18

(141)-VCC

(142)-A15

(143)-VCC

(144)-VCC

(145)-VCC

(146)-VCC

(147)-A11

(136)-A28

(148)-A8

(149)-VCC

(150)-A3

(151)-BLAST#

(152)-CLKMUL

(154)-A26

(155)-A23

(156)-VOLDET

(157)-A14

(158)-GND

(159)-A12

(160)-GND

(161)-GND

(162)-GND

(163)-GND

(164)-GND

(153)-A27

(165)-A10

(166)-GND

(167)-A6

(168)-A4

(169)-ADS#

Am486 MICROPROCESSORPIN SIDE VIEW

SOCKET 1

COMPONENT SIDE VIEW

1

17

153

169 17

1

169

153

SOLDER SIDE VIEW


2.1




Title


Date: Sheet of

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