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Emulating Multi-patternQuantum Grover’s Search on aHigh-Performance Reconfigurable Computer

Naveed Mahmud, Bennett Haase-Divine, Bailey Kouson Srimoungchanh, Nolan Blankenau,Annika Kuhnke, and Esam El-ArabyUniversity of Kansas, Lawrence, KS-66045

{naveed_923,b.haase-divine,srimoungchanh.bailey,nolanblankenau,akkuhnke,esam}@ku.edu

ABSTRACTGrover’s search (GS) is a widely studied quantum algorithm thatcan be employed for both single and multi-pattern search problemsand potentially provides quadratic speedup over existing classicalsearch algorithms. In this paper, we propose a multi-pattern quan-tum search methodology based on a modified GS quantum circuit.The proposed method combines classical post-processing permu-tations with a modified Grover’s circuit to efficiently search forgiven single/multiple input patterns. Our proposed methodologyreduces quantum circuit complexity, realizes space-efficient emu-lation hardware and improves overall system configurability fordynamic, multi-pattern search. We use a high-performance recon-figurable computer to emulate multi-pattern GS (MGS) and presentscalable emulation architectures of a complete multi-pattern searchsystem. We validate the system and provide analysis of experimen-tal results in terms of FPGA resource utilization and emulationtime. Our results include a successful hardware architecture thatis capable of emulating MGS algorithm up to 32 fully-entangledquantum bits on a single FPGA.

1 INTRODUCTIONQuantum algorithms have the potential to solve classical NP-hardproblems in polynomial time [1–3], thus gaining a supreme advan-tage [4] over existing classical methods. Grover’s quantum searchalgorithm [3] has a complexity of O(

√N ) compared to O(N ) of

equivalent classical search algorithms [5], and can be used for data-base queries [6]. In this work, we propose a single-pattern/multi-pattern quantumGrover’s searchmethodology and demonstrate thecorresponding hardware implementation. We generalized Grover’squantum circuit in our proposed system so that the circuit growsonly depending on the number of data items, unlike the conven-tional Grover’s circuit [7] that changes with the target pattern. Inour proposed system, the target pattern matching is handled byclassical components, while target quantum state amplification [3]is performed by a quantum component. We develop an emulator forthe quantum computation and the full system is implemented on astate-of-the-art high-performance reconfigurable computer (HPRC)from DirectStream [8]. We provide experimental results in terms ofFPGA resource utilization and emulation time. The obtained resultsshow that the proposed methodology is feasible for use in searchapplications that require multiple pattern matching [9].

2 PROPOSED METHODOLOGY FOR MGSAn overview of the proposed system is shown in Fig. 1. The algo-rithm takes in two inputs, |0⟩ which is n entangled ground statequbits, and P which is a vector of Npatterns entries each consisting

of n ancilla bits encoding the pattern(s) to be searched for in |ψin⟩.First |0⟩ is initialized to a uniform superposition state |ψin⟩ usingHadamard gates H ⊗n , then a modified oracle Uoracle, followed bya Grover diffusionUdiffusion, are applied form iterations [7, 10]. Apermutation stepUpermute, is performed to set the basis coefficientsin the desired order depending on the pattern(s). The output is thequantum state |ψout ⟩, with the target states amplified.

Figure 1: Proposed multi-pattern Grover’s search (MGS).

2.1 Modified Oracle Circuit and DiffusionOur implementation for the oracle uses controlled X gates (cX) [7]to dynamically modify the target pattern. Modification of the searchpattern allows us to extend and generalize the algorithm for dy-namic search of patterns as seen in Fig. 2a, whereas in conventionalGS the oracle is static for any given pattern. For a multi-patternoracle we cascade single-pattern oracle circuits as seen in Fig. 2b.The diffusion circuit, which is identical to the conventional GSdiffusion [7], takes in the output of the oracle circuit and amplifiesthe corresponding amplitude of the solution(s).

2.2 Quantum State PermutationOurmodified design of GS only amplifies the firstNpatterns indices,therefore the permutation is required to shift the target patterns tothe target indices in the output quantum register. In the permutationprocess, the output vector |ψout ⟩ is first initialized to the base lowprobability value located at index Npatterns . Then the amplifiedindices (0 to Npatterns − 1) are shifted to the correct indices basedon P . We derived the quantum circuit for the permutation using cXgates as shown in Fig. 3a.

3 HARDWARE ARCHITECTURESA high throughput, high precision, and scalable quantum circuitemulator is designed. The emulator determines the output quantumstate |ψout ⟩, given an input quantum state |ψin⟩, and the unitaryoperation of the quantum algorithmUG . The emulator architecture

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(a) Modified oracle for single-pattern GS.

(b) Modified oracle for MGS.Figure 2: Oracle circuit.

(a) Quantum circuit. (b) Classical circuit.

Figure 3: Permutation model for modified MGS.consists of complex multiply-and-accumulate (CMAC) hardwareunits that perform complex vector-matrix and matrix-matrix mul-tiplications efficiently. We used single-precision floating-point tomodel qubits and quantum operations. For example, the complexcoefficients describing qubits and quantum states are representedusing 64 bits, with 32 floating-point bits for the real and imaginarycomponents respectively.

For emulating theUpermute circuit in Fig. 3a on classical hard-ware we implement a space-efficient design using methods likeindex scheduling, since quantum permutation is basically swap-ping of basis coefficients of the quantum input/output states. Thehardware architecture of the index scheduler for permutation isshown in Fig. 3b. In this scheduler, each output register index Aoutis matched with each target pattern, P1, P2, ..., Pi , ..., PNpatterns inthe set of target patterns, P . If there is a match, the input registerindex Ain is set to zero, and if otherwise, Ain is set to Npatterns .This design is based on the previously discussed permutation modelin Section 2.2.

4 EXPERIMENTAL RESULTS AND ANALYSISThe proposed emulator and hardware architectures were imple-mented on DirectStream (DS8) [8], a state-of-the-art high perfor-mance reconfigurable computing (HPRC) system. Simulation andhardware builds were performed using Quartus Prime version 17.0.2

on a high-end Arria 10 10AX115N4F45E3SG FPGA. We have ob-tained experimental results from hardware builds of up to 32 qubitMGS circuits. We utilized 2×32 GB SDRAM banks to store the inputand output quantum state vectors respectively, while the inputalgorithm matrix elements were streamed in. The architecture ofthe compute node used is detailed in [11]. The experimental resultsare shown in Table 1.

Table 1: Experimental results for MGS emulation.

Number of On-chip resource* utilization (%) OBM** utilization (bytes) Emulationqubits ALMs BRAMs DSPs SDRAM time (sec)

2 11 8 1 32 2.3E-064 11 8 1 128 3.4E-066 11 8 1 512 2.0E-058 11 8 1 2K 2.8E-0410 11 8 1 8K 4.5E-0312 11 8 1 32K 7.2E-0214 11 8 1 128K 1.15E016 11 8 1 512K 1.84E0118 11 8 1 2M 2.95E0220 11 8 1 8M 4.72E0322 11 8 1 32M 7.5E0424 11 8 1 128M †1.2E0626 11 8 1 512M †1.93E0728 11 8 1 2G †3.09E0830 11 8 1 8G †4.95E0932 11 8 1 32G †7.92E10

*Total on-chip resources: NALM = 427, 200,NBRAM = 2, 713,NDSP = 1, 518.**Total on-board memory: 4 parallel SRAM banks of 8MB each and 2 parallelSDRAM banks of 32GB each.

†Results are projected using regression.

Table 2: Comparative results with related work.

Simulation Reported Number of Number Precision FrequencyPlatform work search patterns of qubits type (MHz)

CPU Avila et al. [12], 2017 single 21 32-bit floating pt. 3400

GPU Avila et al. [12], 2017 single 21 - 1000Gutiérrez et al. [13], 2010 single 26 32-bit floating pt. 1350

FPGAKhalid et al. [14], 2004 single 3 16-bit fixed pt. 82.1Lee et al. [15], 2016 single 7 24-bit fixed pt. 85Proposed work single/multiple 32 32-bit floating pt. 233

A quantitative comparison with existing work on GS is shown inTable 2. Among existing FPGA-based emulators [14, 15], our workuses the highest precision (32-bit floating-point), highest operatingfrequency (233 MHz), and highest emulated circuit size (32 qubits)on a single FPGA. Implementations on large-scale CPU-based [12]and GPU-based platforms [12, 13] use significantly more resourcescompared to our FPGA-based solution. Moreover, our work is firstto provide both single and multi-pattern Grover’s search in a re-configurable hardware solution.

5 CONCLUSIONS AND FUTUREWORKUntil large-scale quantum hardware are fully functional and capableof running useful applications, the quantum research communityis heavily dependant on alternative methods such as simulationand emulation. In this work, we proposed an efficient methodologyfor multi-pattern Grover’s search (MGS) using a modified quantumGrover’s circuit. We derived corresponding emulation architecturesand implemented them on an HPRC. Our results include emulationof MGS using up to 32 fully-entangled qubits. We plan to use thiswork in the future to develop a complete image pattern recognitionsystem that can be used to identify particle track patterns in HighEnergy Physics (HEP) applications.

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