embedded systems - indiana university bloomington
TRANSCRIPT
![Page 1: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/1.jpg)
Embedded Systems
Sribabu Doddapaneni
Christopher Paul Ramste8er
1
![Page 2: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/2.jpg)
Embedded System
• Defini;on • The Digital Signal Processor • Embedded Benchmarks
• Embedded Mul;processors
• Programming Embedded Systems
• Case Studies
2
![Page 3: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/3.jpg)
Defini;on
• An Embedded System is a special purpose computer designed for a limited number of func;ons
• Key Characteris;cs – Usually real ;me
– Processing informa;on as “signals” – Limited memory and power concep;on
3
![Page 4: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/4.jpg)
Examples
• Microwaves • Washing machines • Printers • Networking devices • Automobiles • Cell phones • PDAs • Mp3 players • Video game consoles • TVs • Children's toys
4
![Page 5: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/5.jpg)
Cost comparison
5
![Page 6: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/6.jpg)
Digital Signal Processor
6
![Page 7: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/7.jpg)
The Digital Signal Processor
• A special‐purpose processor op;mized for execu;ng digital signal processing algorithms.
• Converts Analog to Digital • Many perform mul;ply‐accumulate (MAC)
– A = A + B * C • Usually fixed‐point arithme;c
– All data between ‐1 to +1 • Algorithms
– Time‐domain filtering – Convolu;on – Transforms – Forward error correc;on encodings
7
![Page 8: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/8.jpg)
The TI 320C55
• Op;mized for low‐power, embedded applica;ons
• 7‐stage pipeline – Detects pipeline hazards and will stall on WAR and RAW
• Idle domains
• MACs
8
![Page 9: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/9.jpg)
Pipeline
• Fetch stage – reads program data from memory into the instruc;on bu8er queue
• Decode stage – decodes instruc;ons and dispatches tasks
• Address stage – computes data addresses and branch addresses
• Access 1/Access 2 stages – send data read addresses to memory
• Read stage – transfers operand data • Execute stage – executes and writes data
9
![Page 10: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/10.jpg)
Idle domain
• Used to decrease power consumed • Sogware programmable • Six domains
– CPU – DMA – Peripherals – Clock generator – Instruc;on cache – External memory interface
10
![Page 11: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/11.jpg)
MACs
• Two macs • 17‐bit by 17‐bit mul;plier
• 40‐bit adder • 1 cycle to execute both mul;ple and add
• So two MACs are executed per cycle
11
![Page 12: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/12.jpg)
The TI 320C6x
• Uses very long instruc;on word to exploit high level parallelism
• 11 stage pipeline – Four stages for instruc;on fetch – Two stages for instruc;on decode – Four stages for instruc;on execu;on
12
![Page 13: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/13.jpg)
VLIW
• Very bad in code size – To over come they use a p bit that indicates if the instruc;on is in the current word or next one
– No need for nops
13
![Page 14: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/14.jpg)
Benchmarks
14
![Page 15: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/15.jpg)
Benchmarks
• Tailored to tasks – Hard real ;me – Sog real ;me – Overall cost performance
• Broken up by type – Automo;ve – Consumer – Telecommunica;ons – Networking – Office automa;on
15
![Page 16: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/16.jpg)
16
![Page 17: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/17.jpg)
Benchmark Power
17
![Page 18: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/18.jpg)
Benchmark Preformance
18
![Page 19: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/19.jpg)
Mul;processors
• Growing – Most embedded systems are writen form scratch
– Natural paralleism
• Example MXP
19
![Page 20: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/20.jpg)
MXP
• Made for high‐end telecommunica;ons and networking • Features
– Interface to serial voice streams • Support for handing ji8er
– Fast packet rou;ng and channel lookup – Ethernet interface – For MIPS processors
• Used for – Code for maintaining voice‐over‐IP channels – Quality of service – Echo cancella;on – Simple compression – Packet encoding
20
![Page 21: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/21.jpg)
Building Embedded Systems
& Case Studies
21
![Page 22: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/22.jpg)
the rest of the talk
• Issues (why is it difficult) • Classifica;on based on Processor used • Programmable Embedded Systems
• Case Studies
22
![Page 23: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/23.jpg)
Design Constraints
Problem Matrix is Mul;‐dimensional Power, performance, code size, weight, etc.
Stringent Tighter constraints, extreme resource constraint
Applica;on Specific Radia@on level, opera;ng temperature, available waCage
23
![Page 24: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/24.jpg)
Processors
24
![Page 25: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/25.jpg)
Processor technology
Processor does not have to be programmable
25
Application-specific
Registers
Custom ALU
Datapath Controller
Program memory
Assembly code for:
total = 0 for i =1 to …
Control logic and State register
Data memory
IR PC
Single-purpose (“hardware”)
Datapath Controller
Control logic
State register
Data memory
index
total
+
IR PC
Register file
General ALU
Datapath Controller
Program memory
Assembly code for:
total = 0 for i =1 to …
Control logic and
State register
Data memory
General-purpose (“software”)
![Page 26: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/26.jpg)
General‐purpose processors Programmable device used in a variety of
applica;ons Also known as “microprocessor”
Features • Program memory • General datapath with large register file and
general ALU
User benefits • Low ;me‐to‐market and NRE costs • High flexibility
“Pen@um” the most well‐known, but there are hundreds of others
26
IR PC
Register file
General ALU
Datapath Controller
Program memory
Assembly code for:
total = 0 for i =1 to …
Control logic and
State register
Data memory
![Page 27: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/27.jpg)
Single‐purpose processors Digital circuit designed to execute exactly one
program/task a.k.a. coprocessor, accelerator or peripheral
Features • Contains only the components needed to
execute a single program
• No program memory
Benefits • Fast • Low power • Small size
e.g. DSPs.
27
Datapath Controller Control
logic
State register
Data memory
index
total +
![Page 28: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/28.jpg)
Applica;on‐specific processors Programmable processor op;mized for a
par;cular class of applica;ons having common characteris;cs Compromise between general‐purpose and
single‐purpose processors
Features • Program memory
• Op;mized datapath • Special func;onal units
Benefits Some flexibility, good performance, size and
power
e.g. PIC, MSP430
28
IR PC
Registers
Custom ALU
Datapath Controller
Program memory
Assembly code for:
total = 0 for i =1 to …
Control logic and
State register
Data memory
![Page 29: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/29.jpg)
IC technology
The manner in which a digital (gate‐level) implementa;on is mapped onto an IC – IC: Integrated circuit, or “chip” – IC technologies differ in their customiza;on to a design – IC’s consist of numerous layers (perhaps 10 or more)
• IC technologies differ with respect to who builds each layer and when
29 source drain channel
oxide gate
Silicon substrate
IC package IC
![Page 30: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/30.jpg)
IC technology
Three types of IC technologies 1. Full‐custom/VLSI
2. Semi‐custom ASIC (gate array and standard cell) 3. Programmable Logic Device (PLD)
30
![Page 31: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/31.jpg)
Full‐custom/VLSI
All layers are op;mized for an embedded system’s par;cular digital implementa;on – Placing transistors – Sizing transistors – Rou;ng wires
Benefits Excellent performance, small size, low power
Drawbacks High Ini;al cost (e.g., $300k), long ;me‐to‐market
31
![Page 32: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/32.jpg)
Semi‐custom
Lower layers are fully or par;ally built Designers are leg with rou@ng of wires and maybe placing some blocks
Benefits Good performance, good size, lesser ini;al cost than a full‐custom implementa;on (perhaps $10k to $100k)
Drawbacks S;ll require weeks to months to develop
32
![Page 33: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/33.jpg)
PLD (Programmable Logic Device) All layers already exist
– Designers can purchase an IC – Connec;ons on the IC are either created or destroyed to implement desired func;onality
– Field‐Programmable Gate Array (FPGA) very popular
Benefits Low ini;al costs, almost instant IC availability
Drawbacks Bigger, expensive (perhaps $30 per unit), power hungry, slower
33
![Page 34: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/34.jpg)
Peripherals
• Serial Communica;on Interfaces (SCI): RS‐232, RS‐422, RS‐485 etc • Synchronous Serial Communica;on Interface: I2C, SPI, SSC and ESSI
• Universal Serial Bus (USB)
• Networks: Ethernet, Controller Area Network etc • Timers: PLL(s), Capture/Compare and Time Processing Units
• Discrete IO: aka General Purpose Input/Output (GPIO)
• Analog to Digital/Digital to Analog (ADC/DAC) • Debugging: JTAG, ISP, BDM Port
34
![Page 35: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/35.jpg)
Case Study 1:
Digital Camera
35
![Page 36: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/36.jpg)
An embedded system example ‐‐ a digital camera
Microcontroller
CCD preprocessor Pixel coprocessor A2D
D2A
JPEG codec
DMA controller
Memory controller ISA bus interface UART LCD ctrl
Display ctrl
Multiplier/Accum
Digital camera chip
lens
CCD
• Single-functioned -- always a digital camera • Tightly-constrained -- Low cost, low power, small, fast • Reactive and real-time -- only to a small extent
36
![Page 37: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/37.jpg)
Programmable Embedded system
37
![Page 38: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/38.jpg)
Programmable ES • Increasing Complexity • Shrinking Time‐to‐market • Programmable Embedded Systems
– Increase designer produc;vity • Sogware provides
– faster development – easier reusability and upgrade‐ability
On-Chip Memory
Synthesized HW Interface
Off-Chip Memory
Embedded Processor
38
![Page 39: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/39.jpg)
Can I use exis;ng Compilers? Design Constraints
Mul;‐dimensional Power, performance, code
size, weight, etc.
Stringent Tighter constraints, highly
resource constraint
Applica;on‐specific Radia;on level, opera;ng
temperature, available wa8age
“Highly-customized” designs of embedded systems □ Different ISAs
□ e.g. ARM, MIPS 16, micro-controllers □ Missing architectural features
□ e.g. missing caches, branch predictors □ Design idiosyncrasies
□ e.g partitioned register file, hardware loop counters
□ “Light-weight” versions of standard architectural features □ e.g partial register renaming, limited
support for prefetching, partial predication
Functionality – Maybe (Different ISAs) Optimizations – NO
Compiler for Embedded Systems Meet all design constraints simultaneously 39
![Page 40: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/40.jpg)
Compiler Issues
Code size Performance
Power, Energy
Real‐;me guarantees
Security
Reliability
Robustness
40
![Page 41: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/41.jpg)
Compiler for ES
Highly Customized embedded processor architecture
Compiler’s job is tough • Limited compiler technology • Difficult and costly analysis
2‐fold job of Compiler • Exploit exis;ng design features
• Avoid loss due to missing design features
However, Compiler can be very effec;ve Significant impact on power, performance etc.
41
![Page 42: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/42.jpg)
Embedded soFware architectures
• Simple control loop • Interrupt controlled system
• Preemp;ve mul;tasking or mul;‐threading
• Monolithic kernel
• MicroKernel
• Exo;c custom opera;ng systems
• Addi;onal sogware components
42
![Page 43: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/43.jpg)
Debugging • Interac@ve resident debugging : using the simple shell provided by the
embedded opera;ng system
• External debugging using logging or serial port output to trace opera;ons
• An in‐circuit debugger (ICD), a hardware device that connects to the microprocessor via a JTAG or NEXUS interface.
• Replaces the microprocessor with a simulated equivalent
• Provides full control over all aspects of the microprocessor
43
![Page 44: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/44.jpg)
Firmware vs RTOS
v/s
44
![Page 45: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/45.jpg)
RealTimeOS
Features • Scheduling • Events • queues • low interrupt latencies • small memory footprint • fast context switching • Timer Resolution
45
![Page 46: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/46.jpg)
Linux Bare kernel
46
![Page 47: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/47.jpg)
RTLinux Kernel
47
![Page 48: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/48.jpg)
Case study 2
Inside a Cell Phone
48
![Page 49: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/49.jpg)
Case Study: OpenMoko
• Linux kernel • GUI with X.Org Server, GTK+ toolkit, and the Matchbox window
manager and also support for Qt toolkit and Enlightenment 17. • Na;ve applica;ons can be developed and compiled using various
languages including C and C++.
49
![Page 50: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/50.jpg)
Development Tools
• toolchain to enable code compila;on • MokoMakeFile which is a tool that greatly simplifies build process
• The QEMU emulator can be used to run Openmoko
• Full GTA02 hardware emula;on • Phone can be flashed directly
50
![Page 51: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/51.jpg)
Block Diagram
51
![Page 52: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/52.jpg)
Sogware Stack
52
![Page 53: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/53.jpg)
Samsung S3C2442B (Mul@ Stacked Package) separate 16 KB instruc@on cache and 16 KB data cache, MMU to handle virtual memory
Management, TFT and STN LCD controller, NAND flash boot loader, 3‐ch UART, 4‐ch DMA, 4‐ch ;mers with PWM, I/O ports, RTC, 8‐ch 10‐bit ADC and touch screen interface, camera interface, IIC‐BUS interface, IIS‐BUS interface, USB host, USB device, SD host and mul;media card interface, 2‐ch SPI and PLL for clock genera;on.
• Specification: • Core: ARM920T • Instruction Set: ARMv4
53
![Page 54: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/54.jpg)
Case Study 3
Emo;on Engine for Sony Playsta;on 2
54
![Page 55: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/55.jpg)
Emo;on Engine of the Sony Playsta;on 2
55
![Page 56: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/56.jpg)
References
• Appendix D, Computer Architecture by John Hennessy and David Pa8erson
• Openmoko.org • John Catsoulis, Designing Embedded Hardware, O'Reilly, May
2005, ISBN 0‐596‐00755‐8
• A few slides adopted from www.public.asu.edu/~ashriva6/teaching/CES/CES_Spring_2008
56
![Page 57: Embedded Systems - Indiana University Bloomington](https://reader034.vdocuments.site/reader034/viewer/2022042318/625cd8fb5eefd84da8079973/html5/thumbnails/57.jpg)
Thank you
?s
57