embedded systems in industrial automation/file/lulea_slides.pdfdepartment of electronics school of...

Department of ElectronicsSchool of Informatics, Electronics, and TelecommunicationAGH Univ. of Science & Technology in Krakow

Embedded Systems in Industrial Automationfrom single node to networked embedded systems

Richard Zurawski Lulea, February 18, 2015

Richard Zurawski, Lulea, Feb. 18, 2015

Outline

Embedded systems in industrial automation

Networked embedded systems

Design issues

Node design & technologiesNetwork design & technologiesTiming & schedulability

Wireless Sensor Networks and technologies


Embedded Nodes

Source: Industrial Information Technology Handbook, 2nd ed., CRC Press


Embedded Nodes


Embedded Nodes

point-to-point multidrop


Richard Zurawski, Lulea, Feb. 18, 2015Richard Zurawski, Lulea, Feb. 18, 2015

Outline



Design issues




Networked Embedded Systems

There have been various reasons for the emergence of networkedembedded systems, influenced largely by their application domains.

Some of the most important ones:

● the benefits of using distributed systems● evolutionary need to replace point-to-point wiring connections inthese systems by a single bus



A networked embedded system is a collection of spatially and functionally distributed embedded nodes interconnected by means of wireline or/and wirelesscommunication infrastructure and protocols, interacting with the environment (via a sensor/actuator elements) and each other (peer-to-peer), and, possibly, a master node performing some control and coordination functions to coordinate computing and communication in order to achieve certain goal(s).


Elements & Aspects


● Nodes● Communication Links (Specialized Communication Networks)● Real-time


Smart Transducers



Specialized Communication Networks

currently in wide use tens of specialized communication networks and protocols developed for a variety of application areas with functionalities dictated by different requirements on payload, speed and bandwidth, delay and jitter, dependability, …

wireline networks;

using media such as:

● twisted pair cables,● fiber optic cables,● power lines


Wireline Networks

currently in wide use tens of specialized communication networks and protocols developed for a variety of application areas with functionalities dictated by different requirements on payload, speed and bandwidth, delay and jitter, dependability, …

wireline networks;

using media such as:

● twisted pair cables,● fiber optic cables,● power lines


Wireless & Hybrid Networks

wirelss networks; supporting radio frequency channels (EMF), and infrared connections

● IEEE 802.11/WLAN, ● IEEE 802.15.1/Bluetooth,

IEEE 802.15.4/ZigBee, …

hybrid networks; wireline extended by wireless links



Real Time ...

real-time systems (real-time operation) - in which systems are required to respond to changes in the environment the system is embedded in, or interacts with, within a predefined period of time mandated by the dynamics of that environment

Response:

● periodic● aperiodic● sporadic

System classification:

● soft real-time ● hard real-time● safety critical hard real-time


Outline



Design issues




Design Issues

1) Node(s) design

2) Network design

3) Timing and Scheduleability Analysis


Node(s) Design Issues - Modularity

AspectPros Cons

Re-use elements Minimized development effort due to reuse of HW/SW design (and code)

Lower performance (footprint, response time, power consumption, etc.) due to increased overhead

Risk reduction Design based on well-proven and tested components

Integration of several components can result in unclear/untested behavior

Migration Minimized effort to migrate to other (newer) SW/HW versions

Lower performance due to “wrappers” needed to maintain system interfaces

● Modifications● fixing bugs

● Implementations of new functionality● upgrades to new SW/HW versions

Modularity – to improve maintainability:



HW vs. SW Components

Single vs. multiple chips




IC Interfaces:

Exchanging integrated circuits (ICs) requires their interfaces to be compatible - pin compatibility:

● functional compatibility - two ICs have the same functions (inputs, outputs, power supply, ground, etc), assigned to the same pins.

● mechanical compatibility - ICs can be inserted into the same socket or soldered to the same footprint.

● electrical compatibility - components work with the same supply and signaling voltage levels.


Node(s) Design Issues – Low Power Design


Important for wireless sensor nodes

Microcontroller - several controllable low power modes.

External Real-Time Clock (RTC) - can be powered on and off

Radio chip - provides on/off control, as well as a reset possibility.

Analog filter electronics - can be powered on and off.

sleep/wakeup mode – transmission only on the “delta” change



Texas Instruments MSP430 variant can be operated at voltage levels ranging from 1.8 to 3.6 V, and supports five low power modes.

When operating at a 3.0 V supply level:

● in the lowest power-saving mode (the CPU is practically turned off) typically requires 0.1 µA,

● in standby mode (next lowest) it requires 1.6 µA,

● in active mode it requires 400 µA.

The drawback with the “off” mode is that the CPU can only wake up from an externally generated interrupt



MSP430 settling time - the time it takes for the CPU to become fully operational when waking up from a power save mode:

● “off” mode - 6 µs ● standby mode - 6 µs

the “off” mode allows to further decrease power consumption by shutting off the RTC

However, without the RTC signal, the CPU will default to an inaccurate, internal, lower frequency clock.

Thus, when waking up from the “off” mode, the RTC oscillator signal has to be activated before the CPU will stabilize, which adds to the 6 µs wakeup time.



HMI

local HMI may be required to:

check the status, calibrate, command the device to perform a measurement.

Depending on the requirements on packaging, or the available power budget, several alternatives are used in the industry ranging from simple LEDs and buttons to LCDs.



Energy Efficient Protocols

communication protocol has a major impact on the final power consumption of the system

Media access scheme:

● TDMA – no collisions, or minimized – no need for retransmission due to collisions

● CSMA - the node first has to listen before it can send its data, which degrades rapidly when there is lots of communication

Data package size




Topology:

Single-hop topology - avoids delays in intermediate nodes




Topology:

Multi-hop topology:

a node may have to wake up to forward data from other nodes

intermediate nodes don’t know when they may be called upon to route packets for others

intermediate nodes (router nodes) to be mains powered

Security:

adds overhead to the packets and to the computation performed at the devices


Node(s) Design Issues – Power Supply (WSN)

Requirements

● Power demand assessment● Energy buffer● Lifetime operation




Energy Sources


Permanent storages:

● Primary batteries - energy density of around 1.2 Wh/cm³.

● Chemical storage / fuel cells - currently limited to hydrogen, methane or methanol; energy densities in the range of around 2 Wh/cm³.

● Heat storage - make use of the latent heat involved in melting or evaporation of phase change materials (PCM); melting energies of up to 0.14 Wh/cm³.



Energy Conversion

Photovoltaic cells

sunlight illumination density ~100mW/cm2 office lighting <1 mW/cm2

Thermoelectric converters - convert heat (temperature differences) into electrical energy using a form of thermoelectric effect ( Seebeck effect)

Mechanical converters – typically based on vibrations. Range of vibrations in machines - typically 50 to several hundred Hz

Piezoelectric converters can generate power of 10mW to several hundred mW


Node(s) Design Issues – System-on-Chip

System-on-a-Chip (SoC) as a complex integrated circuit, or integrated chipset, which combines the major functional elements, or subsystems of a complete end product into a single entity.



SoC designs typically include:

● at least one programmable processor, and very often a combination of at least one RISC control processor and one DSP; some SoC devices include multiple heterogeneous or homogeneous processors –Multiprocessor-System-on-Chip (MPSoC)

● on-chip interconnect: processor bus(es), peripheral bus(es), andperhaps a high-speed system bus

● a hierarchy of on-chip memory units (cache, main memories), and linksto off-chip memory

● hardware-based accelerating functional units (offering higherperformance and lower energy consumption) for most signal processing applications

● peripheral processing blocks for interfacing to the external world - this may include analogue components due to the analogue nature of the real world, as well as digital interfaces, for example, to system buses at a higher packaging level



SoC designs encompass both hardware and software components:

● programmable processors – supporting both fixed Instruction Set Architectures (ISA) and Application-Specific Instruction Set Processors (ASIPs)

● real-time operating systems

● peripheral device drivers

● middleware stacks for particular application domains (possibly) optimized assembly code or hardware- dependent C code for DSPs


Node(s) Design Issues – System-on-a Programmable-Chip

A shift in the SoC implementations from using custom, ASIC, or application-specific standard part (ASSP) design approaches

A SoC design approach leveraging the use of large amounts of reconfigurable logic combined with embedded RISC processors, either custom laid-out, ‘hardened’ blocks, or synthesizable processor cores, and other application oriented blocks of intellectual property (IP),in order to allow very flexible and tailorable combinations of hardware and software processing to be applied to a particular design problem.

Algorithms that consist of significant amounts of control logic, plus significant quantities of dataflow processing, can be partitioned into the control RISC processor and reconfigurable logic offering hardware acceleration.

The approach offers tremendous flexibility in modifying the design in the field and avoiding expensive Non-Recurring Engineering (NRE) charges in the design.


Node(s) Design Issues – System-on-a Programmable-Chip

System-on-a-Programmable-Chip are implemented on complex FPGAs(Field-Programmable Gate Arrays)

Altera - Stratix FPGAsNios II Soft Processor Core

Xilinx - Virtex FPGA Family (Virtex 7)Xilinx MicroBlaze Soft Processor Core


Node(s) Design Issues – Platform based design

Platform-based design as a planned design methodology is based onextensive reuse of combinations of hardware and software IP – mostlikely combinations to be needed for specific application domains

The approach reduces the time and effort required, and risk involved, indesigning and verifying a complex SoC.

Platform based design is an alternative to IP reuse in a block-by-blockmanner - platform-based design assembles groups of components intoa reusable platform architecture.

This reusable architecture, together with libraries of pre-verified and pre-characterised, application oriented HW and SW virtual components, isan SoC integration platform.



Xilinx Zynq-7000 All Programmable SoCs

Development Platforms: Traditional hardware development, and virtual development platforms

Operating Systems: Open Source Linux, Android, FreeRTOS

Design Tools - Vivado® Design Suite, Xilinx SDK, PetaLinux SDK

IP - Plug and Play



"Drive-on-a-Chip": MAX® 10 FPGA, Cyclone® V FPGA or Cyclone V SoC with High-Performance Processors, Motor Control Algorithm, I/O Logic, Industrial Ethernet Protocols, and Safety Elements



Altera SoC Implemented as a PLC on A Single Chip


Outline



Design issues




Network Design

● network/protocol selection

● physical medium selection

● network infrastructure components selection (drivers, buffers, etc.)

● topology selection

● performance analysis


Network Design

network/protocol selection


Network Design

Physical medium selection:

● Twisted pair● Fiber optics● Coax cable● Radio frequency● Power lines● Infra red


Network Design

topology selection


Specialized Communication Networks



Industrial Ethernet

Internet

Firewall

Corporate NetworkEthernet – TCP/IP protocol suite

Control Network

Ethernet – TCP/IP protocol suite

Field Area Network

Workplaces

Firewall

Field devices

Other Plant(s) Remote

user


Industrial Ethernet

Can (switched) Ethernet be used at plant/factory floor:

● for soft real-time control

● for hard real time control

● for safety critical hard real-time control


Industrial Ethernet

Requirements:

Process automation - milliseconds for a cycle (ms)Discrete automation – down to 10 μS for a cyclePower system automation – down to 1 μS for alarm conditions

Delays introduced by store and forward switches:

store and forward switch buffers and verifies each frame beforeforwarding it

● at least 123 μS (one forwarding delay) for a maximum sized Ethernetpacket (1500 bytes payload), for 100 Mbps (100BASE-TX switched)Ethernet:

● at least 12,3 μS (one forwarding delay) for a maximum sized Ethernetpacket (1500 bytes payload), for 1Gbps Ethernet


Industrial Ethernet

Requirements & Delays:

Additional delays in store-and-forward switch:

● address lookup (a few microseconds)● time spent waiting for an ongoing transmissions to finish (may range up

to several forwarding delays in the worst case).

Total delay:

● a few hundreds of μS; not uncommon over 0.5 mS, depending on thetraffic on the link connecting to the port for 100Mbps

● a few tens of μS; not uncommon over 0.50 μS, depending on the trafficon the link connecting to the port for 1GMbps


Industrial Ethernet

Requirements:

Process automation - milliseconds for a cycle (ms)Discrete automation – down to 10 μS for a cyclePower system automation – down to 1 μS for alarm conditions

Total delay:

● Around 0.5 mS - for 100Mbps● Around 0.50 μS - for 1GMbps


Industrial Ethernet

Potential remedies:

● moving in to the Gbps realm● segmentation of the network in to smaller collision domains in order to

reduce collision probability and improve overall throughput● microsegmentation - each device is located on a dedicated switch port

each device is located on a dedicated switch port – point-to-point connections; link length – 100 m (328 ft)


Industrial Ethernet

How about legacy fieldbuses?

Billions worth of $ invested in the fieldbustechnologies, billions of nodes in operation!

Ethernet encompasses Layer 1 and Layer 2,Only

All application related variables, objects andmethods are in Layer 7 (and Layer 8 – userLayer)

Potential remedies:● tunelling a fieldbus protocol over UDP/TCP/IP● tunelling TCP/IP over the fieldbus


Real-Time Ethernet

In the RTE, the random and native CSMA/CD arbitration mechanism is being replaced by other solutions allowing for:

• deterministic behavior required in real-time communication to support soft and hard real-time deadlines,

• time synchronization of activities required to control drives, for instance

• for exchange of small data records characteristic ofmonitoring and control actions.

Real-Time Ethernet (RTE): the RTE, under standardization by IEC/SC65Ccommittee, is a fieldbus technology which incorporates Ethernet for the lower two layers in the OSI model (physical layer, and data link layer including implicitly the medium access control layer).


Real-Time Ethernet

• the TCP/UDP/IP protocols suite is bypassed, the Ethernet functionality isaccessed directly – in this case, RTE protocols use their own protocol stack in addition to the standard IP protocol stack.• the Ethernet mechanism and infrastructure are modified.

There are three different approaches to meet real-time requirements:

• retaining the TCP/UDP/IP protocols suite unchanged (subject to nondeterministic delays), all real-time modifications are enforced in the top layer.


Real-Time Ethernet

“top TCP/IP”

Modbus/TPC:defined by Schneider Electric and supported by Modbus-IDA

EtherNet/IP:defined by Rockwell and supported by the Open DeviceNet Vendor Association (ODVA) and ControlNet International

P-Net (on IP): proposed by the Danish P-Net national committee,

Vnet/IP:developed by Yokogawa, Japan.

“Top of Ethernet”

Ethernet Powerlink (EPL):defined by Bernecker + Rainer (B&R), and supported by the Ethernet Powerlink Standardisation Group

TCnet (a Time-critical Control Network): a proposal from Toshiba)

EPA (Ethernet for Plant Automation): a Chinese proposal

PROFIBUS CBA (Component Based Automation): defined by several manufacturers including Siemens, and supported by PROFIBUS International

Modified Ethernet

SERCOS IIIdeveloped by SERCOS

EtherCATdefined by Beckhoff and supported by the EtherCat Technology Group

PROFINET IO defined by several manufacturers including Siemens, and supported by PROFIBUS International.


Timing and Schedulability Analysis

Timing analysis:

The timing analysis aims at obtaining actual times for the chosenarchitecture. That involves task execution time measures such as worst-case execution time (WCET), response time of a task from invocation to completion, or end-to-end delay to mention some.

Schedulability analysis:

The schedulability analysis is to ensure that the whole system maybe schedulable to guarantee that deadlines of all distributed taskscommunicating over the network will be met in all operational conditions the system is anticipated to be subjected to.


Outline



Design issues





Timing analysis:

The timing analysis aims at obtaining actual times for the chosenarchitecture. That involves task execution time measures such as worst-case execution time (WCET), response time of a task from invocation to completion, or end-to-end delay to mention some.

Schedulability analysis:

The schedulability analysis is to ensure that the whole system maybe schedulable to guarantee that deadlines of all distributed taskscommunicating over the network will be met in all operational conditions the system is anticipated to be subjected to.



Source: Industrial Information Technology Handbook, 2nd ed., CRC PressNode A – ProcessingNode B – SensorNode C - Actuator


Outline



Design issues




Wireless Sensor Networks

Major characteristics:

•Self-contained•No pre-arranged network topology: organized by nodes on ah-hoc basis.•Ability to self-heal; network operation not affected if a node goes down


Wireless Sensor Networks – Automation Perspective

Requirements on WSN in Industrial Automation:

● All nodes are essential – faulty node needs to be replaced; redundancy is too expensive (cost of installing and maintenance are dominant factors)

● Location of the placement of a sensor matters – exact locations● Strict bounds on delays (limited number of hops) – impact on network's

topology

(mains powered)routers limit sensor'scommunication topoint-to-point -lowpowercommunication




● Wireline-wireless architecture



Communication standards:

WirelessHART

ISA100

WIA-PA

Proprietary solutions


Wireless Sensor Networks – WirelessHART & ISA100a



Wireless Sensor Networks – WirelessHART & ISA100a

layer WirelessHART ISA100.11a

application HART legacy layer Object oriented, supports handling I/O hardware, protocol tunneling, etc ...

presentation Not specified Not specified

session Not specified Not specified

transport Acknowledged & unacknowledged transactions

Unacknowledged transactionsEnd-to-end security

network Communication between devices outside the immediate neighborsEnd-to-end security

Routing beyond the backbone router and into plant network

data link Communication between neighboring devices on an one-hop basis Hop-to-hop security

Handles mesh routing within a Data Link subnet which stops at backbone router.Supports slow and hybrid hoppingSingle-hop security

physical Channel 26 not included (not legal to use in some countries)

Channel 26 specified


Wireless Sensor Networks – WISA

Base station Proximity sensor

WISA (wireless sensor/actuator)system to network proximity(position) sensors

The sensors communicate with awireless base station via antennasmounted in the cell.

The base station can handle up to 120wireless sensor/actuators and isconnected to the control system via a(wireline) field bus.

To increase capacity, a number of basestations can operate in the same area.WISA provides wireless power supply to the sensors, based on magnetic coupling


Wireless Sensor Networks – WISA

● Standard Bluetooth 2.4 GHz radio transceiver and low power electronicshandle the wireless communication link.● To meet the requirements for high reliability, low and predictable delay of data

transfer, and support for high number of sensor/actuators, a specialized RF front end was developed for the base station to provide collision free air access by allocating a fixed Time Division Multiple Access (TDMA) time slot to each sensor/actuator. (the commercially available solutions such as IEEE 802.15.1/ Bluetooth, IEEE 802.15.4/ZigBee, and IEEE 802.11 variants cannot not fulfill all the requirements.)

● Frequency hopping (FH) was employed to counter both frequency-selective fading and interference effects, and operates in combination with automatic retransmission requests (ARQ).

● The parameters of this TDMA/FH scheme were chosen to satisfy the requirements of up to 120 sensor/actuators per base station.

● Each wireless node has a response or cycle time of 2 ms, to make full use of the available radio band of 80 MHz width.

● The frequency hopping sequences are cell-specific and were chosen to have low cross-correlations to permit parallel operation of many cells on the same factory floor with low self-interference.


Conclusions

Networked Embedded Systems have been a part of the industrial control and automation for well over 25 years.

Need for modular components of smart transducers

Need for a wide(r) selection of SoC design platforms for industrial control and automation applications

Need for comprehensive design platforms of industrial control and automation applications

Wireless network embedded systems for (soft) real-time control?

Thank You

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