embedded and network computing technologies1.2. requirements in order to use the qil-a9260 module,...

EMBEDDED AND NETWORK COMPUTING TECHNOLOGIES

USERS GUIDE

QIL-A9260

Calao Systems334 rue des Vingt ToisesLe MagistèreII38950 Saint Martin Le VinouxFrance

Phone = +33 (0)4 76 56 38 05Fax = +33 (0)4 76 56 38 06

E-mail = [email protected] = [email protected]

Datasheet USG-00006-A01 1/20

mailto:[email protected]:[email protected]:[email protected]:[email protected]:[email protected]:[email protected]

TABLE OF CONTENTSSection 1...............................................................................................................................................2

1.Overview.......................................................................................................................................31.1.Scope.....................................................................................................................................31.2.Synoptic................................................................................................................................31.3.QIL-A9260............................................................................................................................3

Section 2 ..............................................................................................................................................41.Setting Up the QIL-A9260...........................................................................................................4

1.1.Electrostatic Warning............................................................................................................41.2.Requirements........................................................................................................................51.3.Layout...................................................................................................................................51.4.Powering Up the Board.........................................................................................................51.5.Getting Started......................................................................................................................5

Section 3...............................................................................................................................................71.Board Description.........................................................................................................................7

1.1.Microcontroller...................................................................................................................101.2.Memory...............................................................................................................................101.3.Clock Circuitry....................................................................................................................111.4.Reset Circuitry.....................................................................................................................111.5.Power Circuitry...................................................................................................................111.6.User Interface......................................................................................................................111.7.Expansion slot.....................................................................................................................11

Section 4.............................................................................................................................................111.Configuration..............................................................................................................................11

1.1.Solder pads configuration...................................................................................................121.2.Ethernet...............................................................................................................................121.3.Expansion connector...........................................................................................................131.4.QIL-128 pins connector......................................................................................................13

Section 5.............................................................................................................................................151.Schematics..................................................................................................................................15

1.1.Schematics..........................................................................................................................21Section 6.............................................................................................................................................24

1.Errata...........................................................................................................................................24Section 7.............................................................................................................................................24

1.Revision History.........................................................................................................................241.1.Revision History.................................................................................................................24

Section 8.............................................................................................................................................241.COPYRIGHT..............................................................................................................................24


SECTION 1

1. Overview

1.1. Scope

The QIL-A9260 is a ready-to-run compact embedded module based on the AT91SAM9260 processor. It has been designed to be easily plugged on your customized base board. The QIL-A9260 is ready to use as it is provided with a pre-installed linux environment.

1.2. Synoptic


Nand Flash256Mb

E2P SPI

AT91SAM9260

50 p

in e

xpan

sion

con

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or

SDRAM64Mb

RTC SPIPHY DP83848

µSD

1.3. QIL-A9260

The module is equipped with an AT91SAM9260 (217-ball LFBGA package) together with the following:

● 64Mbytes of SDRAM memory● 256Mbytes of NAND Flash memory● 1x 64Kbytes SPI serial eeprom ● 1x M41T94 SPI real-time clock with 44bytes NVRAM● 1x µSD socket ● 1x power led (+3V3)● 1x speed led (ethernet)● 1x user led ● 1x user button ● 1x reset button ● 1x 50 pins expansion connector ● 1x 128pins QIL connector


SECTION 2

1. Setting Up the QIL-A92601.1. Electrostatic Warning

The QIL-A9260 board is shipped in protective anti-static packaging. The board must not be subjected to high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the component pins or any other metallic element.

1.2. Requirements

In order to use the QIL-A9260 module, the following items are needed:

● The QIL-A9260 module itself.● A QIL motherboard (MB-QIL-A9260 or your own motherboard)● AC/DC power adapter (5V at 2A), 2.1 mm by 5.5 mm (MB-QIL-A9260 power supply)

1.3. Layout


1.4. Powering Up the Board

The QIL-A9260 is supplied by the motherboard. It only needs a +3.3V power supply.

1.5. Getting Started

The QIL-A9260 key is delivered with a pre-installed U-Boot boot loader and an Embedded Linux operating system. Uboot and linux kernel are stored in the NAND Flash memory. You can update your board by downloading all the available sources and tools on the calao website www.calao-systems.com in order to adapt your system to your needs.


http://www.calao-systems.com/http://www.calao-systems.com/http://www.calao-systems.com/

SECTION 3

1. Board Description

AT91SAM9260 Microcontroller:

Incorporates the ARM926EJ-S™ ARM® Thumb® Processor✔ DSP Instruction Extensions, ARM Jazelle® Technology for Java®Acceleration✔ 8-KByte Data Cache, 8-KByte Instruction Cache, Write Buffer✔ 200 MIPS at 180 Mhz✔ Memory Management Unit✔ EmbeddedICE™, Debug Communication Channel Support

Additional Embedded Memories✔ One 32-KByte Internal ROM, Single-cycle Access At Maximum Matrix Speed✔ Two 4-KByte Internal SRAM, Single-cycle Access At Maximum Matrix Speed

External Bus Interface (EBI)✔ Supports SDRAM, Static Memory, ECC-enabled NANDFlash and CompactFlash®

USB 2.0 Full Speed (12 Mbits per second) Device Port✔ On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM

USB 2.0 Full Speed (12 Mbits per second) Host Single Port in the 208-lead PQFP Package and Double Port in 217-ball LFBGA Package✔ Single or Dual On-chip Transceivers✔ Integrated FIFOs and Dedicated DMA Channels

Ethernet MAC 10/100 Base T✔ Media Independant Interface or Reduced Media Independant Interface✔ 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit

Image Sensor Interface✔ ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate✔ 12-bit Data Interface for Support of High Sensibility Sensors✔ SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format

■ Bus Matrix✔ Six 32-bit-layer Matrix✔ Boot Mode Select Option, Remap Command

Fully-featured System Controller, including✔ Reset Controller, Shutdown Controller✔ Four 32-bit Battery Backup Registers for a Total of 16 Bytes✔ Clock Generator and Power Management Controller✔ Advanced Interrupt Controller and Debug Unit✔ Periodic Interval Timer, Watchdog Timer and Real-time Timer


Reset Controller (RSTC)✔ Based on a Power-on Reset Cell, Reset Source Identification and Reset Output Control

Clock Generator (CKGR)✔ Selectable 32768Hz Low-power Oscillator or Internal Low Power RC Oscillator on

Battery Backup Power Supply, Providing a Permanent Slow Clock✔ 3 to 20 MHz On-chip Oscillator, One up to 240 MHz PLL and One up to 130 MHz PLL

Power Management Controller (PMC)✔ Very Slow Clock Operating Mode, Software Programmable Power Optimization

Capabilities✔ Two Programmable External Clock Signals

Advanced Interrupt Controller (AIC)✔ Individually Maskable, Eight-level Priority, Vectored Interrupt Sources✔ Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt

Protected

Debug Unit (DBGU)✔ 2-wire UART and Support for Debug Communication Channel, Programmable ICE

Access Prevention

Periodic Interval Timer (PIT)✔ 20-bit Interval Timer plus 12-bit Interval Counter

Watchdog Timer (WDT)✔ Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow

Clock

Real-time Timer (RTT)✔ 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler✔ One 4-channel 10-bit Analog-to-Digital Converter✔ Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC)✔ 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os✔ Input Change Interrupt Capability on Each I/O Line✔ Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output✔ High-current Drive I/O Lines, Up to 16 mA Each

Peripheral DMA Controller Channels (PDC)

One Two-slot MultiMedia Card Interface (MCI)✔ SDCard/SDIO and MultiMediaCard™ Compliant✔ Automatic Protocol Control and Fast Automatic Data Transfers with PDC

One Synchronous Serial Controller (SSC)✔ Independent Clock and Frame Sync Signals for Each Receiver and Transmitter✔ I²S Analog Interface Support, Time Division Multiplex Support✔ High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer


Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)✔ Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation,

Manchester Encoding/Decoding✔ Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support✔ Full Modem Signal Control on USART0

Two 2-wire UARTs

Two Master/Slave Serial Peripheral Interfaces (SPI)✔ 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects✔ Synchronous Communications

Two Three-channel 16-bit Timer/Counters (TC)✔ Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel✔ Double PWM Generation, Capture/Waveform Mode, Up/Down Capability✔ High-Drive Capability on Ouputs TIOA0, TIOA1, TIOA2

One Two-wire Interface (TWI)✔ Master, Multi-master and Slave Mode Operation✔ General Call Supported in Slave Mode✔ Connection to PDC Channel To Optimize Data Transfers in Master Mode Only

IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins

Required Power Supplies:✔ 1.65V to 1.95V for VDDBU, VDDCORE, VDDOSC and VDDPLL✔ 3.0V to 3.6V for VDDIOP0, VDDIOP1 (Peripheral I/Os) and VDDANA (Analog to

Digital Converter)✔ Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os)

Available in a 208-lead PQFP and 217-ball LFBGA Package


1.1. Microcontroller

1x LFBGA 217-ball fitted on board

1.2. Memory

1x 32Kbytes of internal ROM 2x 4Kbytes of internal SRAM 1x 64Kbytes SPI EEPROM memory 1x 64Mbytes of SDRAM memory (32 bits bus width) 1x 256Mbytes of NAND Flash memory (8bits bus width)


Bank Start address Size DescriptionInternal memories 0x00000000 256MbytesEBI CS0 0x10000000 256Mbytes Available on MBEBI CS1 (SDRAMC) 0x20000000 64Mbytes Soldered SDRAMEBI CS2 0x30000000 Not availableEBI CS3 (NAND) 0x40000000 256Mbytes Soldered NAND FlashEBI CS4 0x50000000 256Mbytes Available on MBEBI CS5 0x60000000 Not availableEBI CS6 0x70000000 256Mbytes Available on MBEBI CS7 0x80000000 256Mbytes Available on MB

1.3. Clock Circuitry

12Mhz standard oscillator 32768Hz crystal.

1.4. Reset Circuitry

Internal reset controller with bi-directional reset pin External reset pushbutton

1.5. Power Circuitry

On board +1.8V low dropout linear regulator

1.6. User Interface

1x user pushbutton 1x user led

1.7. Ethernet

1x DP 83848C PHY

1.8. Expansion slot

1x expansion connector.

The 50 pins expansion connector allows the developer to extend the features of the board by adding a customized daughter board.


SECTION 4

1. Configuration1.1. Solder pads configuration

Designation Default setting Feature

JP2 closed NAND chip select

opened: Nand chip select not wired

closed: Nand chip select wired

JP3 closed Phy IRQ line connection

JP4 closed User Push-button connection

JP5 1-2 VDDBU

1-2: 1.8V from the low dropout voltage regulator

2-3: VBAT signal on J1.3 (through the LP3990MF)

JP6 opened JTAG selection

opened: Embedded ICE mode

closed: Boundary scan mode

JP7 opened Boot Mode select

opened: boot from internal ROM

closed: boot from NCS0

JP8 closed User Led connection

JP9 opened Nand write protect

opened: nand flash write protection disabled

closed: nand flash write protection enabled


1.2. Ethernet

The DP83848C is wired in RMII mode.

1.3. Expansion connector

● expansion connector (J1)

Pin Description Pin Description1 +3.3V 2 GND3 VBAT 4 GPIO_B4/TXD05 NRST 6 GPIO_B5/RXD07 GPIO_B0/SPI1_MISO/TIOA3 8 GPIO_B16/TK0/TCLK39 GPIO_B1/SPI1_MOSI/TIOB3 10 GPIO_B17/TF0/TCLK411 GPIO_B2/SPI1_SPCK/TIOA4 12 GPIO_B18/TD0/TIOB413 GPIO_B3/SPI1_NPCS0/TIOA5 14 GPIO_B19/RD0/TIOB515 GPIO_C5/A24/SPI1_NPCS1 16 GPIO_B20/RK0/ISI_D017 GPIO_C4/A23/SPI1_NPCS2 18 GPIO_B21/RF0/ISI_D119 GPIO_C3/SPI1_NPCS3/AD3 20 GPIO_B22/DSR0/ISI_D221 PA22_GPIO_A22/ADTRG 22 GPIO_B23/DCD0/ISI_D323 GPIO_C2/PCK1/AD2 24 GPIO_B24/DTR0/ISI_D425 +3.3V 26 GND27 HDPB 28 GPIO_B25/RI0/ISI_D529 HDMB 30 GPIO_B26/RTS0/ISI_D631 GND 32 GPIO_B27/CTS0/ISI_D733 GPIO_C12/IRQ0/NCS7 34 GPIO_B10/TXD3/ISI_D835 GPIO_A25/TCLK0 36 GPIO_B11/RXD3/ISI_D937 GPIO_A26/TIOA0 38 GPIO_B12/TXD5/ISI_D1039 GPIO_C9/NCS5/CFCS1/TIOB0 40 GPIO_B13/RXD5/ISI_D1141 GPIO_A29/SCK1 42 GPIO_B28/RTS1/ISI_PCK43 GPIO_B6/TXD1/TCLK1 44 GPIO_B29/CTS1/ISI_VSYNC45 GPIO_B7/RXD1/TCLK2 46 GPIO_B30/PCK0/ISI_HSYNC47 GPIO_C0/SCK3/AD0 48 GPIO_B31/PCK1/ISI_MCK49 +1.8V 50 GND


1.4. QIL-128 pins connector

J3 Pin Description Pin Description1 +3.3V 2 GND3 A0 4 D05 A1 6 D17 A2 8 D29 A3 10 D311 A4 12 D413 A5 14 D515 A6 16 D617 A7 18 D719 GND 20 +3.3V21 A8 22 D823 A9 24 D925 A10 26 D1027 A11 28 D1129 A12 30 D1231 A13 32 D1333 A14 34 D1435 A15 36 D1537 +3.3V 38 GND39 A16 40 GPIO_C3/SPI1_NPCS3/AD341 A17 42 GPIO_C6/IOB2/CFCE143 A18 44 GPIO_C7/IOB1/CFCE245 A19 46 GPIO_C8/NCS4/CFCS0/RTS347 A20 48 GPIO_C10/A25/CFRNW/CTS349 A21 50 GPIO_C15/NWAIT/IRQ151 A22 52 CFWE_NWE_NWR053 GPIO_C4/A23/SPI1_NPCS2 54 CFOE_NRD55 GPIO_C5/A24/SPI1_NPCS1 56 CFIOW_NBS3_NWR357 GPIO_C1/PCK0/AD1 58 CFIOR_NBS1_NWR159 GPIO_C13/FIQ/NCS6 60 NCS061 GPIO_C12/IRQ0/NCS7 62 NRST63 GND 64 +3.3V


J4 Pin Description Pin Description1 +3.3V 2 GND3 GPIO_A23/TWD 4 GPIO_B4/TXD05 GPIO_A24/TWCK 6 GPIO_B5/RXD07 GPIO_A25/TCLK0 8 GPIO_B16/TK0/TCLK39 GPIO_A26/TIOA0 10 GPIO_B17/TF0/TCLK411 GPIO_C9/NCS5/CFCS1/TIOB

012 GPIO_B18/TD0/TIOB4

13 GPIO_B6/TXD1/TCLK1 14 GPIO_B19/RD0/TIOB515 GPIO_A27/TIOA1 16 GPIO_B20/RK0/ISI_D017 GPIO_B7/RXD1/TCLK2 18 GPIO_B21/RF0/ISI_D119 GPIO_A28/TIOA2 20 GPIO_B22/DSR0/ISI_D221 GPIO_A29/SCK1 22 GPIO_B23/DCD0/ISI_D323 GPIO_A31/SCK0/TXD4 24 GPIO_B24/DTR0/ISI_D425 GPIO_A30/SCK2/RXD4 26 GPIO_B25/RI0/ISI_D527 GPIO_B8/TXD2 28 GPIO_B26/RTS0/ISI_D629 GPIO_B9/RXD2 30 GPIO_B27/CTS0/ISI_D731 GPIO_A4/RTS2/MCDB2 32 GPIO_B10/TXD3/ISI_D833 GPIO_A5/CTS2/MCDB1 34 GPIO_B11/RXD3/ISI_D935 GPIO_B15/DTXD 36 GPIO_B12/TXD5/ISI_D1037 GPIO_B14/DRXD 38 GPIO_B13/RXD5/ISI_D1139 GPIO_B31/PCK1/ISI_MCK 40 GPIO_B28/RTS1/ISI_PCK41 GPIO_B30/PCK0/ISI_HSYNC 42 GPIO_B29/CTS1/ISI_VSYNC43 LAN LED ACT 44 LAN LED LINK45 LAN TX- 46 LAN TX+47 LAN RX- 48 LAN RX+49 GND 50 +3.3V51 DDP 52 DDM53 VBAT 54 GND55 HDPA 56 HDMA57 GND 58 +3.3V59 TDI 60 TDO61 TMS 62 RTCK63 TCK 64 NTRST


SECTION 5

1. Schematics1.1. Schematics


SECTION 6

1. Errata

SECTION 7

1. Revision History1.1. Revision History

Date Version Remarks2007-09-18 A01 first version

SECTION 8

1. COPYRIGHT

Notice: The products specifications provided in this datasheet are subject to change without notice.©2007 CALAO SYSTEMS-All Rights Reserved.The CALAO SYSTEMS logo is a registered trademark of CALAO SYSTEMS.All other names are the property of their respective owners.


Section 11.Overview1.1.Scope1.2.Synoptic1.3.QIL-A9260

Section 2 1.Setting Up the QIL-A92601.1.Electrostatic Warning1.2.Requirements1.3.Layout1.4.Powering Up the Board1.5.Getting Started

Section 31.Board Description1.1.Microcontroller1.2.Memory1.3.Clock Circuitry1.4.Reset Circuitry1.5.Power Circuitry1.6.User Interface1.7.Ethernet1.8.Expansion slot

Section 41.Configuration1.1.Solder pads configuration1.2.Ethernet1.3.Expansion connector1.4.QIL-128 pins connector

Section 51.Schematics1.1.Schematics

Section 61.Errata

Section 71.Revision History1.1.Revision History

Section 81.COPYRIGHT

embedded and network computing technologies1.2. requirements in order to use the qil-a9260 module,...

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