electromagnetics r14 update 2 - ansys · hfss far field link simulated with 8 cores ie: 48.3min and...

© 2011 ANSYS, Inc. February 24, 20121

ElectromagneticsR14 Update

Greg Pitner


HFSSVersion 14


HFSS Overview• Advanced Integrated Solver Technologies

– Finite Arrays with Domain Decomposition– Hybrid solving: FEBI, IE Regions

• Physical Optics Solver in HFSS‐IE• Transient Finite Elements improvements• Huray surface roughness model• Usability Enhancement

– Radiated fields…..– Network installation improvements– 3D modeler improvements

• CAD Integration in Workbench– Improved Multiphysics flow


Finite Arrays with Domain DecompositionEfficient solution for repeating geometries (array) with domain decomposition technique (DDM)


A Review: Domain Decomposition

Distributed memory parallel solver technique

Distributes mesh sub‐domains to network of processors

Significantly increases simulation capacity

Highly scalable to large numbers of processors

Automatic generation of domains by mesh partitioning

• User friendly• Load balance

Hybrid iterative & direct solver• Multi‐frontal direct solver for each sub‐

domain• Sub‐domains exchange information

iteratively via Robin’s transmission conditions (RTC)

Distributes mesh sub-domainsto networked processors and memory


Finite ArraysSolve large finite array designsEfficient setup and solutionDefine unit cell and array dimensions• Efficient geometry creation and representation

Efficient Domain Decomposition solution

• Leverages repeating nature of array geometries

• Only mesh unit cell• Virtually repeat mesh throughout array

Post‐process full S‐parameter• Couplings included• Edge effects included3D field visualizationFar field patterns for full array

Memory efficient Enabled with the HFSS HPC

product


Finite Arrays by Domain Decomposition• Each element in array treated as solution domain

• One compute engine can solve multiple elements/domains in series

Distributes element sub-domainsto networked processors and memory


Example: Skewed Waveguide Array

• 16X16 (256 elements and excitations)

• Skewed Rectangular Waveguide (WR90) Array– 1.3M Matrix Size

• Using 8 cores– 3 hrs. solution time– 0.4GB Memory total

• Using 16 cores– 2 hrs. solution time– 0.8GB Memory total

• Additional Cores– Faster solution time– More memory.

Unit cell shown with wireframe view of virtual array


Skewed Waveguide Array

• Patterns from 8X8 Array– Dashed is

idealized infinite array analysis

– Solid from finite array analysis

• Two simulations use identical mesh

• Note edge effects due to finite array size


Efficient: 8X8 Array Patch Array

Direct solver with 12 cores

•5:05:14•60.8 GB RAM

Finite Array with 12 cores

•00:44:53•1.8 GB


Hybrid Finite Element‐Integral Equation Method

Finite Elements vs. Integral Equations

• Integral Equation Based Method– HFSS‐IE– Efficient solution technique for

open radiation and scattering– Surface only mesh and current

solution

Airbox not needed to model free space radiation

Airbox required to model free space radiation

• Finite Element Based Method– HFSS

– Efficient handle complex materialand geometries

– Volume based mesh and field solutions

This Finite Element-Boundary Integral hybrid method leverages the advantages of both methods to achieve the most accurate and robust solution for radiating and scattering problems

Conformal radiation volume with Integral Equations


HFSS Hybrid Solving• Hybrid Solving introduced in HFSS 13 with FEBI– A highly accurate solution for open boundary problems

• Accurate: Solves directly for equivalent surface currents on boundary conditions • Efficient: Conformal arbitrary shape BC to reduce FEM solution domain• Reflectionless: can be placed closed to radiating surface. • Does not have to be continuous: provides possibility of physically separate FEM volumes


HFSS Hybrid Solving – IE Regions

• Parallelized– IE regions

solved in parallel.

– Analogous to FEM domains

• Rigorous– Multiple

reflection

• Automated


IE Dielectric Regions• Solve “large homogeneous blocks of dielectric” with a “boundary condition”– Replace enclosed arbitrary dielectrics– Solve with multiple open or enclosed IE regions– Conducting IE regions may be inside dielectric IE regions

FEM

Conducting IE

Enclosed IE

Ground Penetrating RadarAntenna

Air

Surface

Soil

Mine

Different solution domains may be solved in parallel with DDM


HFSS‐IE POAsymptotic solver for extremely large

problems• In HFSS‐IE• Solves electrically huge problems• Currents are approximated in illuminated regions– Set to zero in shadow regions

• No ray tracing or multiple “bounces”

Target applications:• Large reflector antennas• RCS of large objects such as satellites

Option in solution setup for HFSS‐IE.Sourced by incident wave excitations• Plane waves or linked HFSS designs as a source


PO Solver in HFSS-IE 14

• PO assumes the fields on all illuminated surface are the incident fields

• Effects of the scatterers are included by assuming the incident fields are scattered at each point on the body as if it were reflected from an infinite tangent plane at that point; J~2(n x Hinc ) for PEC.

• For non-illuminated surfaces the J are set to zero.

Where: JPO = 2(n x Hinc )

PEC


PO Examples

Notice the shadowing of the gun barrel on the tank and the tank on the ground.


HFSS‐IE PO ‐ Example

Offset reflector 50 λ0 in diameter fed by a horn HFSS far field link

Simulated with 8 coresIE: 48.3min and 11.9GBPO: 23S and 286MBNote > 120x speedup


Huray Surface Roughness Model

• Realistic loss model for rough conductor surfaces


Save Radiated Field Data Only• Reduces the amount of data stored on hard drive for large antenna problems• Setting in Solution Setup, Advanced Tab: discrete and fast sweeps

~10X Reduction


Import List Entry for Edit Sources

Easy input for magnitude and phase from source list• Can include parametric variables


Interpolating Sweep Passivity

• Interpolating sweep algorithm can check for passivity during the sweep and solve at any interpolated points found to be nonpassive


Show Nets

“Show Nets” identifies 3D conducting paths between terminals


DesignerVersion 7


Designer Overview• Parameterized padstacks• Automated causal material• Multi‐frequency point adapting• Integrated 2D/3D views• Huray surface roughness models• Lumped Port De‐embedding• Trapezoidal trace cross‐sections• Automated Virtuoso HFSS Design• Passivity enforced interpolation• HFSS Solves from within Cadence• User‐defined outputs• IBIS AMI enhancements


• Set up project within 2D layout environment of Designer– Layers, vias, PCB‐oriented geometry primitives– Easy port creation

• Simulate with the 3D HFSS engine

HFSS Solver‐on‐Demand in Designer


Parameterized Padstacks

Enables parametric investigation of via geometry, or optimization.

Applied to global padstack definition. Therefore, project variables are used:


Parameterized Differential Vias


Layout Editor Enhancements

ParameterizableEtch Factor

Parameterizable Surface Roughness

Automatic Causal Djordjevic Sarkar Dielectric Models


HFSS Setup & Solve Within Cadence

• Create and Solvemodels with HFSS from within Cadence Allegro, APD, & SiP

HFSS Solution Progress


• Also…

DDR2/3 Timing Specifications

Information source: JEDEC specification JESD79-3


User‐Defined Outputs

• UDO’s are a way of calling Python scripts from within the Designer GUI— Python is an intuitive and

powerful scripting language with a large scientific and engineering user base

• Perform custom analyses on simulation waveforms— A Python script can be

written to arbitrarily post‐process waveforms


Creating a UDO‐based Report

• Once a UDO is set up, its results can be accessed like an ordinary output


DDR3 Calculations With UDO

• Voltage and timing margins can be printed in Data Table format within the Designer GUI


Macro‐Modeling with Network Data Explorer

Touchstone Models from Arbitrary Source can be converted to Multiple Model Types with Causality and Passivity Enforcement!

Advanced features

New!


High Speed Serial Design with IBIS‐AMI

• Automated IBIS‐AMI Importing– IBIS‐AMI Specification Testing

• Pass/Fail• Advanced


User Defined Transmit Jitter for HSS Design

PDF vs. timedefined in a text file

No jitter

Contents of text file userdefined.txt


SIwaveVersion 6


Signal Net Analyzer• Ideal and non‐ideal lumped parameters (i.e Zo)• Nexxim and HSPICE RLC simulations

Via to Via Coupling• Differential pair accuracy improvements

Solver Support for Arbitrary Antipad Cutouts• Improvement in via modeling accuracy

SYZ Solver Improvements• Guaranteed passive/causal SYZ solutions

FWS Improvements for Large Port Count Devices• Faster convergence and reduced RAM when using “Iterated

Fitting of Passivity” for large port count devices

Improved “Push Excitation” Accuracy & Robustness• SIwave now forces required interpolation from Designer 7.0.

Improved Surface Roughness • Added Huray surface roughness model

PI Advisor Improvements• Genetic Algorithm supports weighting of constraints• Genetic Algorithm supports new constraints

– Maximum Total Capacitor Area– Maximum Number of Capacitor Types

Improved SYZ Storage Architecture• 6x reduction in disk space for SYZ parameters

Solver

Memory and High Speed Serial Improvements

64 bit GUI for Windows

Table Impedance Calculator• Flight time plots• Transient Simulations with Nexxim or HSPICE

PKG & PCB Automation• Graphical selection & merging

Pin Grouping Automation• Multi‐part select with group per part/net definitions

Improved Validation Checker• Detection of pins belonging to multiple pin groups

Automated DCIR Reports

Equipotential Pads for DCIR Solver

Temperature Profile Plotting from Icepak

Improved Surface Roughness• Addition of Huray model in GUI

PI Advisor Improvements• Allowance of weighting constraints in GUI• Additional constraints added

– Maximum Total Capacitor Area– Maximum Number of Capacitor Types

Improved ODB++ Support

Support for X2Y Low Inductance Capacitors

GUI


Via Enhancements

Improved handling of complex via antipad geometry Capture of direct via‐to‐via coupling


Huray Surface Roughness


DDR3 Solutions: Signal Net Analyzer

• Displays Z0, length, time delay, and reference layer• All possible paths (from each pin to every other pin on net) are displayed

– Sorted in descending order of path distance• User can click on an individual path in the table

– Variation in Z0 is graphically displayed– Path is highlighted in SIwave’s main layout window

• Ideal reference layer mode (default)– Traces on top & bottom metal layers are assumed to be microstrips– Interior traces are assumed to be striplines

• Non‐ideal reference layer mode– Reference layer is explicitly calculated for each trace segment– Some traces may be floating (no suitable reference layer available)


Automated DCIR Reporting• Automatically generate a formatted report for DC IR drop simulations


Equipotential Pads for DCIR

Power Density Plot: Without Pad Power Density Plot: With Pad

Current Density Plot: Without Pad Current Density Plot: With Pad


Q3DVersion 11


Q3D Extractor Overview

Major Applications• 64 Bit Windows GUI• Magnetic Materials • Terminal Setup Improvements for AC RL Solver• Touch Panel Expression Caching for CG and RL• Selectable Frequency Export for Lumped SPICE Passives• DCRL Speed Up• CG Convergence improvements• HPC Improvements– Network Installs– Fixed Variables

• Greatly improves post processing speed for projects with large numbers of variables– i.e. Via Wizard

• 3D Modeling Enhancements• WB Integration Improvements for DSO & Optimetrics


Touch Screen Accuracy Improvements

• Added the ability to converge on off diagonal terms with Touch Panel displays


Magnetic Materials

Q3D AC 10 s Maxwell 3D 50 minQ3D DC 6min 30 sSweep 2 s

Total < 7 min 50 minPeak RAM 0.6 GB 5 GB

Simulation Time

Electroplated Nickel has 5Bulk Nickel has 600


3D Modeler Enhancements

View customization.

• Z-stretch.• 64‐bit user interface

electromagnetics r14 update 2 - ansys · hfss far field link simulated with 8 cores ie: 48.3min and...

Documents