electro-thermal stress effect on ingap/gaas heterojunction bipolar low-noise amplifier performance

5
Electro-thermal stress effect on InGaP/GaAs heterojunction bipolar low-noise amplifier performance Xiang Liu * , Jiann-shiun Yuan, Juin J. Liou School of Electrical Engineering and Computer Science, University of Central Florida, Orlando, FL 32816, USA article info Article history: Received 11 September 2009 Received in revised form 18 November 2009 Available online 6 January 2010 abstract This paper investigates the electro-thermal stress-induced performance degradation of a cascode low- noise amplifier built using advanced InGaP/GaAs heterojunction bipolar transistors. Changes in device characteristics due to the electro-thermal stress are examined experimentally. SPICE Gummel-Poon model parameters extracted from the pre- and post-stress HBT measurement data are then used in Cadence SpectreRF simulator to study the impact of the electro-thermal stress on the InGaP/GaAs LNA’s RF performance. Ó 2009 Elsevier Ltd. All rights reserved. 1. Introduction For many wireless communication applications, GaAs-based heterojunction bipolar transistors (HBTs) are viable active compo- nents, as they offer numerous advantages over conventional silicon bipolar transistors and are the technology of choice for RF inte- grated circuits (RFICs) due to their excellent performance and manufacturability [1]. Currently, the InGaP/GaAs HBTs are gradu- ally replacing the traditional AlGaAs/GaAs HBTs as the backbone in the III–V technology. This trend stems from the fact that the In- GaP/GaAs HBT can be fabricated with highly selective etch ants, thus resulting in improved yields and homogeneities compared to its AlGaAs/GaAs counterpart. Excellent linearity and noise char- acteristics have also been demonstrated for the InGaP/GaAs HBT because of its high base doping concentration and thus very small base resistance [2]. As such, the InGaP/GaAs HBT is highly suited for not only the monolithic power amplifier (PA) but also the low-noise amplifier (LNA) applications. The reliability of InGaP/GaAs HBT is of great interest because In- GaP/GaAs HBT-based RFICs have demonstrated great usefulness in both the wideband and narrowband applications and over a wide range of operating voltages [3]. Much research work has been done to study the effect of the electro-thermal stress on HBT’s perfor- mance degradation [4–9]. However, little is known about such an effect on the InGaP/GaAs HBT-based RFIC’s circuit-level perfor- mance degradation. The electro-thermal stress-induced RF performance degrada- tion of an InGaP/GaAs HBT-based LNA will be investigated in this work. First, the InGaP/GaAs HBT performance degradation sub- jected to a 2000 h electro-thermal stress will be examined experi- mentally. Then, the SPICE model parameters for the fresh and stressed HBTs will be extracted. Finally, shifts in S-parameters, noise figure, small-signal gain, and linearity of the InGaP/GaAs HBT-based cascode LNA before and after the stress will be evalu- ated via Cadence SpectreRF circuit simulation. 2. Device performance degradation subject to electro-thermal stress The cross-sectional structure of an InGaP/GaAs device under test (DUT) is given in Fig. 1. The DUT has 16 emitter fingers, each with an area of 70 2 lm 2 . The compositions of the different uni- form-concentration layers in the HBT are given in Table 1. It con- sists of a highly doped InGaAs emitter cap region followed by another cap region made of GaAs. The next three InGaP layers con- stitute the main emitter region. The lowly doped InGaP layers pro- vide ballast resistances to prevent the current collapse effect and thus enable long pulse and continuous wave operation. This is fol- lowed by a GaAs layer and an InGaP passivation ledge. The base re- gion is realized by a p-type GaAs layer. High breakdown voltage is achieved using thick n-type GaAs layers with low doping concen- trations for the collector and substrate. A thick Si 3 N 4 layer is then deposited as the surface passivation layer and as the dielectric of the MIM capacitors. As GaAs is a relatively weak material and has a poor thermal conductivity, the thermally activated device performance instabil- ities are particularly prominent for GaAs-based HBTs [4]. To inves- tigate how the electro-thermal stress affects the DUT performance, a series of carefully planned experimental procedures was per- formed. First, the average thermal resistance R th for the DUT was found to be 46.07 °C/W. A simple expression to correlate the junc- tion temperature T J and R th is given by T J ¼ T A þðR th P diss Þ ð1Þ 0026-2714/$ - see front matter Ó 2009 Elsevier Ltd. All rights reserved. doi:10.1016/j.microrel.2009.12.007 * Corresponding author. Tel.: +1 407 882 2205; fax: +1 407 823 5930. E-mail address: [email protected] (X. Liu). Microelectronics Reliability 50 (2010) 365–369 Contents lists available at ScienceDirect Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel

Upload: xiang-liu

Post on 21-Jun-2016

213 views

Category:

Documents


0 download

TRANSCRIPT

Microelectronics Reliability 50 (2010) 365–369

Contents lists available at ScienceDirect

Microelectronics Reliability

journal homepage: www.elsevier .com/locate /microrel

Electro-thermal stress effect on InGaP/GaAs heterojunction bipolar low-noiseamplifier performance

Xiang Liu *, Jiann-shiun Yuan, Juin J. LiouSchool of Electrical Engineering and Computer Science, University of Central Florida, Orlando, FL 32816, USA

a r t i c l e i n f o a b s t r a c t

Article history:Received 11 September 2009Received in revised form 18 November 2009Available online 6 January 2010

0026-2714/$ - see front matter � 2009 Elsevier Ltd. Adoi:10.1016/j.microrel.2009.12.007

* Corresponding author. Tel.: +1 407 882 2205; faxE-mail address: [email protected] (X. Liu).

This paper investigates the electro-thermal stress-induced performance degradation of a cascode low-noise amplifier built using advanced InGaP/GaAs heterojunction bipolar transistors. Changes in devicecharacteristics due to the electro-thermal stress are examined experimentally. SPICE Gummel-Poonmodel parameters extracted from the pre- and post-stress HBT measurement data are then used inCadence SpectreRF simulator to study the impact of the electro-thermal stress on the InGaP/GaAs LNA’sRF performance.

� 2009 Elsevier Ltd. All rights reserved.

1. Introduction

For many wireless communication applications, GaAs-basedheterojunction bipolar transistors (HBTs) are viable active compo-nents, as they offer numerous advantages over conventional siliconbipolar transistors and are the technology of choice for RF inte-grated circuits (RFICs) due to their excellent performance andmanufacturability [1]. Currently, the InGaP/GaAs HBTs are gradu-ally replacing the traditional AlGaAs/GaAs HBTs as the backbonein the III–V technology. This trend stems from the fact that the In-GaP/GaAs HBT can be fabricated with highly selective etch ants,thus resulting in improved yields and homogeneities comparedto its AlGaAs/GaAs counterpart. Excellent linearity and noise char-acteristics have also been demonstrated for the InGaP/GaAs HBTbecause of its high base doping concentration and thus very smallbase resistance [2]. As such, the InGaP/GaAs HBT is highly suitedfor not only the monolithic power amplifier (PA) but also thelow-noise amplifier (LNA) applications.

The reliability of InGaP/GaAs HBT is of great interest because In-GaP/GaAs HBT-based RFICs have demonstrated great usefulness inboth the wideband and narrowband applications and over a widerange of operating voltages [3]. Much research work has been doneto study the effect of the electro-thermal stress on HBT’s perfor-mance degradation [4–9]. However, little is known about such aneffect on the InGaP/GaAs HBT-based RFIC’s circuit-level perfor-mance degradation.

The electro-thermal stress-induced RF performance degrada-tion of an InGaP/GaAs HBT-based LNA will be investigated in thiswork. First, the InGaP/GaAs HBT performance degradation sub-jected to a 2000 h electro-thermal stress will be examined experi-

ll rights reserved.

: +1 407 823 5930.

mentally. Then, the SPICE model parameters for the fresh andstressed HBTs will be extracted. Finally, shifts in S-parameters,noise figure, small-signal gain, and linearity of the InGaP/GaAsHBT-based cascode LNA before and after the stress will be evalu-ated via Cadence SpectreRF circuit simulation.

2. Device performance degradation subject to electro-thermalstress

The cross-sectional structure of an InGaP/GaAs device undertest (DUT) is given in Fig. 1. The DUT has 16 emitter fingers, eachwith an area of 70 � 2 lm2. The compositions of the different uni-form-concentration layers in the HBT are given in Table 1. It con-sists of a highly doped InGaAs emitter cap region followed byanother cap region made of GaAs. The next three InGaP layers con-stitute the main emitter region. The lowly doped InGaP layers pro-vide ballast resistances to prevent the current collapse effect andthus enable long pulse and continuous wave operation. This is fol-lowed by a GaAs layer and an InGaP passivation ledge. The base re-gion is realized by a p-type GaAs layer. High breakdown voltage isachieved using thick n-type GaAs layers with low doping concen-trations for the collector and substrate. A thick Si3N4 layer is thendeposited as the surface passivation layer and as the dielectric ofthe MIM capacitors.

As GaAs is a relatively weak material and has a poor thermalconductivity, the thermally activated device performance instabil-ities are particularly prominent for GaAs-based HBTs [4]. To inves-tigate how the electro-thermal stress affects the DUT performance,a series of carefully planned experimental procedures was per-formed. First, the average thermal resistance Rth for the DUT wasfound to be 46.07 �C/W. A simple expression to correlate the junc-tion temperature TJ and Rth is given by

TJ ¼ TA þ ðRth � PdissÞ ð1Þ

Emitter

BaseCollector

Si3N4 passivation

p-GaAs (base)

n-GaAs (collector)

n-GaAs (substrate)

BaseCollector

n-InGaAs (emitter)

n-GaAs (emitter)

n-InGaP (emitter)

n-GaAs (emitter)

n-InGaP (emitter)

n-InGaP (collector)

Fig. 1. Schematic of the InGaP/GaAs HBT cross-sectional structure.

Table 1Layer compositions of InGaP/GaAs HBT from the emitter to the substrate.

Material Thickness (nm) Doping (cm�3)

n-InGaAs 100 1 � 1020

n-GaAs 150 5 � 1018

n-InGaP 100 1 � 1018

n-InGaP 400 9 � 1016

n-InGaP 100 3 � 1017

n-GaAs 20 3 � 1017

n-InGaP 40 3 � 1017

p-GaAs 140 4 � 1019

n-GaAs 3100 5.5 � 1015

n-GaAs 100 5 � 1018

n-InGaP 20 5 � 1018

n-GaAs 1 � 105 5 � 1018

Table 2SPICE Gummel-Poon HBT model parameters for pre- and post-stress conditions.

Notation Parameter name Pre-stress(0 h)

Post-stress(2000 h)

Percentageshift (%)

IS Transport saturationcurrent (A)

2.60 � 10�22 1.80 � 10�22 �30.77

BF Ideal forwardmaximum currentgain

18.6 13.7 �26.34

BR Ideal reversemaximum currentgain

0.9 0.9 0.00

VAF Forward Earlyvoltage (V)

100 100 0.00

VAR Reverse Early voltage(V)

50 50 0.00

NF Forward currentemission coefficient

1.1 1.09 �0.91

NR Reverse currentemission coefficient

1.01 1.01 0.00

NE B–E leakageemission coefficient

6.5 4.1 �36.92

NC B–C leakageemission coefficient

1.3 1.3 0.00

ISE B–E leakagesaturation current(A)

5.00 � 10�9 3.50 � 10�10 �93.00

ISC B–C leakagesaturation current(A)

2.10 � 10�13 2.10 � 10�13 0.00

IKF Forward kneecurrent (A)

0.6 0.7 16.67

IKR Reverse knee current(A)

0.55 0.55 0.00

RB Zero bias baseresistance (X)

11.3 17 50.44

RE Emitter resistance(X)

0.5 0.46 �8.00

RC Collector resistance(X)

0.5 0.5 0.00

366 X. Liu et al. / Microelectronics Reliability 50 (2010) 365–369

where TA is the ambient temperature and Pdiss is the dissipatedpower given as

Pdiss ¼ ICVCE þ IBVBE ð2Þ

Combining these equations, we can determine the current and volt-age levels required for a particular junction temperature stress.Considering a collector–emitter voltage VCE = 15 V, collector currentIC = 246 mA, and ambient temperature TA = 30 �C, the junction tem-perature can reach 200 �C. We used this overstress condition toaccelerate device aging for this study.

Based on experimental data, the SGP model parameters [10] be-fore and after electro-thermal stress were extracted. Some keySPICE parameters are listed in Table 2. It can be seen that the sat-uration current, maximum forward current gain, base–emitterleakage saturation current, and base resistance degraded signifi-cantly after stress, while the forward current emission coefficient,forward current gain roll-off, and emitter resistance changeslightly after stress. In Fig. 2, the measured InGaP/GaAs HBT’s basecurrent, collector current and current gain at different cumulativestress times were then compared with the SGP model playbackusing the extracted parameters. Good agreement between themeasurement data and model predictions demonstrates the utilityand accuracy of the approach proposed.

The increase in base current at the moderate base–emitter volt-age was quite significant, while the collector current was relativelyunchanged as seen in Fig. 2a. Consequently, the post-stress currentgain decreases significantly as a function of stress time as shown inFig. 2b. Although the physics underlying such an observation hasnot yet fully understood, one of the studies reported in the litera-ture suggested that the recombination enhanced defect diffusion isa likely kinetic attributing to this unique behavior [8].

To identify the possible origins contributing to the experimen-tally observed pre- and post-stress DUT behaviors, two-dimen-sional device simulations had been carried out using SilvacoTCAD tools [11]. To simulate the current instability of the post-stress HBT, defects of different types, densities and locations wereplaced in the device structure. These locations include emittersidewall, emitter ledge sidewall, extrinsic base surface, emitterbulk, base bulk, and heterojunction interface. Furthermore, boththe donor-type and acceptor-type traps were considered. Adonor-type trap is negatively charged when empty and becomes

0.9 1.0 1.1 1.2 1.3

10-8

10-7

10-6

10-5

10-4

10-3

10-2

10-1C

urre

nt (A

)

Base-Emitter Voltage (V)

Fresh Stress for 500 hours Stress for 2000 hours

Collector Current

Base Current

10-6 10-5 10-4 10-3 10-2

02468

10121416182022

Cur

rent

Gai

n

Collector Current (A)

Fresh (Experiment) Fresh (Model) Stress for 500 hours (Experiment) Stress for 500 hours (Model) Stress for 2000 hours (Experiment) Stress for 2000 hours (Model)

Fig. 2. (a) Pre- and post-stress HBT’s Gummel plots and (b) pre- and post-stressHBT’s current gains versus collector current. Symbols: experimental data; lines:model prediction results using SGP model equations.

0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.710-11

10-10

10-9

10-8

10-7

10-6

10-5

10-4

10-3

10-2

10-1

100

ILeakage

IB

Cu

rren

t (A

)

Base-Emitter Voltage (V)

Measured Measured Measured Measured Simulated Simulated Simulated Simulated

IC

Fig. 3. Pre- and post-stress measured and simulated Gummel plot consideringacceptor-type traps in the emitter bulk. Symbols: pre-stress; lines: post-stress.

Fig. 4. Flow chart of the proposed HBT-based RFIC’s degraded performanceevaluation methodology.

X. Liu et al. / Microelectronics Reliability 50 (2010) 365–369 367

neutral when emitting an electron. On the other hand, an acceptor-type trap is positively charged when empty and becomes neutralwhen capturing an electron. The energy of defects was assumedto locate near the middle of energy bandgap, a location wherethe electron–hole recombination is most active via the SRH recom-bination statistics. To make simulation results sensible, trappingdensities considered in simulation were within a range a few or-ders higher or lower than the doping concentrations of the emitterand base. In addition, the length of trapping distribution was cho-sen to be a value beyond which the current characteristics becomeinsensitive to the length variation. Using this approach, differentpost-stress current–voltage characteristics can be correlated to dif-ferent defect mechanisms. Finally, the current instability observedin the simulated post-stress DUT was examined in details, and theorigin of this abnormality was determined by comparing the sim-ulation results with measured data.

From this TCAD approach, we found the presence of acceptor-like defects in the emitter bulk with a density of N = 1015/cm2 givesrise to the trend observed in Fig. 2; that is, the collector current isalmost unchanged while the base current over the intermediatevoltage range is increased notably. Fig. 3 shows good agreementbetween the simulation results and measurement data. Note thatthe simulation results could not describe the large leakage currentat the low-voltage region. This is because large base leakage

currents generated from the HBT peripheries, like isolation regions,in low-VBE are not accounted for in the ATLAS simulator.

3. HBT-based low-noise amplifier RF performance analysis

It has been illustrated in the previous section that InGaP/GaAsHBT’s DC performance degrades significantly after the electro-ther-mal stress. It is also desirable and beneficial to be able to evaluatethe impact of the stress on the HBT-based RFIC performances. Here,we propose an approach shown in Fig. 4 to combine the device-le-vel data, Cadence SpectreRF simulator, and analytical equations toanalyze the stress-induced RF performance degradation of an In-GaP/GaAs HBT-based LNA. This method is practical and accurate,and it is a helpful tool for the design of more reliable HBT-basedRFICs. The DUTs were first stressed at a certain stress condition,and the SGP model parameters were then extracted from thepre- and post-stress measurement data. This was followed by Ca-dence SpectreRF simulation, from which the degraded RFICs’ per-formance could be obtained.

The main function of an LNA is to provide a certain amount ofpower gain while maintaining a minimum noise figure. For illus-tration purpose, a two-stage, single-ended InGaP/GaAs HBT-basedLNA design for the IEEE 802.11 g standard at the S-band (2.4 GHz)[12] has been chosen in our study. Fig. 5 shows the schematic ofthe LNA including the input and output matching networks. Thecapacitors C1 and C2 fulfill the criterion of DC voltage blocking.

Fig. 5. Two-stage single-ended InGaP/GaAs HBT-based RF low-noise amplifier.

3.3

3.6

3.9

in (d

B)

Fresh Stress for 500 hours Stress for 2000 hours

368 X. Liu et al. / Microelectronics Reliability 50 (2010) 365–369

They also tune out the inductors to serve as part of the matchingnetworks to transform the input and output impedances to 50-Xsource impedance. Transistor Q1 forms the inductively-degener-ated common–emitter transconductance stage, which convertsthe RF input power into current. Transistor Q3 is used to bias thebase of Q1, and resistor R1 is designed to isolate the bias circuitryfrom the input of the transconductance stage. R1 is typically de-signed to have a large resistance in order to reduce the noise con-tribution from the bias circuitry and avoid significant loading onthe RF input port, which would increase the noise figure. On theother hand, a small resistance is needed to improve the linearityof the transconductance stage. Hence, there is a trade-off betweennoise figure and linearity in choosing the value of R1. Transistor Q2

eliminates the Miller effect on the collector–base parasitic capaci-tor, making input and output matching simple and almost inde-pendent to each other to enable a good reverse isolation andthereby providing excellent stability [13]. L1 and L3 are used tooptimize the input and output matching conditions, whereas L2

is the degeneration inductor to provide noise matching and gainmatching at the same time, improve linearity and reduce internalnoise by feedback. All the components are designed to optimizethe figures of merit for the LNA under the fresh condition. The val-ues of these circuit components are: RFin = 2.4 GHz, Pin = -50 dBm,C1 = 0.33 lF, C2 = 0.33 lF, R1 = R2 = 500 X, R3 = 400 X, L1 = 300 pH,L2 = 15 pH, L3 = 20 nH, and VCC = 5 V (VCC is the supply voltage).

The LNA is primarily characterized by the power gain, noise fig-ure (NF) and the 3rd-order intercept point referred to the input(IIP3). The LNA’s S-parameters, noise figures and IIP3 shifts as afunction of the cumulative stress time at 2.4 GHz are given in Table3. At the operation frequency (2.4 GHz), S11 and S12 change slightly,the amplitude of the input return loss degrades 6%, and the outputreturn loss degrades only 0.27% after the 2000 h of stress. On theother hand, the forward transducer gain S21 diminishes 13.4%and the reverse isolation changes 23% after stress. Considering

Table 3Simulated stress-induced InGaP/GaAs HBT-based LNA’s RF performance shifts.

Parameter @ 2.4 GHz Stress time

Fresh 500 h 2000 h

S11 (dB) �45.31 �43.59 �42.57S12 (dB) �87.33 �87.37 �87.57S21 (dB) 13.08 12.67 11.33S22 (dB) �101.3 �83.82 �78.05NF (dB) 2.71 2.73 3.04NFmin (dB) 2.61 2.62 2.89IIP3 (dBm) 5.33 4.89 3.16

the long-term stress duration and a significant decrease in theHBT’s current gain, the power gain S21 degradation is very limited.The noise figure (NF) and minimum noise figure (NFmin) degrade12.2% and 10.7%, respectively, at 2.4 GHz after 2000 h of stress.Fig. 6 shows the pre- and post-stress NFmin as a function of fre-quency. The LNA’s NF originated from Q1 [14], and noise in Q1

comes mainly from its base current IB, base resistance RB and col-lector current IC. Their respective noise spectral densities are2qIB, 4kT/RB and 2qIC. After the stress, the base current increasessignificantly and the collector current remains unchanged, whilethe base resistance is also increased. Thus, the noise spectral den-sity associated with the base current is increased, while the baseresistance thermal noise spectral density is decreased after stress,which increased the overall NF by 12.2%.

From analytical point of view, the noise figure equation is givenas NF ¼ NFmin þ Rn

GsjYs � Ys;optj [15], where Rn is the noise resistance,

Ys is the source termination admittance and Ys,opt is the optimumnoise matching source admittance. The noise resistance determinesthe sensitivity of noise figure to derivations from the optimumnoise source admittance. If Ys is equal to Ys,opt, the NF of Q1 reachesits minimal value NFmin. In our case, the values of NF are quite closeto that of NFmin, indicating the source is noise matched. After thelong-term stress, the reduction of current gain increased the valueof NFmin. The increase in NFmin together with the increases in Rn and

2.0 2.2 2.4 2.6 2.8 3.02.4

2.7

3.0NF m

Frequency (GHz)

Fig. 6. Simulated pre- and post-stress minimum noise figures of the InGaP/GaAsHBT-based LNA.

X. Liu et al. / Microelectronics Reliability 50 (2010) 365–369 369

IB changed the real part of the complex input impedance from theoptimum noise matching condition and therefore degraded theNF after stress.

To evaluate the linearity degradation, two-tone simulation wasperformed for the LNA at 2.4 GHz. Volterra series analysis showsthat the linearity performance relates to the device parameters ofQ1 (i.e. impedance at the base and emitter, transconductance, dy-namic base resistance and parasitic capacitances). The simulatedIIP3 changed from 5.33 dBm for the fresh condition to 3.16 dBmafter the 2000 h stress, suggesting a considerable degradation inthe LNA’s linearity.

4. Conclusion

InGaP/GaAs HBT-based LNA subject to the electro-thermalstress was studied, and it’s RF performance degradation evaluated.The stress effect on the HBT DC characteristics was first examinedexperimentally. The two-dimensional device simulations showed astrong correlation between the defects generated in the emitterbulk and the commonly observed abnormal base current in post-stress HBTs. The SGP model parameters were also extracted basedon pre- and post-stress HBT measurement data, and the SGP modelpredictions for the HBT’s pre- and post-stress DC performancewere illustrated. Finally, a cascode InGaP/GaAs HBT-based LNAwas considered, and it’s stress-induced RF performance degrada-tion at 2.4 GHz was evaluated using the SGP model developedand Cadence SpectreRF simulator. The cascode LNA’s post-stresssmall-signal power gain, noise figure, and linearity showed moder-ate to significant degradations after a 2000 h stress.

Acknowledgement

This work was supported in part by Thales Alenia Space inFrance.

References

[1] Pavlidis D. HBT vs. PHEMT vs. MESFET: What’s best and why. In: GaAs Mantechconference; 1999.

[2] Myoung S, Cheon S, Yook J. Low noise and high linearity LNA based on InGaP/GaAs HBT for 5.3 GHz WLAN, In: Gallium arsenide and other semiconductorapplication symposium; 2005. p. 89–92.

[3] Kim ME, Oki AK, Gorman GM, Umemoto DK, Camou JB. GaAs heterojunctionbipolar transistor device and IC technology for high-performance analog andmicrowave applications. IEEE Trans Microw Theor Tech1989:1286–303.

[4] Hafizi ME, Pawlowicz LM, Tran LT, Umemoto DK, Streit DC, Oki AK, et al.Reliability analysis of GaAs/AlGaAs HBT’s under forward current/temperaturestress. IEEE GaAs IC Symp 1990:329.

[5] Maneux C, Labat N, Saysset N, Touboul A, Danto T. Experimental analysis and2D simulation of AlGaAs/GaAs HBT base leakage current. Microelectron Reliab1997:1707.

[6] Liou JJ, Huang CI, Bayraktaroglu B, Williamson DC, Parab KB. Base and collectorleakage currents of AlGaAs/GaAs heterojunction bipolar transistors. J ApplPhys 1994:3187–93.

[7] Chang YH, Li GP. Degradation mechanism of base current increase underforward current stress in AlGaAs/GaAs heterojunction bipolar transistors. ApplPhys Lett 1995:2721–3.

[8] Liou JJ, Huang CI. Base and collector currents of pre- and post-burn-inAlGaAs/GaAs heterojunction bipolar transistors. Solid State Electron1994:1349–52.

[9] Rezazadeh A, Bashar SA, Sheng H, Amin FA, Khalid AH, Sotoodeh M, et al.Reliability investigation of InGaP/GaAs HBTs under current and temperaturestress. Microelectron Reliab 1999:1809–16.

[10] Antognetti P, Massobrio G. Semiconductor device modeling with SPICE. NewYork: McGraw-Hill; 1988.

[11] ATLAS user’s manual. Slivaco International; 2006.[12] Klepser B, Punzenberger M, Ruhlicke T, Zannoth M. 5-GHz and 2.4-GHz dual-

band RF-transceiver for WLAN 802.11 a/b/g applications. In: IEEE radiofrequency integrated circuits symposium; 2003. p. 37–40.

[13] Girlando G, Palmisano G. Noise figure and impedance matching in RF cascodeamplifiers. IEEE Trans Circ Syst II Analog Dig Signal Process1999:1388–96.

[14] Fong KL. High-frequency analysis of linearity improvement technique ofcommon-emitter transconductance stage using a low-frequency-trapnetwork. IEEE J Solid State Circ 2000(August):1249–52.

[15] van der Ziel A. Representation of noise in linear two ports. Proc IEEE1969:1211.