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Lecture 02

Register Transfer Level (RTL) Design

EL5067 Sistem VLSI UntukKomunikasi Digital

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Introduction to RTL Design

Controllers

Combinational

logic

n0s1 s0

n1

bobi

clkState register

F

SM

inputs

F

SM

outputs

ALU

Comparator

Register file

Register

Combinational

logic

n0s1 s0

n1

bobi

State register

Register file

ALU

Datapath

Controller

Datapath Components

Custom Processor

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Level Deskripsi Desain

Algorithmic level

Register Transfer Level

Logic (gate) level

Circuit (transistor) level

Physical (layout) level

Level Deskripsi yang

paling cocok untuk sintesis

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Register Transfer Level (RTL)

Rangkaian Logika

KombinasionalRangkaian Logika

Kombinasional

Register

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Sintesis

architecture MLU_DATAFLOW of MLU is

signal A1:STD_LOGIC;

signal B1:STD_LOGIC;

signal Y1:STD_LOGIC;

signal MUX_0, MUX_1, MUX_2, MUX_3: STD_LOGIC;

beginA1

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Metode Desain RTL

1. Susun suatu High-Level State

Machine(HLSM)

2. Buat Datapath3. Hubungkan Datapath ke

Controller

4. Susun FSMuntuk Controller5. Nyatakan FSMD dalam HDL

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Contoh: Pengukur Jarak Berbasis-Laser

Pengukuran Jarak Berbasis-Laser

Tembakkan laser, ukur T (time of flight

) Laser bergerak dengan kecepatan cahaya yaitu

3x108

m/det

Jarak obyek ukur, D = T (det) 3x108

(m/det)

Obyek

ukur

D

2D = T (det ) 3x108 (m/det)

sensor

laser

T (dalam detik)

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Step 1 : Susun High-Level State Machine

Input/output

B: input 1-bit, dari tombol, tanda mulai pengukuran

L: output 1-bit, mengaktifkan laser

S: input 1-bit, mendeteksi pantulan laser

D: output 16-bit, merepresentasikan jarak obyek ukur

sensor

laser

T (dlm detik)

Berbasis-

Laser

Jarak

Pengukur

16

dari tombol

ke displayS

L

D

Bke laser

dari sensor

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Nyatakan input dan output, buat diagram blok

Buat state awal, namai S0

Keadaan awal: laseroff(L=0)

Keadaan awal: tampilan jarak = 0 (D=0)

Berbasis-

Laser

Jarak

Pengukur

16

dari tombol

ke displayS

L

D

Bke laser

dari sensor

Input: B(1 bit), S (1bit)Output: L (1bit), D (16 bit)

S0 ?

L = 0 (laserOFF)D = 0 (jarak = 0)

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Tambahkan sebuah state, namai S1, yangmerepresentasikan keadaan menunggu tombol B

ditekan

S0

L = 0D = 0

S1 ?

B (tombol tdk ditekan)

B(tombolditekan)

S0

Input: B(1 bit), S (1bit)

Output: L (1bit), D (16 bit)

Berbasis-

Laser

Jarak

Pengukur

16

dari tombol

ke displayS

L

D

Bke laser

dari sensor

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Tambahkan sebuah stateS2 , yang mewakilikeadaan laser diaktifkan (L=1)

Kemudian matikan laser (L=0) pada stateS3

S0 S1 S2L = 0D = 0

L = 1(laser ON)

S3L = 0

(laser OFF)

B

B

Input: B (1 bit), S (1 bit)Output: L (bit), D (16 bits) Berbasis-

Laser

Jarak

Pengukur

16

dari tombol

ke displayS

L

D

Bke laser

dari sensor

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Ukur waktu dengan menghitung jumlah c lock cyc leselama

berada di S3 Untuk mencacah, gunakan Dctr

Naikkan Dctr untuk setiap clock cycle selama di S3

Inisialisasi Dctr = 0 pada S1. (boleh juga pada S2 )

Register Lokal: Dctr (16 bits)

S0 S1 S2 S3

L = 0D = 0

L = 1 L = 0Dctr = Dctr + 1

(hitung jumlah cycle)

Dctr = 0(reset jumlah

clock cycle)

B

B

S (tdk ada pantulan)

S (ada pantulan)?

Input: B (1 bit), S (1 bit) Output: L (1 bit), D (16 bit)


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Jika pantulan terdeteksi (S), pergilah ke stateS4

Dengan asumsi frekuensi clock 3x108Hz, Dctr

merepresentasikan bilangan dalam meter, jadi D=Dctr/2

S0 S1 S2 S3

L = 0D = 0 L = 1L=0

Dctr = Dctr + 1Dctr = 0

B S

B S

D = Dctr / 2(hitung jarak D)

S4

Register Lokal: Dctr (16 bit)

Input: B (1 bit), S (1 bit) Outputs: L (1bit), D (16 bit)

Berbasis-

Laser

Jarak

Pengukur

16

dari tombol

ke displayS

L

D

Bke laser

dari sensor

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Step 2 : Buat Datapath

Datapath haruslah mampu mengimplementasi penimpanan data

mengimplementasi komputasi data

Perhatikan HLSM, lakukan 3 langkah berikut

(a) Buat input/output data menjadi input/outputdatapath

(b) Representasikan setiap register lokal di datapath

(juga nyatakan suatu register untuk setiap data

output) (c) Periksa setiap state dan transisi, dan nyatakan

komponen datapath dan interkoneksinya yang

mengimplementasikan komputasi data

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Step 2: Buat Datapath

DatapathDreg_clr

Dctr_clr

Dctr_cnt

Dreg_ld

Register Lokal : Dctr (16 bits)

S0 S1 S2 S3

L = 0D = 0 L = 1 L=0Dctr = Dctr + 1Dctr = 0

B S

B S

D = Dctr / 2(hitung D)

S4

load

Q

IDreg: 16-bit

register

Q

Dctr: 16-bitup-counter

16

D

clearclear

count

Input: B (1 bit), S (1 bit) Output: L (1bit), D (16 bit)

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Step 2: Create a Datapath

clear

count

clear

load

Q Q

I

Dctr: 16-bitup-counter

Dreg: 16-bitregister

16

D

Datapath

Dreg_clr

Dctr_clr

Dctr_cnt

Dreg_ld16

16

>>1

Register Lokal: Dctr (16 bit)

S0 S1 S2 S3

L = 0

D = 0

L = 1 L=0

Dctr = Dctr + 1

Dctr = 0

B S

B S

D = Dctr / 2

(hitung D)

S4

Inputs: B (1 bit), S (1 bit) Output: L (bit), D (16 bit)

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Step 3: Hubungkan Datapath ke Controller

Cock 300 MHz

D

BL

S

16

ke display

dari tombol Controller

ke laser

dari sensor

Datapath

Dreg_clr

Dreg_ld

Dctr_clr

Dctr_cnt

clearcount

clear

load

Q Q

IDctr: 16-bitup-counter


16

D

Datapath

Dreg_clr

Dctr_clrDctr_cnt

Dreg_ld 16

16

>>1

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Step 4: Susun FSM untuk Controller

Clock 300 MHz

D

BL

S

16ke display

dari tombol

Controller

ke aser

dari sensor

Datapath

Dreg_clr

Dreg_ld

Dctr_clr

Dctr_cnt

Inputs: B, SOutputs: L, Dreg_clr, Dreg_ld, Dctr_clr, Dctr_cnt

S0 S1 S2 S3

L = 0 L = 1 L = 0L = 0

B S

B S

S4

L = 0

Input: B (1bit), S (1 bit) Outputs: L (bit), D (16 bit)Register Lokal: Dctr (16 bit)

S0 S1 S2 S3

L = 0

D = 0

L = 1 L=0

Dctr = Dctr + 1

Dctr = 0

B S

B S

D = Dctr / 2

(hitung D)

S4

Dreg_clr = 1

Dreg_ld = 0

Dctr_clr = 0

Dctr_cnt = 0

(laser off)

(clear D reg)

Dreg_clr = 0

Dreg_ld = 0

Dctr_clr = 1

Dctr_cnt = 0

(clear count)

Dreg_clr = 0

Dreg_ld = 0

Dctr_clr = 0

Dctr_cnt = 0

(laser on)

Dreg_clr = 0

Dreg_ld = 0

Dctr_clr = 0

Dctr_cnt = 1

(laser off)

(count up)

Dreg_clr = 0

Dreg_ld = 1

Dctr_clr = 0

Dctr_cnt = 0

(load D reg with Dctr/2)

(stop counting)

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S0 S1 S2 S3

L = 0 L = 1 L = 0L = 0

B S

B SS4

L = 0Dreg_clr = 1

Dreg_ld = 0

Dctr_clr = 0

Dctr_cnt = 0

(laser off)

(clear reg D)

Dreg_clr = 0

Dreg_ld = 0

Dctr_clr = 1

Dctr_cnt = 0

(clear count)

Dreg_clr = 0

Dreg_ld = 0

Dctr_clr = 0

Dctr_cnt = 0

(laser on)

Dreg_clr = 0

Dreg_ld = 0

Dctr_clr = 0

Dctr_cnt = 1

(laser off)

(cacah naik)

Dreg_clr = 0

Dreg_ld = 1

Dctr_clr = 0

Dctr_cnt = 0

(isi D-reg dg Dctr/2)

(berhenti mencacah)

S0 S1 S2 S3

L = 0 L = 1 L = 0

B S

B S

(laser on)

S4

Input: B, S Output: L, Dreg_clr, Dreg_ld, Dctr_clr, Dctr_cnt

Dreg_clr = 1

(laser off)

(clear D-reg)

Dctr_clr = 1Dctr_cnt = 1

(laser off)

(cacah naik)

Dreg_ld = 1

Dctr_cnt = 0


(berhenti mencacah)

(clear count)


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300 MHz Clock

D

BL

S

16ke display

dari tombol

Controller ke laser

dari sensor

Datapath

Dreg_clr

S0 S1 S2 S3

L = 0 L = 1 L = 0

B S

B S

(laser on)

S4

Input: B, S Output: L, Dreg_clr, Dreg_ld, Dctr_clr, Dctr_cnt

Dreg_clr = 1

(laser off)

(clear D-reg)

Dctr_clr = 1

(clear count) Dctr_cnt = 1

(laser off)

(cacah naik)

Dreg_ld = 1

Dctr_cnt = 0


(berhenti mencacah)

Dreg_ld

Dctr_clr

Dctr_cnt

clearcount

clear

load

Q Q



16

D

Datapath

Dreg_clr

Dctr_clrDctr_cnt

Dreg_ld 16

16

>>1


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Kode VHDL pada Level

Teratas (Top Level)

300 MHz Clock

D

BL

S

16

ke display

dari tombol

Controller

ke laser

dari sensor

Datapath

Dreg_clr

Dreg_ld

Dctr_clr

Dctr_cnt

Step 5: Representasi dalam VHDL

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Datapath merupakan interkoneksi

dari komponen-komponen Datapath

Asumsikan komponen: up-counter,register, dan shift-right sudah tersedia300 MHz Clock

D

BL

S

16

Controller

Datapath

Dreg_clr

Dreg_ld

Dctr_clr

Dctr_cnt

clearcount

clear

load

Q Q



16

D

Datapath

Dreg_clr

Dctr_clrDctr_cnt

Dreg_ld 16

16

>>1

Step 5: Representasi dalam VHDL

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300 MHz Clock

D

BL

S

16

Controller

Datapath

Dreg_clr

Dreg_ld

Dctr_clr

Dctr_cnt

clearcount

clear

load

Q Q



16

D

Datapath

Dreg_clr

Dctr_clrDctr_cnt

Dreg_ld 16

16

>>1

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Step 5: Kode VHDL

S0 S1 S2 S3

L = 0 L = 1 L = 0

B S

B S

(laser on)

S4

Inputs: B, S Outputs: L, Dreg_clr, Dreg_ld, Dctr_clr, Dctr_cnt

Dreg_clr = 1

(laser off)

(clear D reg)

Dctr_clr = 1

(clear count) Dctr_cnt = 1

(laser off)

(count up)

Dreg_ld = 1

Dctr_cnt = 0

(load D reg with Dctr/2)

(stop counting)

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Catatan Penting

S3

Dctr = Dctr + 1

S

SS3

S/Dctr=Dctr +1

S/Dctr=Dctr+1

In the HLSM., all writes to storage items in a states actions are tostorage items that are loaded on rising clock edges only. As such,

writing a value to a storage item in a states actions does not

actually cause the storage item to be updated until the next

rising clock edge.

A simple way to visualize a states local storage is to consider those

updates as occuring on each outgoing transition instead of in the

state, as in Figure shown above.

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ICA #1: Reaction Timer

Using RTL design method discussed in class, create an RTL designof a reaction timer circuit that measures the time elapsed between

the illumination of a light and the pressing of a button by a user. The

reaction timer has three inputs, a clock input c lk, a start input

start, and a button input B, and three outputs, a light enable output

len, a 12-bit reaction time r t ime, and a s low output indicating theuser was not fast enough. The reaction timer works as follows. On

start, the reaction timer waits for 10 seconds before illuminating the

light by setting lento 1. The reaction timer then measures the length

of time in milliseconds before the user presses the button B,

outputting the time as 12-bit binary number on r t ime. If the user did

not press the button within 2 seconds (2000 milliseconds), the

reaction timer will set the output s lowto 1 and output 2000 on

r t ime. Assume your clock has a frequency of 1 kHz. Hint: Design

the datapath to structure, but design the controller to FSM only.

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HLSM untuk Reaction Timer

27

start

Done

Slow

CountWaitInit

wCount = 0

rCount = 0

B

slow = 1

rtime = rCount

len = 1

rCount = rCount +1

rtime = 0

wCount = wCount + 1

slow = 0

B (rCount < 2000)

(wCount

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DATAPATH

CONTROLLER

+1

ld

ld

clr

clrrCount

rtime

Y)

(end)

(then stmts) (else stmts)

(b)

X>Y

!(X>Y)

Max=X Max=Y

(a)

Inputs: uint X, Y

Outputs: uint Max

if (X > Y) {

}

else {

}

Max = X;

Max = Y;

C code to High Level State Machine

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C code to High-Level State Machine

sum = sum + abs(A[i] - B[i]);

Inputs: byte A[256], B[256]bit go;

Output: int sadmain(){

uint sum; short uint i;while (1) {

sum = 0;i = 0;

while (!go);

while (i < 256) {

i = i + 1;

}sad = sum;}

}

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el5067 13 lec02 rtl design

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