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Lund University / EITF35/ Steffen Malkowsky 2013 EITF35: Introduction to QuestaSim Steffen Malkowsky [email protected] 1

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  • Lund University / EITF35/ Steffen Malkowsky 2013

    EITF35: Introduction to QuestaSim

    Steffen Malkowsky [email protected]

    1

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Typical (ASIC/FPGA) Design Flow

    • RTL simulation: Proves functionality without timing information.

    • GL simulation: Verifies netlist with timing information (slow)

    • PL simulation: Verification with parasitics (even slower)

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Questasim overview

    Libraries that contain compiled components

    Shell (tcl) to write and execute commands from the prompt

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Create new project

    Project name

    Library used for simulation

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Add VHDL files

    Select files required for simulation

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Compiling the project Compile Compile Order

    Auto Generate

    A green check shows for each file if the compilation was successful

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Simulation

    Right-click on your design (testbench) and select simulate

    Signals on top level

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Adding signals to waveform

    Hierarchical design tree

    Mark signals to be shown in waveform and click Add to Wave Selected Signals

    Set run time, start simulation run or restart simulation after re-compilation

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Waveform viewer

    Different options for zooming Different options to jump with the cursor to falling or rising edges

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Waveform viewer (cont.)

    To change representation style of a bus, right-click on the signal, then Radix

    The signal is now shown in an unsigned representation instead of binary

  • Lund University / EITF35/ Steffen Malkowsky 2013

    Errors/warnings in the designs

    Error in the design/file

    Warning for the design/file

    Double-click on the message in the transcript window to get the error/warning messages

    A window stating the errors/warnings pops-up


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