eeweb pulse - issue 11, 2011

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September 13, 2

Nick SuchAwesomeTouch

Electrical Engineering Commun

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3/20EEWeb |Electrical Engineering Community Visit www.eeweb.com 3

TABLE OF C ONTENTS

Nick Such 4CO-FOUNDER AND CEO, AWESOME TOUCHInterview with Nick Such - Director of Awesome Labs at Awesome Inc.

AwesomeTouch: Wayfinding Applications 8for Public Multitouch DisplaysBY NICK SUCH

Advantages of FPGA-Based Motor Control11

BY MICHAEL PARKER WITH ALTERA

Via Return Currents and the Path of 14Least ResistanceBY MICHAEL STEINBERGER WITH SISOFT

RTZ - Return to Zero Comic 19

An introduction to AwesomeTouchs new application, AwesomeMap.

A detailed look into how FPGA design tools can simplify motor control design.

Steinberger shares his knowledge of vias as mechanisms used to establish return current paths.



INTERVIEW

AwesomeTouch

How did you get intoelectronics/engineering andwhen did you start?

I built my first circuits as a third-grade project with some help from

my dad, who likely had some helpfrom my uncle, who was an electricalengineer with AT&T, and workedon the New Jersey Relay Service.I learned HTML in fourth grade,and built my first electric bicyclein middle school. These fed pretty

well into my two loves: interactiondesign and electric vehicles.

What are your favoritehardware tools that you use?

Soldering iron, hot glue gun, andDMM.

Nick Such - Co-Founder and CEO at AwesomeTouch

What are your favoritesoftware tools that you use?

Notepad++, Pro/E, Inkscape,GIMP, InSSIDer, 360 Panorama, andRedLaser.

What is the hardest/trickiestbug you have ever xed?

While I started off in preschoolplaying games on a Commodore64, my first real computer ran theoriginal version of Windows 98. This

version had minimal support forUSB. When I received a new USBgame controller for my birthday, I

wanted to use it on my computer.So I upgraded (one INF and DLL ata time) from Win98 First Edition to

Win98 Second Edition.

What recommendations wouldyou give to young studentsaspiring to be engineers?

Be curious and become a hacker.Im not talking about stealing

passwords and credit card info,but rather, realize that you have theability to change the world from thestate in which it is presented to youinto whatever state you envision.There is so much technologyfloating around you that can beeasily modified to suit the worldsneeds. Poke around, and find waysto make new and better tools forhumanity. Learn that failure is akey tool for engineers; how can

we know what something is ableto do until we push it to its limits?And when you get to that limit,trace your steps back and use thisnewfound context to learn whythings are the way they are.

What is on your bookshelf?

Here (www.shelfari.com/nicksuch/shelf) is a list of my books, as wellas books on leadership, and lots of

Michael Crichton.

Do you have any tricks upyour sleeve?

It has amazed me how the simpleability to translate betweenengineering-speak and normalhuman language can be a pivotalfactor in the success of my projects.

Nick Such
http://www.shelfari.com/nicksuch/shelfhttp://www.shelfari.com/nicksuch/shelfhttp://www.shelfari.com/nicksuch/shelfhttp://www.shelfari.com/nicksuch/shelf


5/20



INTERVIEW

What challenges do youforesee in our industry?

Interaction with software and datawill become a seamless part ofour lives. Whether its on large-format interactive displays ormobile devices, this data will beincreasingly accessed throughgesture-based input methods.This requires a major change inthe way we design interfaces, as

well as choices for how much weallow technology to proliferate ourdaily lives. While the Day Madeof Glass (http://www.youtube.com/watch?v=6Cf7IL_eZ38) from

Corning provides an excellentproposition for the software that mycompany develops, I think there isa balance to be found among theconnected world and the naturaland human beauty on this planet.

And while electric vehicles arevery cool, Im more interested

University of Kentuckys Solar Car (See Favorite Project)

in the system-level changes

in transportation that can befacilitated through more intelligentsoftware. Energy will be one keydriver in our future transportationchoices, but with the growingubiquity of wireless connecteddevices, human productivity

is a far more significant factor.

Unless we want to continue to losethousands of lives each year fromdistracted driving, we must find abetter way to move people around

while allowing them to efficientlycommunicate and perform theirdaily tasks.

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7/20

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PROJECT

Wayfinding Applications for Public

Multitouch DisplaysBy Nick Such

About two years ago, my friends and I were runninga tech/creative office space in downtown Lexington,Kentucky. The space was awesome (in fact, we namedit Awesome, Inc.). By day it was full of some of thebrightest, most creative people in the city, each workingon turning his or her dreams into early-stage companyreality. By night, the same space, with its brightly-colored walls, modern glass and metal fixtures, andopen, flowing layout, was transformed into an art gallery

and dance studio. The energy in that place was nearlyboiling out the front door. Thats when we realized theproblem. We had six, full-height windows exposed toMain Street, so passers-by could get a vague picture of

what was going on inside our building, but they couldntget the full picture. What if they wanted to sign up fordance classes? What if they wanted to learn about theartist who created the painting on our wall? What if theyhad mad PHP skills and wanted to join one of our codingprojects? We decided that the most logical conclusion

was to turn the windows into a 30-foot touchscreen.

AwesomeTouch has spent the past year developing anapplication called AwesomeMap that stays true to thecore problem: How do we build a portal to help connectpeople to the extraordinarily useful metadata floatingover the real world? This manifested itself as we tookthe local Visitors Bureaus paper map of the city, andoverlaid it with interactive trolley routes and 250 pointsof interest. And while we didnt spring for the 30-foot

version, we have deployed these maps on 50-inch wall-

mounted touchscreens. From there, we started gettingrequests to do maps for indoor spaces, like hotels andeventually hospitals. And thats where we discovered thetrue need for what we were doing: people get lost insidebuildings.

This problem seemed to have a simple solution at first.The outdoor world has several wonderful, web-basedmapping solutions such as Google, Bing, and even

OpenStreetMap. Paired with a GPS receiver, these mapshave done amazing things for society. My dad (andmen everywhere) is no longer faced with the shame ofstopping his car to ask for directions. Using location-based check-in services like Foursquare, I can instantlyfind out where all my friends are. Farmers can automatethe planting of crops, ensuring the most efficient use ofland. But then it felt like 1492 all over again as we foundthe edge of the map: neither of these technologies,detailed maps nor accurate positioning systems, existsfor the indoor world.

A few weeks ago, we launched a project calledBuildingLayer to allow anyone to contribute maps forany building in the world. Our goal is to build a databaseof maps of the inside of buildings, and overlay this ontothe existing maps of outdoor spaces. Unlike the greatoutdoors, we cant (yet) fly a plane through a building tocapture geotagged imagery. For now, were relying onindividuals to upload known floor plans, or to recreatethe insides of buildings from memory, and the reference

Awesome

Touch



PROJECT

shape of the buildings exterior. A few companiesare working on this problem as well, and are makinggreat progress for places like shopping malls wheredemand is high. But what about the local public library?

What about constantly-changing details at places likeconvention centers? Thats where we come in.

Indoor positioning is the other half of this problem,and there are some brilliant people working to solveit. Current GPS signals deteriorate once a receiver nolonger has a clear view of the sky. Systems like A-GPSuse the signals from cell towers to triangulate a user and

augment the data provided by GPS. Other technologiestake into account the position relative to statically-located

Wi-Fi and Bluetooth access points. Combining thesesystems with NFC, accelerometers, digital compasses,and advanced computer vision, we could see indoorpositioning systems with precision within 1m. Untilthats ready, well be busy filling in the map gaps whereoutdoors ends, and indoors begins. Success for us will bedefined as solving our original problem: helping people

feel less like outsiders when theyre inside a building.

Figure 1: Maps Across Devices

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10/20

High Speed, Dual Channel, 6A, MOSFET Driver With

Programmable Rising and Falling Edge Delay Timers

ISL89367The ISL89367 is a high-speed, 6A, 2 channel MOSFET driveroptimized for synchronous rectifier applications. Internal timers

can be programmed with resistors to delay the rising and/or

falling edges of the outputs. Logically ANDed dual inputs are also

provided. One input is for the PWM signal and the second can be

used as an enable. A third control input is used to optionally

invert the logical polarity of the driver outputs.

Comparator like logical inputs allows this driver to be configured

for any logic level from 3.3V to 10 VDC. The precision logic

thresholds provided by the comparators allow the use of external

RC circuits to generate longer time delays than are possible with

the internal timers. The comparators also allow the driver to be

configured with a low output voltage that is negative relative tothe logic ground if desired. This is useful for applications that

require a negative turn-off gate drive voltage for driving FETs with

logic thresholds.

At high switching frequencies, these MOSFET drivers use very

little bias current. Separate, non-overlapping drive circuits are

used to drive each CMOS output FET to prevent shoot-thru

currents in the output stage.

An under voltage lockout (UV) insures that the driver outputs

remain off (low) during turn-on until VDD is sufficiently high for

correct logic control. This prevents unexpected behavior when

VDD bias is being applied or removed.

Features 2 outputs with 6A peak drive currents (sink and source) withoutput voltage range of 4.5V to 16V.

Typical ON-resistance ~1.

Specified Miller plateau drive currents.

EPAD provides very low thermal impedance (JC = 3C/W).

Dual logic inputs with hysteresis for high noise immunity.

Rising and/or falling output edge delays programmed with

resistors.

~ 20ns rise and fall time driving a 10nF load.

Low operating bias currents

Applications Synchronous Rectifier (SR) Driver

Switch mode power supplies

Motor Drives, Class D amplifiers, UPS, Inverters

Pulse Transformer Driver

Clock/Line Driver

3.3V

ENABLEINVA

INVBPWM

OUTB

/OUTA

VREF+

VREF-

RDELA

RDELB

FDELB

FDELA

GND

12V

FIGURE 1. TYPICAL APPLICATION

0

50

100

150

200

250

300

350

0 5 10 15 20

RISINGO

RFALLINGE

DGE

DELAY

(ns)

RDT (2k to 20k)

FIGURE 2. PROGRAMMABLE TIME DELAYS

-40C (WORST CASE)

+25C (TYPICAL)

+125C (WORST CASE)

January 31, 2011

FN7727.0

Get the Datasheet and Order Samples

http://www.intersil.com

Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2011

All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
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FPGA

Advantages of

Motor Control-based

Michael ParkerSr Technical Manager, DSP

Systems operated by electric motors commonlyutilize control loops that can monitor theposition, velocity, current or other aspects to providethe desired operation. This is accomplishedby comparing the actual measurements to adesired state, and creating an error signal fromthe difference, which is input to the control loop.The output of the control loop drives the motorresponse. The classical approach is known as PIDcontrol or designating the proportional, integrationand derivative aspects of the control loop.

The basic equation is:

increases the motor drive as the error increases.The integration term is present to eliminate a

permanent lag in the actual response from thedesired response. To accomplish this, the erroris integrated over time, and the control loop willrespond more forcefully if the error is persistent inone direction. The derivative term is used to allowthe control loop to respond very quickly to changesin the error, as can occur if the desired responsehas a step or instantaneous change. The constantfactors KP , KI and KD control the gains of theseterms.

Most modern control loops are implemented

digitally, necessitating the control loop equations tobe converted into a discrete sampled digital form,as shown in the following equation:

( ) ( )v t K K e t dt K dtd e tP I D

t

0$ $ $= +^ h #

Where v(t) is the controller output that stimulatesthe motor and the error signal e(t) = desiredresponse(t) actual response(t).

The magnitude of the response of any given timeis driven by the magnitude of the error signal. Theconstant KP is simply a proportional constant that

( ) ( ) ( ( ) ( ))v k v k K e k e k1 1P $= - + - -

( ) ( ( ) ( )K e k K e k e k2 1I D$ $+ + - - +

( ))e k 2-



TECHNICAL ARTICLE

FPGAs offer several advantages in motor controlloop implementation compared to microprocessoror DSP implementation. A typical FPGAimplementation is shown in Figure 1.

First, in many cases, an FPGA is already present inthe system to provide interfacing to data convertors,to positioning encoders, and for real time Ethernet

protocol implementations. With the control loopintegrated into the FPGA, the use of an externalprocessor can be eliminated, reducing BOM costs.If a processor is required for non-control loopfunctions, it can be easily implemented as a softcore processor inside the FPGA. The Altera NiosII soft-core microcontroller is a good example, which can be implemented using less than 1000logic elements, a very small fraction of the typicallow cost FPGA logic resources. This provides anadditional benefit of an obsolescence proof micro-

controller architecture, as it can be seamlesslymigrated to future FPGA device families.

Secondly, the stability of a motor control loopdepends on several factors, such as the systemgains, the numerical precision of the computations,and the processing time, or latency of the controlloop. Use of an external processor nearly alwaysincreases the control loop latency, as both the errordata and control loop response must pass through

Nios-II

Processor

A/DConverters

PowerStage

Motor

Encoder

PWM

PHYIndustrialEthernet

IGBTControl I/F

ADC I/F

PositionEncoder I/F

MotionControl DSP

DSP Builder SOPC Builder

PHY

data convertors or encoders to the FPGA, then to theprocessor and back again. The control loop latencyis the sum of these transfer times plus the processorinterrupt response and main loop computationaltime.

Thirdly, a Simulink-based design flow is available which allows easy conversion of the simulation

into FPGA implementation. This design tool is DSPBuilder Advanced. It provides designers the abilityto implement and verify their FPGA-based controlcircuits within the Simulink environment. DSPBuilder also allows the designer to use either fixedor floating point FPGA implementation, or a mixtureof the two. Given that control loops are iterative bynature, the high dynamic range of floating pointcan greatly simplify design verification and resultin greater motor control stability and robustness. Another unique feature of DSP Builder tool is the

ability to control the degree of circuit folding. Mostdigital control loops have sample times far less thanthe FPGA clock rate. Therefore, it is possible toshare common FPGA circuits to compute differentparts of the control loop in a TDM fashion, using atechnique known as folding or reusing the samecircuits for different parts of the loop computation.

For a more detailed look at how FPGA design toolscan simplify motor control design, comparison

Figure 1: FPGA-based Motor Control Block Diagram



TECHNICAL ARTICLE

of fixed and floating point design resources, andhow minimize the FPGA device resources throughcircuit folding, click here.

About the Author

Michael Parker received his MSEE from SantaClara University in California, and his BSEE fromRensselaer Polytechnic Institute in New York. He hasover 20 years of DSP wireless engineering designexperience with companies such as Alvarion, SomaNetworks, TCSI, Stanford Telecom, and numerousstartup companies. Michael joined Altera in January2007, and is responsible for Alteras entire digital

signal processing (DSP) product planning.

Michael authored a book entitled Digital SignalProcessing 101, published in 2010 and has writtenand published over 20 technical articles on DSP,

floating point, and various other technologysubjects.
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Via Return Currents

Michael SteinbergerLead Architect, Serial Channel Products

and the Path of Least Resistance

1.0 Conventional Wisdom

A couple of months ago, I was discussing PC board

via electrical behavior with a respected colleague,and he happened to mention that the ground returncurrents for the via would find the nearest ground via and follow that path. Five years ago, I wouldhave said exactly the same thing. However, sincethen Ive learned more about the electrical behaviorof vias, and I now recognize nearby ground viasas only one of several mechanisms that groundcurrents can use to follow the signal current. Itherefore thought others would find this new-foundknowledge useful.

The point of this article is that ground currents will find the path of least resistance (impedance,actually). The path they take will affect the reflectioncoefficient seen by the signal, and will to a largeextent determine the crosstalk in the system.

This article is solely about vias, that is, a planarpiece of dielectric with ground planes on both

sides, holes in the ground planes (antipads), andsmaller holes through the dielectric and filled with

metal to form signal conductors (via barrels). Thereare several other structures whose physics aresimilar, however they will not be addressed directlyhere.

2.0 A Fundamental Principle

The following principle is based on fundamentalelectromagnetic analysis and explained in detail in[1]:

At all frequencies for which the metal in the ground

plane is more than a few skin depths thick, the sumof all the currents going through any given hole inthe ground plane must be zero.

This means that for any hole in the ground plane,the total ground current flowing from one side ofthe ground plane to the other across the edge of theantipad is constrained to be equal and opposite tothe total current flowing along any via barrels that



TECHNICAL ARTICLE

pass through the middle of the hole.

This at least lets us know where the ground currentsare at some specific points in the ground return path.The question, therefore, is how the ground currents

get from the ground plane on one side of a dielectriclayer to the ground plane on the opposite side of thedielectric. Were already aware that one possiblepath is a ground via connecting to two groundplanes, and well get back to that mechanism. Butlets look at some other mechanisms first.

3.0 The Simple Via Experiment

What if we had a structure that had no ground viasconnecting the ground planes on opposite sides of

4.5

???

Figure 1:Via test structure

a dielectric layer? Would that create an open circuitin the ground return path?

No. There are still capacitive and inductive couplingmechanisms that can be important.

Consider the via test structure [1] shown in Figure1. This structure consists of a circular disk ofdielectric (FR4) with gound planes on both sides.Each ground plane is connected to a coaxialtransmission line. The center conductors of thetransmission lines are connected through a hole inthe dielectric, thus forming one continuous centerconductor. However, the shields of the transmission

lines are separated by the dielectric disk. Thus, thedielectric disk, ground planes, and that portion ofthe center conductor passing through the disk forman isolated single ended via with no ground vias.

Hertz (GHz)

DB

0 20.0

0.0

-10.0

-20.0

-30.0

-40.0

-50.0

-60.0

-70.0

2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0

Magnitude S21 and S12BLUE: Measured RED: Calculated with Loss Tangent = 0.40

Figure 2: Test structure measured and modeled insertion loss

It is evident from Figure 2 that at least at mostfrequencies, the ground currents found a returnpath, and a rather low impedance one at that.

At low frequencies, the explanation is

straightforward: The dielectric disk acts as an ACcoupling capacitor. This model accurately matchesthe experimental data at low frequencies. At higherfrequencies, the explanation is more complex. TEMwaves propagate radially out to the edge of the diskand get reflected back to the center of the structure.At most frequencies, these waves add up to createa low impedance ground path. However, at certainfrequencies, the outgoing and incoming waves areexactly in phase at the center of the disk, causinga high impedance resonance in the ground return

path. As shown in Figure 2, this radial TEM wavemodel matches the measured data very accuratelyacross the entire range of measurement.

The radial TEM wave model also offers a different way to look at the capacitive coupling at lowfrequencies. DC is one of the resonant frequenciesof the disk, and the coupling near DC is producedby this resonant mode.



TECHNICAL ARTICLE

Most vias dont have the symmetry of the teststructure in Figure 1. Thus, if outgoing radial wavesare reflected back to the originating via, they arenot likely to converge the way the waves on a

disk converge. Rather, they are more likely to getreflected into a number of different directions andbecome dispersed.

These radial waves can be compared to waveson the surface of a liquid. If youre an impatient

Frequency (Hz)

Impedanc

e(Ohms)

0.0000E+00

10.0000E+10

10090

807060

5040

3020100

1.0000E+09

2.0000E+09

3.0000E+09

4.0000E+09

5.0000E+09

6.0000E+09

7.0000E+09

8.0000E+09

9.0000E+09

Ground Return Impedance - 0.04 Antipad diameter, 0.1 Thickness, Er=3.4BLUE: Zreal RED: Zimag

Figure 3: Real and imaginary parts of the ground return impedancefor a via on an infinite PC board

coffee drinker like myself, youve watched a dripcoffee maker near the end of its cycle and noticedthe waves caused by the last drips of coffee intothe coffee pot. They go outward to the edge of thecoffee pot, get reflected, and reconverge in thecenter of the pot. This is like the behavior of the disktest structure. The radial waves in a real PC boardare more like the ripples in a pond. They propagateoutward and get dispersed when they reach theshore.

The other extreme is an infinitely large boardcontaining only a single via. The radial waves areonly outgoing and there are no reflected waves.This produces a real and imaginary impedancesuch as that shown in Figure 3. Note that theimpedance is relatively low compared to a 50

load, and increases monotonically with frequency.These results can be scaled to different dimensionsfor use in first order signal and crosstalk analyses.The impedance is proportional to the thickness

Figure 4: Ground currents on a ground plane in the vicinity of avia antipad

of the dielectric layer and the frequency scale isinversely proportional to the antipad diameter.

These impedances are, however, quite highcompared to the impedances typically found in apower distribution network. This helps to explainwhy the vias in a power distribution network dontshare currents as much as one might have expected[2].

The resistive part of the impedance is caused by thefact that there is energy in the outgoing wave, andthe energy is entirely dissipated in the surroundingboard.

The reactive part of the impedance is a bitsurprising at first glance, in that its inductive ratherthan capacitive. This reactance can be explained,however, by considering the pattern of groundcurrents, as shown by the solid lines in Figure 4.

The outward propagating currents generate acircular magnetic field such as that shown by thedotted lines in Figure 4. This magnetic field extendsto the ground plane on the opposite side of thedielectric layer, where it induces currents in the

opposite direction (into the antipad).

Further examination of the results of the simple viaexperiment [1] demonstrates that the capacitivecoupling only occurs at frequencies that are just alittle higher than a resonant frequency (such as nearDC). Since the infinite PC board has no resonances,the coupling is inductive rather than capacitive.



TECHNICAL ARTICLE

It should also be noted that if the ground returnpath is inductive, it will tend to increase both theapparent impedance and the apparent electricallength of the via. It has been observed that vias

tend to have a longer electrical length than wouldbe predicted based solely on the physical length

Hertz (GHz)

DB

0

4= 0.2

20.0

0.0

-1.0

-2.0

-3.0

2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0

Insertion Loss with and without Ground Vias at 0.2 RadiusBLUE: No Ground RED: With Ground Vias

m

and dielectric constant [3], and the proposed

explanation was that the dielectric constant inthe X/Y direction was greater than the dielectricconstant in the Z direction. An inductive groundpath would be another possible explanation.

4.0 The Role of Ground Vias

Figure 5 shows the insertion loss of the via teststructure when ground vias are added at a constantradius from the center conductor.

The ground vias certainly kill the resonance at DC,

as expected. However, at frequencies for whichthe ground vias are more than a quarter wave fromthe center conductor, the ground vias are not at allhelpful. The reason is that when the ground via ismore than a quarter wave from the signal via, theround trip from the signal via to the ground via andback to the signal via is more than a half wave long,and so radial waves reflected from the ground vias can arrive in phase with the outgoing wave

rather than out of phase, as would be the case atlower frequencies. When waves are in phase, their voltages add and so the impedance presentedto the external circuit is greater. Even at lower

frequencies, the ground vias will present a nonzeroimpedance to the ground return currents, and thatimpedance will be a combination of inductance andresistance.

5.0 The Path of Least Impedance

The ground vias therefore end up in parallel withthe inductive coupling due to the radial TEM wavespropagating between the ground planes. It is theparallel impedance of these two mechanisms thatis presented to the ground return currents, and the

ground return current is shared between these twomechanisms depending on the relative magnitudesof their impedances.

At frequencies for which there are ground viascloser than a quarter wave, the ground viaconduction path will tend to dominate whereas athigher frequencies, the direct inductive couplingwill be the only effective ground return mechanism.

Even at frequencies for which the ground vias areeffective, the ground vias will not carry all of theground return current, no matter how many groundvias there are. Rather, one should think about groundvias in the same way one thinks about the braidedshield on a coaxial cable. For example, inexpensiveRG59-U cable may have only 70% shield coverage.In that sense, the shield coverage of the ground viason most PC board designs is a lot lower than that.

6.0 References

[1] Chong, Gopinath, Scearce, Steinberger, and

White, A Simple Via Experiment, paper 5-TP2,DesignCon2009.

[2] James Weaver, Measuring Supply Currents inPrinted Circuit Boards, Ph.D. dissertation, StanfordUniversity, November 2007.

[3] Bogatin, Gupta, Resso, and Simonovich,Practical Analysis of Backplane Vias for 5 Gbpsand Above paper 7-TA2, DesignCon2009.

Figure 5: Insertion loss with ground vias



TECHNICAL ARTICLE

About the Author

Michael Steinberger, PhD, has over 30 yearsexperience in the design and analysis of veryhigh-speed electronic circuits. Dr. Steinberger

began his career at Hughes Aircraft, designingmicrowave circuits. He then moved to Bell Labs, where he designed microwave systems thathelped AT&T move from analog to digital long-distance transmission. He was instrumental in the

development of high-speed digital backplanesused throughout Lucents transmission product line.Prior to joining SiSoft, Dr. Steinberger led a group ofover 20 design engineers at Cray, Inc. responsible

for SerDes design, high-speed channel analysis,PCB design, and custom RAM design.
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