eet 3350 digital systems design

8/10/2019 EET 3350 Digital Systems Design

1/4

Syllabus: EET 3350

EET 3350: Digital Systems Design (4 semester credit hours) Required

Current Catalog DescriptionThis course covers the design, analysis and applications of digital systems involving

sequential circuits. Special attention is given to the formal analysis and design procedures for

synchronous sequential logic circuits and bi-stable memory devices. Design projects focus ontop-down design methodology using CAD tools and VHSIC hardware description language.

Textbooks/Software

1. Digital Design Principles and Practices, 4th

edition, John Wakerly, Prentice Hall

Publishers, 2005.2. Mentor Graphics and Xilinx ISE Software.

Related Program Outcomes (a, b, c, d, e, f, g, k)

An understanding of the analytical and laboratory skills associated with electricalengineering technology (outcome a), as evidenced by the ability to perform:

- Analysis of complex digital circuits using the concepts of characteristic equations,

present state-next state tables, flow maps, transition maps, state diagrams, state

reduction tables, and timing analysis.

- Design and analysis using VHDL hardware description language and Xilinx CADtools in a computer laboratory to model, simulate, and analyze complex digital

circuits.

An ability to apply current knowledge and adapt to emerging applications of

mathematics, science and technology(outcome b), as evidenced by the ability:- To review, digest, and apply the latest design techniques in the area of digital circuits

by studying various conference and journal papers. An ability to conduct, analyze, and interpret experiments concerning digital circuits, as

evidenced by (outcome c):

- The ability to perform various lab exercises using VHDL and Xilinx Software.

- Written reports for select experiments.

An ability to use creativity in the design and use of digital systems and processes as

evidenced by (outcome d):

- The ability to design novel digital circuits using commercial CAD tools.

- The ability to solve open ended problems.

An ability to function as part of a team, as evidenced by (outcome e):

- Working with other students in a team of 3 to 4 students on a project.

An ability to identify, analyze and solve technical problems associated with digitalsystems design, as evidence by (outcome f):

- An ability to solve problems on class quizzes, tests, and final examination.

- An ability to participate in class discussions and solve problems open for discussionduring class time.

An ability to communicate effectively, as evidenced by (outcome g):

- Oral presentation of project work.

- Written reports of projects.

A commitment to quality and continuous improvement as evidenced by (outcome k):


2/4

Syllabus: EET 3350

- The ability to produce high quality project reports.

- The ability to use the latest state of the art technology and digital CAD tools.The ability to learn from past mistakes made on quizzes and tests and perform better in

future, as evidenced by improvement in test scores, etc.

Course ObjectivesIn this course students are expected to have the ability:

To use digital CAD tools including VHDL and Xilinx ISE Software. Ability to design,simulate and test digital circuits using CAD tools. Students are required to submit written

lab reports for appropriate lab experiments.

To design and analyze combinational and sequential digital circuits using systematic

design procedures.

To design and innovate digital circuits for practical applications using Circuit delay

models, Characteristic equations, PS/NS tables, State diagrams, and Boolean algebra.

To work as part of a team. All students are required to do a team project for this course.

Students will be required to submit a written report as well as give an oral presentation. To read journal/conference papers and other scientific magazines (IEEE Spectrum and

IEEE Computer, etc.) and to keep abreast of the latest technological developments in the

area of digital circuits.

Major Topics Covered in the Course

TopicCC2001

CategoryCC2001

CoreCC2001

Advanced

Programmable logic devices (PAL, PLA, PROM) AR1 3

Basic bi-stable memory devices AR1, AR4 6

Analysis tools including: circuit delay models, characteristicequations, PS/NS tables, state diagrams, Karnaugh maps,

transition maps, flow-maps, and timing diagrams

AR1, AR6 6

Additional bi-stable memory devices including various types of

gated, master-slave, and edge-triggered flip-flops

AR1, AR6 3

Moore, Mealy, and mixed type synchronous machines

including synchronous design procedure, designing with edge-triggered devices, and synchronous analysis procedure

AR1, AR6 6

Synchronous sequential design of Moore and Mealy machines

including timing diagram description, state reduction byimplication table, and state assignments

AR1, AR5, AR8 6

Field Programmable Gate Arrays (FPGAs) AR7 3

VHDL Hardware Description Language PL11, PL7, PF5,

CN3

9

Totals 42


3/4

Syllabus: EET 3350

Laboratory Projects

Students are assigned approximately 8 individual lab assignments. Each of these assignmentsrequire approximately 1 to 2 weeks for completion. Students are also assigned a class term

project (team of 2 or 3 students). Term project requires a formal written report and an oral

presentation.

Major Laboratory Topics

Behavioral VHDL Design, Simulation, and Verification of Digital Circuits using

ModelSim.

Structural VHDL Design, Simulation, and Verification of Digital Circuits usingModelSim.

Design of Half and Full Adders Using VHDL.

Design of Flip Flops using VHDL.

Design of Mixed Circuits using VHDL.

Design of Shift Registers and Counters using State Cad Tools from Xilinx.

Design of Traffic Light Controller Using CAD Tools.

CAC CategoriesCS Core CS Adv

Data Structures

Algorithms 0.5

Software Design 1.0

Computer Organization and Architecture 2.5

Concepts of Programming Languages

Oral and Written CommunicationsEvery student is required to submit at least 5 written reports (not including exams, tests,

quizzes, or commented programs) of typically 4 to 8 pages and to make 1 oral presentation of

typically 15 to 20 minutes duration. Students work in teams for the term project. The project

consists of a written report and an oral presentation.

Distance Learning students must:

submit a video-taped oral presentation for evaluation and feedback, or

come to UT or a partner community college and make the oral presentation in person, or

submit completed evaluation forms for the oral presentation from an approved proctor or

audience group.

Social and Ethical Issues

Social and ethical issues are emphasized in regards to copyright and proper

acknowledgement in writing the term project report. Students are required to cite at least 5

references from published literature as a part of literature survey on the topic selected for theproject. Students also grade the oral presentation of each fellow student. The grades are

subject to moderation by the Instructor, if deemed necessary. Students show fairness and


4/4

Syllabus: EET 3350

honesty in grading their classmates. Other social and ethical issues are discussed as deemed

necessary. Approximately hour is spent on instructing the students on the importance offairness and honesty in grading their fellow students.

Theoretical Content Programmable logic devices (PAL, PLA, PROM) (1 week)

Basic bi-stable memory devices (2 weeks)

Analysis tools including: circuit delay models, characteristic equations, PS/NS tables,state diagrams, Karnaugh maps, transition maps, flow-maps, and timing diagrams (2

weeks)

Additional bi-stable memory devices including various types of gated, master-slave, and

edge-triggered flip-flops (1 week)

Moore, Mealy, and mixed type synchronous machines including synchronous design

procedure, designing with edge-triggered devices, and synchronous analysis procedure (2weeks)

Synchronous sequential design of Moore and Mealy machines including timing diagramdescription, state reduction by implication table, and state assignments (2 weeks)

Synchronous counter design including shift-register counters, ring counters, and twisted

ring counter design (1 week)

Field Programmable Gate Arrays (1 week)

VHDL Hardware Description Language ( 3 weeks)

Problem Analysis

Students analyze digital circuits to estimate circuit characteristics and performance.

Solution Design

Students design digital circuits using Mentor Graphics and Xilinx ISE software. The circuit is

modeled using VHDL. Students verify their theoretical designs by simulating the functional

behavior of the circuit.

Course Coordinator

Mohammed Niamat ([email protected])

2/27/07

eet 3350 digital systems design

Documents