EEL-3705TPS QUIZZES

Quiz 2-1

Use a Venn Diagram to show

F a b

Use a Venn Diagram to show

a b

F a b

Quiz 2-2

Prove the following using a Venn Diagram

F a ab a b

Prove the following using a Venn Diagram

a ab a b a b a b

a b a b

OR

Quiz 2-3

Use a Venn Diagram to find

F a b

Use a Venn Diagram to show

a b

a b a b

a b

Quiz 2-4

Problem

F ab c

Use a Venn Diagram to show

F ab c ac bc

Given

Hint: Draw , , andF F ac bc

Solution

F ab c

a b

c

a b

c

F ab c

Solution

a b

c

F ab c F ac bc a b

c

Quiz 2-5

Prove the following using Switching Algebra

a ab a b

Prove the following using Switching Algebra

5

1 6

( ) 2

a ab a a a b P a

a b P a

a b P b

a ab a b

Quiz 2-6

Problem

F ab c

Given

Use Demorgan’s Thm to find

F ab c

Solution

Find F ab c

Use DeMorgan’s Theorem

F a b c ac bc

Quiz 2-7

Problem

F a b Given

Use Demorgan’s Thm to find:

F a b

Solution

F a b Given

Find

F a b ab

Quiz 2-8

Use a Venn Diagram to show

a b a b

Use a Venn Diagram to show

a b a b

a b a b

Quiz 2-9

Problem

F ab c

Use a Truth Table to evaluate

Solution

A B C F

0 0 0 1

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 0

1 1 0 1

1 1 1 1

F ab c

Quiz 2-10

Problem

Use a Truth Table to evaluate

, ,F a b c a b a c

Solution

A B C F

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

, ,F a b c a b a c

Quiz 2-11

Problem

Expand the following function

, , 0,1,7F A B C m

represent F in truth table form

Solution

, , 0,1,7F A B C m , ,F A B C ABC ABC ABC

Solution

A B C F

0 0 0 1

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 0

1 1 1 1

, , 0,1,7F A B C m

Quiz 2-12

Problem

Expand the following function

represent F in truth table form

, , 0,1,7F A B C M

Solution

F A B C A B C A B C

, , 0,1,7F A B C M

Solution

A B C F

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 0

F A B C A B C A B C

, , 0,1,7F A B C M

Quiz 2-13

Problem

, ,F a b c ab c

Expand F into SOP canonical form

Re-write F using the minterms notation and in a truth table.

Solution

F ab c c c a a b b Expand F into SOP canonical form

F abc abc abc abc abc abc

, , 0, 2,4,6,7F a b c m

SolutionRewrite using minterms

, , 0, 2,4,6,7F a b c mA B C F

0 0 0 1

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 0

1 1 0 1

1 1 1 1

, ,F a b c ab c

Quiz 2-14

Problem

, ,F a b c a b a c

Expand F into POS canonical form

Re-write F using only Maxtermsnotation and in a truth table

Solution

F a b cc a bb c

Expand F into POS canonical form

F a b c a b c a b c a b c

, ,F a b c a b a c

Solution

F a b c a b c a b c Re-write F using Maxterms and TT

, , 0,1,3F A B C MA B C F

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

Quiz 2-15

Problem

, ,F a b c a b a c

Simplify F and express using SOP minterms and in a truth table

Solution

, ,F a b c a b a c

Simplify F and express using SOP minterms and in a truth table

, ,F a b c a bc

Solution

, ,F a b c a b a c

Simplify F and express using SOP minterms

F a ab ac bc 1F a b c bc

F a bc

SolutionSimplify F and express using SOP minterms

F a bc F a b b c c a a bc

F abc abc abc abc abc

, , 2, 4,5,6,7F a b c m

Solution

A B C F

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

, , 2, 4,5,6,7F a b c mF a bc

Quiz 2-16

ProblemComplete the 2-input Truth Table for the following Basic Logic Gates

AY

B

AY

B

SolutionComplete the 2-input Truth Table for the following Basic Logic Gates

AY

B

A B Y

0 0 1

0 1 0

1 0 0

1 1 0

Truth Table

A B Y

0 0 0

0 1 0

1 0 0

1 1 1

Truth Table

AY

B

Quiz 2-17

Problem

F a b a b Given

Use Demorgan’s Thm to show:

a b ab ab

Solution

a b a b ab ab

ab ab

a b a b

aa ab ab bb

ab ab

00

Quiz 2-18

Problem

Given inputs a,b, and c, and using AND, OR, and NOT gates, Design a digital logic circuit that implements

, ,F a b c ab c

How many gates are needed for your design?

Solution

Quiz 2-19

Problem

Given inputs a,b, and c, and using only NAND gates, Design a digital logic circuit that implements

, ,F a b c ab c

How many gates are needed for your design?

Solution

OR

AND

NOT

Solution

Quiz 2-20

Problem

Show that this circuit implements the expression

, ,F a b c ab c

Solution

1P ab

P1

F ab c ab c ab c

_______( 1)F P c

Solution

A B C F*=(ab)’ F=(F*c)’ ab+c’

0 0 0 1 1 1

0 0 1 1 0 0

0 1 0 1 1 1

0 1 1 1 0 0

1 0 0 1 1 1

1 0 1 1 0 0

1 1 0 0 1 1

1 1 1 0 1 1

Quiz 2-21

Problem

Find a simplified logic expression and network for this logic circuit?

Use a truth table to verify your results

Solution

P2

P3

3P b c 2 1P a P a b

2 3F P P

P1

Solution

3P b c

2P a b ab

F ab b c ab abc

1F ab c ab

2 3F P P

VerificationA B C P2 P3 Fo Fs

0 0 0 0 0 0 0

0 0 1 0 1 0 0

0 1 0 1 1 1 1

0 1 1 1 1 1 1

1 0 0 0 0 0 0

1 0 1 0 1 0 0

1 1 0 0 1 0 0

1 1 1 0 1 0 0

3P b c 2P a b ab

sF ab2 3oF P P

Quiz 2-22

Problem

Find a simplified logic expression and network for this logic circuit?

Use a truth table to verify your results

Solution

P2

P3

4 2 1P P P ac a c 3 1P P b a b ab ab

P1

P4

1P a2P c

Solution

P2

P3

4 2 1P P P ac a c 3 1P P b a b ab ab

P1

P4

3 4F P P a c ab ab

Solution

F a c ab ab F a c ab F a c b

VerificationA B C P3 P4 Fo Fs

0 0 0 1 0 1 1

0 0 1 1 1 1 1

0 1 0 0 0 0 0

0 1 1 0 1 1 1

1 0 0 0 1 1 1

1 0 1 0 1 1 1

1 1 0 1 1 1 1

1 1 1 1 1 1 1

4P a c 3P a b

sF a c b 3 4oF P P

Solution

Quiz 2-22

Problem

• Design a circuit which implements the function y=2x+1. Let x be an unsigned 2-bit input vector. How many bits are needed to represent Y? Use a truth table to represent y. Design a logic circuit to implement the simplified logic expression for y.

Solution

X1 X0 X Y

0 0 0 1

0 1 1 3

1 0 2 5

1 1 3 7

Let’s “precompute” Y.

y=2x+1

Solution

Bits needed for Y

Ylow = 1Yhigh = 7

Since Y is positive, we can use an unsigned binary number for Y. We need n = log2(Yhigh+1) = log2(8) = 3 bits to represent Y

Solution

X1 X0 X Y Y2 Y1 Y0

0 0 0 1 0 0 1

0 1 1 3 0 1 1

1 0 2 5 1 0 1

1 1 3 7 1 1 1

Use a three bit unsigned output vector for y.

By Inspection:

2 1Y X1 0Y X0 1Y

Solution

Circuit

Simulation

Quiz 2-23

Problem

• Design a circuit which implements the function y=2x-1. Let x be an unsigned 2-bit input vector. How bits are needed to represent Y? Use a truth table to represent y. Design a logic circuit to implement the simplified logic expression for y.

Solution

X1 X0 X Y

0 0 0 -1

0 1 1 1

1 0 2 3

1 1 3 5

Let’s “precompute” Y.

y=2x-1

Solution

Bits needed for Y

Ylow = -1Yhigh = 5

Since Y is negative, we will must use a signed binary number for Y. We need n = 1+log2(max(abs(Yhigh),abs(Ylow))+1) = 1+log2(max(5,1)+1)=1+log2(6)=3.58 = 4 bits to represent Y

Need the largest in magnitude

Solution

X1 X0 Y Y3 Y2 Y1 Y0

0 0 -1 1 1 1 1

0 1 1 0 0 0 1

1 0 3 0 0 1 1

1 1 5 0 1 0 1

Use a four bit signed output vector for y.

By Inspection:

2 1 0Y X X 1 0Y X

0 1Y 3 1 0Y X X

Solution

Circuit

Simulation

Quiz 2-24

Problem

• Design a circuit which implements the function y=2x-1. Let x be a signed 2-bit input vector. What is the range of y? Use a truth table to represent y. Design a logic circuit to implement the simplified logic expression for y.

Solution

X1 X0 X Y

0 0 0 -1

0 1 1 1

1 0 -2 -5

1 1 -1 -3

Let’s “precompute” Y.

y=2x-1

Solution

Bits needed for Y

Ylow = -5Yhigh = 1

Since Y is negative, we will must use a signed binary number for Y. We need 1+ log2(max(abs(Yhigh),abs(Ylow))+1) = 1+log2(6)=3.58 = 4 bits to represent Y

Need the largest in magnitude

Solution

X1 X0 X Y Y3 Y2 Y1 Y0

0 0 0 -1 1 1 1 1

0 1 1 1 0 0 0 1

1 0 -2 -5 1 0 1 1

1 1 -1 -3 1 1 0 1

Use a three bit unsigned output vector for y.

By Inspection:

2 1 0Y X X 1 0Y X 0 1Y

3 1 0

3 1 0 1 0

Y X X

Y X X X X

Quiz 2-25

Problem

• Design a circuit which accepts a three bit input vector x and produces a ‘1’ if the majority of the inputs bits are a ‘1’. That is, F=1, if number of ‘1’s’ in x is greater than number of ‘0’s’ in x. Simplify the function prior to its implementation

Solution

X2 X1 X0 F

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1

Truth Table

2 1 0, , 3,5,6,7F x x x m

Solution

2 1 0, , 3,5,6,7F x x x m2 1 0 2 1 0 2 1 0 2 1 0F x x x x x x x x x x x x

2 1 0 2 0 2 1 0F x x x x x x x x

1 0 2 0 2 1 0F x x x x x x x

1 0 2 0 2 1F x x x x x x