ece562 power electronics schedule and grading · 1 ece562 power electronics schedule and grading...

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1 ECE562 Power Electronics Schedule and Grading Class Time: Tuesday and Thursday 5:30 6:45 PM in B105 (Engineering B wing) Instructor: Professor George Collins, Email: [email protected] Text Book: Fundamentals of Power Electronic, by R. W. Erickson and D. Maksimovic http://www.amazon.com/Fundamentals-Electronics-Second-Robert- Erickson/dp/0792372700/ref=ntt_at_ep_dpt_1 Class website: http://www.engr.colostate.edu/ECE562/ Link to course lectures: http://www.engr.colostate.edu/ECE562/lectures.shtml COURSE OBJECTIVES This course will teach students how to understand, analyze, design and better employ new commercial IC power supplies on a chip or on a board in any electronic system requiring powered DC levels different from the general DC system bus. Typically this is 6-12 additional DC levels. One illustrative commercial example is a remarkable Dialog Semiconductor product which provides, on ONE IC chip: 18 LDO( low drop out regulators) for low noise voltages needed for cell phone transceivers , two Buck converters for cell phone processors and semiconductor memory power supplies and one Boost converter for both driving LEDS for LCD screen backlighting or for the flash camera. ALL on one IC chip and driven by the batteries!! Texas Instruments has similar products. This kind of chip allows for low cost cell phones employing various chips with various DC voltages all from one rail voltage. This course will cover the two major approaches to high efficiency DC-DC conversion in detail: Pulse width modulation and resonant converters. Both employ ideal lossless “L-C” networks and ideal lossless switches. The DC-DC PWM conversion is primarily an IC solution to point of load DC power requirement and the resonant DC- DC conversion is for high performance DC power applications at kW levels, usually implemented on PC boards with discrete components, often called BRICKS. However, some attention will be given to linear power supplies like low drop out regulators and switched capacitor supplies for a comparison to our two circuit types. Moreover LDO’s provide the lowest ripple rails for powering critical electronics devices GRADING for 562 Power Electronics We will emphasize group efforts with teams of students handing in weekly HW sets and take home POP quizzes. PLEASE FORM a GROUP for HW, Spice Labs, POP QUIZZES and for group presentations, described below, ASAP in the first week of the semester. In a nut shell the ECE562 grading is scored as follows in 6 parts: 1. Four HW Homework assignments @1.25 pt each will comprise 5 % of the grade. See page 4 of this document for details of assignments and due dates from Chapters 2,3,4and 5. In general HW

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ECE562

Power Electronics

Schedule and Grading

Class Time: Tuesday and Thursday 5:30 – 6:45 PM in B105 (Engineering B wing)

Instructor: Professor George Collins, Email: [email protected]

Text Book: Fundamentals of Power Electronic, by R. W. Erickson and D. Maksimovic

http://www.amazon.com/Fundamentals-Electronics-Second-Robert-

Erickson/dp/0792372700/ref=ntt_at_ep_dpt_1

Class website: http://www.engr.colostate.edu/ECE562/

Link to course lectures: http://www.engr.colostate.edu/ECE562/lectures.shtml

COURSE OBJECTIVES

This course will teach students how to understand, analyze, design and better employ new commercial IC

power supplies on a chip or on a board in any electronic system requiring powered DC levels different from the

general DC system bus. Typically this is 6-12 additional DC levels. One illustrative commercial example is a

remarkable Dialog Semiconductor product which provides, on ONE IC chip: 18 LDO( low drop out regulators) for

low noise voltages needed for cell phone transceivers , two Buck converters for cell phone processors and

semiconductor memory power supplies and one Boost converter for both driving LEDS for LCD screen

backlighting or for the flash camera. ALL on one IC chip and driven by the batteries!! Texas Instruments has

similar products. This kind of chip allows for low cost cell phones employing various chips with various DC

voltages all from one rail voltage.

This course will cover the two major approaches to high efficiency DC-DC conversion in detail: Pulse width

modulation and resonant converters. Both employ ideal lossless “L-C” networks and ideal lossless switches. The

DC-DC PWM conversion is primarily an IC solution to point of load DC power requirement and the resonant DC-

DC conversion is for high performance DC power applications at kW levels, usually implemented on PC boards

with discrete components, often called BRICKS. However, some attention will be given to linear power supplies

like low drop out regulators and switched capacitor supplies for a comparison to our two circuit types. Moreover

LDO’s provide the lowest ripple rails for powering critical electronics devices

GRADING for 562 Power Electronics

We will emphasize group efforts with teams of students handing in weekly HW sets and take home POP

quizzes. PLEASE FORM a GROUP for HW, Spice Labs, POP QUIZZES and for group presentations, described below,

ASAP in the first week of the semester.

In a nut shell the ECE562 grading is scored as follows in 6 parts:

1. Four HW Homework assignments @1.25 pt each will comprise 5 % of the grade. See page 4 of this

document for details of assignments and due dates from Chapters 2,3,4and 5. In general HW

2

assignments are due on Tuesdays. I will email each of you to remind you of HW problem changes and

due date changes if any.

2. Five Spice assignments@ 2 pts each are worth 10 % and are listed later. In general Spice labs are due on

Tuesdays too, usually when no HW is due.

3. Talk #1/Paper #1 given as a group effort will count for 20%. Talk # 1 will occur weeks 5 and 6 of the

semester. For 2012 this is from 18 to 27 Sept. Each group must sign up for a specific date and with the

same topic for TALK # 1 “Coupled Inductors Employed in PWM Converters For Reducing current ripple:

theory and applications”. Let me know if you need a specific date as early as possible. Email the PPT

SLIDES and the Word Paper to me as attachments so I have a record of their receipt date versus the

due date.

4. Talk #2/Paper #2 given as a group effort will count for 31%. Talk # 2 will occur weeks 12 and 13 of the

semester. For 2012 this is from 6 to 16 Nov. Each group must sign up for a specific date and cover the

topic of “Right Half Plane Zero’s ( RHPZ’S) in the open loop Gain of PWM Converters: Stability

issues Encountered with RHPZ’S in Closed Loop”. Our text is a good first source for this talk as is the

website of EDN magazine. Choose three converters to discuss. Let me know if you need a specific talk

date for your group as early as possible. Again email the final PPT SLIDES and the final Word Paper to

me only (NOT THE GRADER) as attachments, so I have a record of their receipt date versus the due

date.

5. I count 24% for eight weekly class pop quizzes @ 3 pts each and are done as a group effort. Each student

will receive an email from me each week detailing the Pop Quiz Questions for the week. Again email the

PPT SLIDE Answers for the pop quizzes as electronic attachments on the due date of THURSDAY the

week after the assignment was given, so I have a record of their receipt date time from your group

versus the official due date. Late assignments lose points.

6. Exams will count for 10% and are done INDIVIDUALLY in class. Tentatively the exam will occur on Thur

week 11. For 2012 this exam is tentatively on 1 Nov

1-6 add up to 100% and will be the basis for 562 grades.

ALL TOGEATHER NOW one super 562 schedule: HW Spice, Talks and Pop Quizzes

DATES Week # Tues Due Date Thur Due Date

Tues 28/ 30 Aug 2 Buck Spice Pop Quiz # 1

Tues 4/6 Sept 3 Boost Spice Pop Quiz # 2

Sign up your group for one of four talk dates in weeks 5 and 6

Tues 11/13 Sept 4 Buck Boost Spice Pop Quiz # 3

And HW Ch 2

WEEKS 5 and 6 which is in 2012 18 to 27 Sept TALK # 1 All groups have the same topic “Coupled

Inductors in PWM Converters and reducing current ripple: theory and application” HW and Spice HW

is still due in week # 6 as shown below

3

Tues 25/27 Sept 6 SEPIC Spice Pop Quiz # 4

2 Oct 7 Cuk Spice

9/11 Oct 8 HW Ch 3 Pop Quiz # 5

16/18 Oct 9 Pop Quiz # 6

23/25 Oct 10 HW Ch 4 Pop Quiz # 7

DATES Week # Tues Due Date Thur Due Date

Sign up your group for one of four talk dates in weeks 12 and 13

30 Oct/ 1 Nov 11 EXAM Pop Quiz # 8

NO MORE Pop Quizzes after 1 Nov

Weeks 12 and 13: 6 Nov to 15 Nov TALK # 2 for all groups the same general topic is“ Right Half Plane Zero’s

in the open loop Gain of PWM Converters: Stability issues Encountered in Closed Loop”. Choose up to

three converters to discuss. But one will make the case.

Thanks giving break from 19 to 25 Nov

27/29 Nov 14 HW Ch 5

4 / 6 Dec 15 Special Lecture 4 Dec and grade estimate 6 Dec

Disclaimer Notice:

All items in this memo are subject to change by Prof. Collins in LATER class announcements and items are

considered only a preliminary guide to the student. For example, the ECE562 classes can cover high frequency

magnetics/transformers/inductors rather than more details of PWM circuits or basics of resonant converters, if

strong class interest exists—each semester is unique in its class preferences in this diverse field. In week # 9 we

will have a mid class review of past and future topics in which you are encouraged to input your desires for the

remainder of the class lectures. See in class participation grade issues section.

Disclaimer Notice:

All items in this memo are subject to change by Prof. Collins in LATER class announcements and items are

considered only a preliminary guide to the student. For example, the ECE562 classes can cover high frequency

magnetics/transformers/inductors rather than more details of PWM circuits or basics of resonant converters, if

strong class interest exists—each semester is unique in its class preferences in this diverse field. In week # 9 we

will have a mid class review of past and future topics in which you are encouraged to input your desires for the

remainder of the class lectures. See in class participation grade issues section.

4

However, some students need a better 562 grade for various reasons—here is a chance to earn

it, by doing 7 and 8 below.

7. Up to 5% of the grade will be for in class participation-you cannot act like a potted plant and expect

credit for this portion. Folks who interrupt or bring to lectures quality questions or important comments

will earn these points. I love questions from the class. You are paying to be taught and I am being paid to

teach so ask lots of questions. Do not act like a potted plant in class.

8. In addition I will give up to 5 extra points on the final grade for a pre approved special project to

improve the 562 course in future years (See me and we will write a contract together). An example is to

design buck, boost, buck boost, cuk and sepic using the TI website below

http://www.ti.com/ww/en/simple_switcher_dc_dc_converters/index.html?DCMP=sva_simpleswitchco

mm&HQS=simpleswitchcomm1-b

Of course you will need to submit PDF’s of all you key screen shots to get credit.

YES the possible total is >100 % and final grades will be curved as described below:

Our approach will be more traditional with both + and - letter grades to achieve a sliding curve and a

distribution of grades. .In an ideal statistical world we would seek in a class grade distribution as follows:

Grading will be curved with students above the median receiving an “A”, students below the median and

above one standard deviation below the median receiving a “B”. 1 to 2 standard deviations below the median

will receive a “C”, 2 to 3 standard deviations below will receive a “D”, and anything lower will receive an “F”.

Generally this means:

A > 95

B > 85

C > 75

D > 65

In summary, grading for 562 is in six parts as indicated above with opportunity for both group and individual

efforts. Group efforts are encouraged in HW, Spice assignments and talks as well as papers. Groups of up to but

not to exceed 6 students per group are acceptable to encourage team efforts and provide the opportunity to

learn team dynamics. Upon leaving CSU you will work in a company in teams—the Word and PowerPoint skills

you learn in presenting technical materials in 562 will be to YOUR benefit. The practice and experience of living

with the “psychodrama of technical group efforts” will also benefit you personally.

DETAILED Schedule on HW Assignments, Spice Assignments, Pop Quizzes and Grading for each

At the end of this I will present a table of ALL assignment due dates throughout the semester

1. Exam and Pop Quizzes (34 points total for 8 pop quizzes and one exam)

5

a. In class WEEKLY pop quizzes @ 3pts each for a total of 24 points on material from the recent weeks

in class material can be done as a group effort. Pop Quizzes due dates are usually Thursdays the

week after Pop Quiz is sent out to you by email the prior week. Send your groups answers also by

email attachment to the grader. Sometimes you are expected to “drill deep” into a Power topic, by

at minimum, distilling my notes or book chapters and bringing in references from the literature and

power components from manufacturers websites.

b. Sit down exams are an individual effort and worth 10 points . It is held in week 11 of the

semester. In 2012 this is 1 Nov. It will include qualitative questions many people missed on POP

quizzes, HW problems and items I ask you to know in class. The exam’s quantative problems may

take the form of a TAKE HOME exam.

SAMPLE Qualitative Questions for EXAM # 1.This kind of information you are expected to know by

exam # 1:

Draw simple circuit diagrams for Buck, Boost, synchronous Buck, and Buck Boost using

MOS FET transistors and diodes as well as inductors and capacitors and load as well as

parasitic resistors IN THEIR PROPER PLACES..

Draw the current wave forms versus time (above each other with relative timing) for

each of the circuits of Ch 2 including:

The active MOSFET Switch(s) IDS(time)

The passive Diode , ID( t)

The inductor waveform versus time, IL(t) . In the case of the synchronous Buck compare

inductor waveforms with the simple Buck and how synchronous Buck improves output

characteristics—be quantative.

Sketch the GATE drive circuit for the active MOSFET switch with remarks whether or not

this is a floating or grounded drive FET drive and be sure to label all three MOSFET

terminals, as you know them with emphasis on the two terminals of the FET where the

gate drive is applied.

Illustrate by circuit drawings which circuits of Ch 2 are or are not providing electrical

isolation from input to output and why or why not this is occurring. The think where a

transformer might be placed in a Buck circuit making it a forward converter.

Comment on the EMC (conducted currents) noise characteristic of each of the five basic

PWM circuits ( buck, boost, buck-boost, SEPIC and Cuk). Discuss the origins of EMC,

where it occurs, as well as if it is in the input circuit, the output circuit or both.

Do the same for radiated EMI emissions

By means of inductor current waveforms describe the continuous mode (CCM of Chs 2-

4) versus discontinuous conduction mode (DCM of Ch # 5). Be quantative and describe

why every circuit must operate DCM at open load.

6

Describe by equations HOW the core losses for BOTH inductors and transformers vary

with applied switch frequency. Plot loss versus fSW for both hysteresis and eddy current

losses.

Explain the REAL Z(f) curves for REAL inductors and REAL capacitors. Explain why higher

switch frequency allows for smaller geometric component sizes BUT introduces more

parasitic elements. Use equations and impedance versus frequency diagrams for

capacitors, resistors and inductors to prove your points.

Explain the effect of ESR of output capacitors on the output ripple voltage. Be specific

with comments on the relative role of capacitive versus ESR voltages. Which capacitor

types have lowest ESR and highest ESR.

Explain with equations the relative size of DC versus AC losses for MOSFET

semiconductor switches. In AC losses distinguish the separate contributions from drain

to source switching losses from on to off and off to on and why they differ from each

other.

Explain zero voltage switching in the “off to on” switch condition and how to achieve it

using four FETS in an H bridge and the timing required of all the switches as we did in

class

Do the same for FET gate drive losses. Comment on the trend toward higher operating

frequency and how this affects DC-DC converter losses and thus operating efficiency.

2. Homework Assignments ( 5 pts) and SPICE Simulations( 10 pts) for a total of 15 points

a. Overview:Four sets of homework problems@ 1.25 pts each (5 points total) + 5 Spice Labs.(10 points

total). Note that I may change the number of HW problems so pay attention to WEEKLY email

announcements. Work in teams of 4-6 students. Undergrads (UG) do only indicated problems.

Graduate students do all of the problems assigned. Detailed assignments are list at the end of this

memo. Homework assignments in Chapters 2,3,4,5,6, and 19 will be worth 1/2 point each and are

due as indicated in class.

Roughly speaking, HW due dates for the HW assignments are as follows:

HW1: Ch 2 of Erickson Pbms. 1(UG), 2(UG),3,4,6,: DUE week 4 day 1 ( 11 Sept 2012)

HW2: Chapter 3 of Erickson Pbms. 8(UG),9,10 (UG).: Due Week 8 day 1 (9 Oct 2012)

HW3: Chapter 4 of Erickson Pbms. 2(UG),4,5,7(UG): Due week 10 day 1 ( 23 Oct 2012)

HW4: Chapter 5 of Erickson Pbms. 1(UG),4, 5(UG),14: Due Week 14 day 1 (27 Nov 2012)

b. 4 Required SPICE Assignments@ 2.5 points each (10 Points).

Together the five labs will lead you through the major commercial DC to DC converter circuits: Buck,

Boost, buck-boost, SEPIC and Cuk. Note that there is EXTRA CREDIT FOR THOSE who do Spice analysis

for either the L-C-C or C-L-L resonant circuits.

Spice Lab1: Spice analysis of Buck: Due week 2 day1 (28 Aug 2012)

Spice Lab2: Spice Analysis of Boost: Due week 3 day1 (4 Sept 2012)

7

Spice Lab3: Spice Analysis of Buck-Boost: Due week 4 day1 (11 Sept 2012)

Spice Lab4: Spice analysis of SEPIC converter: Due week 6 day1 ( 25 Sept 2012).

Spice Lab5: Spice analysis of Cuk converter: Due week 7 day1 ( 2 Oct 2012).

For extra credit do the L-C-C or L-L-C converter Spice labs BEFORE 27 Oct 2012

Eight WEEKLY pop quizzes @ 3 pts each will count for 24 points and can be done as a group effort.

Pop Quizzes usually will be due Thursdays the week after they are by email the prior week.

Sometimes you are expected to “drill deep” into a Power topic, by at minimum, distilling my notes

or book chapters and bringing in references from the literature and power components from

manufacturers websites. Due dates for Pop Quizzes are:

Pop Quiz Thur Due date 2012

#1 30 Aug

#2 6 Sept

# 3 13 Sept

#4 28 Sept

# 5 11 Oct

#6 18 Oct

#7 25 Oct

# 8 1 Nov

THERE ARE NO MOREPOP QUIZZES after 1 Nov

3. Two Required Group Talks and Papers

For group efforts Microsoft has versions of Word and Power Point that reside on servers at

Microsoft OfficeLive —moreover this allows MULTIPLE users to log on and work on the SAME document

together. Sign up early for your group talk date, as time slots are limited.

Talk#1/Paper #1: 20 points All groups discuss “ Coupled Inductors Employed in PWM Converters For Reducing current ripple”. Both the final PPT and the final Word documents are due on week # 8 Tues of the semester ( 9 Oct 2012). Do not be late or lose points accordingly. 15 points for oral talk using PPT and 5 for associated paper in Word. Your group’s efforts should document ONLY your group’s exploration and presentation of commercial coupled inductor methodology PWM converter chips and hybrid circuits. Be quantitative and comparative with several commercial designs. Use the websites of manufacturers that employ coupled inductors, available spec sheets and on-line design tools provided by manufacturers. National Semiconductor has the best site but TI, Maxim, International Rectifier, and Linear Technology all have excellent websites. EACH group MUST include the comparison in the introduction to their talk’s alternative complementary solutions to ”coupled inductors “in detail. Be sure to compare the chosen coupled inductor PWM chip circuit topology solution with alternatives. List advantages and disadvantages to each “coupled inductor”approach you find and then at the end of your talk/paper best of the breed and best of the show to achieve better power supply solutions. The ENTIRE GROUP has only 40 minutes in class via power point

8

presentation of 20-25 slides and paper in Word of 20 pages is submitted separately. Your technical presentations will be GROUP efforts to simulate your next environment—industry or graduate school. This group effort is purposeful to get students familiar with the team efforts that they will SOON encounter in industry.

4. Talk #2/Paper # 2: 30 points 6 Nov to 15 Nov 2012 All groups discuss“ Right Half Plane Zero’s in the open loop Gain of PWM Converters: Stability issues in Closed Loop”. Final PowerPoint slides and a Final 30-page Word paper are both due by 29 Nov. Do not be late or lose points accordingly. 30 points total with 25 points for the PPT presentation and 5 for the paper in word. Here is a chance to go into greater detail on a big limitation of feedback PWM converters. Drill deep into right half plane zero origins and how to compensate for them. Use our text and manufacturers spec sheets.

5. Class participation: up to 5 points

a. This portion of the grade is to encourage “multiple conversations and questions in the classroom”

and limit boring “monologues” by the instructor. I will be delighted by in class questions,

interruptions and individual additions.

Grade opportunities add up to greater than 100 points –but I give you ample opportunity to raise your ECE562

grade.

6. Extra credit

a. For extraordinary efforts up to 10 points such as Spice simulations of Cuk or Sepic converters of

comparing design issues and Spice simulations of L-C-C and L-L-C resonant converters.

ALL TOGEATHER NOW one super schedule: HW Spice, Talks and Pop Quizzes

DATES Week # Tues Due Date Thur Due Date

Tues 28/ 30 Aug 2 Buck Spice Pop Quiz # 1

Tues 4/6 Sept 3 Boost Spice Pop Quiz # 2

Sign up your group for one of four talk dates in weeks 5 and 6

Tues 11/13 Sept 4 Buck Boost Spice Pop Quiz # 3

And HW Ch 2

WEEKS 5 and 6 which is in 2012 18 to 27 Sept TALK # 1 All groups have the same topic “Coupled

Inductors in PWM Converters and reducing current ripple” HW and Spice HW is still due in week # 6 as

shown below

Tues 25/27 Sept 6 SEPIC Spice Pop Quiz # 4

2 Oct 7 Cuk Spice

9/11 Oct 8 HW Ch 3 Pop Quiz # 5

16/18 Oct 9 Pop Quiz # 6

23/25 Oct 10 HW Ch 4 Pop Quiz # 7

9

DATES Week # Tues Due Date Thur Due Date

Sign up your group for one of four talk dates in weeks 12 and 13

30 Oct/ 1 Nov 11 EXAM Pop Quiz # 8

NO MORE Pop Quizzes after 1 Nov

Weeks 12 and 13: 6 Nov to 15 Nov TALK # 2 for all groups the same general topic is“ Right Half Plane Zero’s

in the open loop Gain of PWM Converters: Stability issues Encountered in Closed Loop”. Choose up to

three converters to discuss. But one will make the case.

Thanks giving break from 19 to 25 Nov

27/29 Nov 14 HW Ch 5

4 / 6 Dec 15 Special Lecture 4 Dec and grade estimate 6 Dec

Special Talk # 2 for students in 461 and 562

Motors and motor drives are key technologies for a variety of

reasons. First >60% of grid energy goes to motors. Moreover,

improvements in efficiency from grid power to Torque- RPM

mechanical energy at loads is an on-going green revolution as it

creates “Negawatts” of saved energy that need not be

generated. Electric cars will also be more competitive with these

motor/ motor drive improvements.

In short the goal of the new technologies is increased efficiency

motor operation, smaller size and lighter weight electric motors

and eliminating the need for mechanical gear trains to meet the

applications specific TOUT

– NOUT

mechanical load requirements by

electrical means alone.

So a special opportunity is offered to students in both 461 and

562 courses to do talk # 2 on motors/motor drives. An emphasis

list of items to cover is given below for 461 presentations and a

different list of items for 562 student presentations. Students

MUST add to this according to their group’s interests.

For those students who will give the same talk in both classes

both emphasis lists must be covered in the presentation that will

given twice once in each class.

10

461 Presentations Required High Points:

1. Describe the ZIN,

VIN

and IIN

seen by the power electronics

drives ( e.g. the motor’s electrical input characteristics)

versus the varying TOUT

–NOUT

curves of the mechanical load

for:

a. Brushless DC Motor (BDCM)

b. Synchronous motor

c. Permanent magnet Synchronous motor (PMSM)

d. Induction motors

In short review the TOUT

-NOUT

vs VIN

- IIN

curves for the

four most used motors.

2. Provide web links to manufacturers spec and application notes

and their major arguments to justify the separate claims that

“PMSM” technology is the best versus “BDCM” technology is

best versus Synchronous or induction motors. This is easily

resolved by distinguishing what mechanical loads each

technology is best suited for. Do this for the four the chosen

motors at the three mechanical load levels of :

a. Low HP < 1 HP

b. Medium HP < 10HP

c. High HP > 100 HP

3. Commercial motor control systems consist of: sensors,

command and control chips and power train drives.

a. Describe in detail spatial location, type and output

levels from the sensors for rotor position and other

motor parameters needed for control decisions.

b. Give three commercial motor control chips or board

level hardware control systems.

11

c. Compare and contrast the advantages and limitations

as well as cost of high power switch hardware in the

drive train employing :

a. Thyristors

b. IGBT’s

c. IGCT’s and it’s varients of MOS control

Go to manufacturer’s websites and get specs for the high power

switches as well as application sheets for motor drive

applications with these same switches and their control drive

electronics.

d. Provide two examples of commercial power train

electronics from switch drives to variable 3 phase

output V(f) from power switches.

562 Presentations Required High Points:

1. Explain the cost and reliability considerations for the motor

centric items listed in 461 point #1 as well as the best of the

breed for applications at the three HP levels for the four

motor varieties:

a. Brushless DC Motor (BDCM)

b. Synchronous motor

c. Permanent magnet Synchronous motor (PMSM)

d. Induction motors

2. Explain in detail the differences and advantages as well as

disadvantages of DSP vs FPGA vs microprocessor control

methodologies and switch algorithm flexibility as well as

cost.

12

3. Discuss the R-L-C components both within and external to

motors as regards their maximum operating voltages,

currents and frequencies.

Again if the same talk is given in both classes all of both high

points at minimum must be covered as well as the student

group’s own topics.

Disclaimer Notice:

All items in this memo are subject to change by Prof. Collins in LATER class announcements and items are

considered only a preliminary guide to the student. For example, the ECE562 classes can cover high frequency

magnetics/transformers/inductors rather than more details of PWM circuits or basics of resonant converters, if

strong class interest exists—each semester is unique in its class preferences in this diverse field. In week # 9 we

will have a mid class review of past and future topics in which you are encouraged to input your desires for the

remainder of the class lectures. See in class participation grade issues section.

Thank you again for reading though this missive. If you have further questions ask me in class so everybody benefits.