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E-Content for B.Sc. Electronics Semester-I (CBCS) UNIT-I Session - 2016

Dr. Sheikh Ajaz Bashir Govt. Degree College, Bemina

E-Content for B.Sc. Electronics Semester-I (CBCS) UNIT-I

B. Sc. 2016

Govt. Degree College, Bemina Page 1

B. Sc. – I

SUBJECT : Electronics SCHEME : Choice Based Credit System (CBCS) TITLE : Circuit Analysis (Unit-I) Syllabus : Concept of Voltage & Current Source

KCL/KVL/Mesh Analysis/Node Analysis; Star/Delta networks transformation; Principle Of Duality; Superposition Theorem, Thevenin’s Theorem, Norton’s Theorem, Reciprocity Theorem, Maximum Power Transfer, Two port Networks h/y/z.

Contents: S.No Page .No Topic 01 02-03 Concept of Voltage & Current Source 02 04-08 KCL/KVL 03 08-16 Mesh Analysis/Node Analysis 04 16 Star/Delta Network transformation 05 17-19 Principle of Duality 06 20-23 Superposition Theorem 07 23-26 Thevenin’s Theorem 08 26-29 Norton’s Theorem 09 29-30 Maximum Power Transfer Theorem 10 30-33 Reciprocity Theorem 11 34-36 Two Port Network Parameters –h/y/z


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1-Concept of Voltage & Current Source Voltage and current sources are the excitation elements in an electric circuit as they provide the energy for driving the network. Both classify as active devices in network terminology.

IDEAL AND PRACTICAL VOLTAGE SOURCES

An ideal voltage source is an active circuit element that provides a defined voltage across its terminals regardless of the current flowing in those terminals. Thus in case of an ideal voltage source the internal resistance should be zero. This is shown in figure-1.1 (a). A real voltage source has a small internal resistance in series with the ideal source. The voltage across the terminals of a practical voltage source is:

𝑉 = 𝑉𝑆 − 𝐼𝑅𝑆 Thus, as the current drawn from the voltage source increases, the voltage across its terminals decreases, as shown in figure-1.1 (b).


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IDEAL AND PRACTICAL CURRENT SOURCES

An active circuit element that supplies a defined current to a circuit regardless of voltage across its terminals is classified as an ideal current source. This is shown in figure-1.2 (a). A real current source has a large internal resistance across an ideal current source. The current through the terminals of a practical current source is:

𝐼 = 𝐼𝑆 −𝑉

𝑅𝑆

Thus, as the voltage across the terminals of a practical current source increases, the current drawn from its terminals decreases as shown in figure-1.1 (b).


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2-Kirchhoff’s Laws ( KCL & KVL)

A German Physicist “Robert Kirchhoff” introduced two important electrical laws in 1847 by which, we can easily find the equivalent resistance of a complex network and flowing currents in different conductors. Both AC and DC circuits can be solved and simplified by using these simple laws which are known as Kirchhoff’s Current Law (KCL) and Kirchhoff’s Voltage Law (KVL).

Kirchhoff’s Current Law (KCL): According to KCL, at any moment, there is no accumulation of charge at any node in an electrical network. Statement: The law states that the algebraic sum of all currents meeting at a point (node) is equal to zero. Alternatively the law states that in any electrical network the sum of the currents moving towards the point is equal to the sum of the currents leaving the point. Illustration:

Suppose some conductors are meeting at a point “A” (node) as shown in fig 2.1(a). As shown in the Figure, in some conductors, currents are incoming to the point “A” while in other conductors, Currents are leaving or outgoing from point “A”.

Figure-2.1 Circuit Illustrating KCL.


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Conventionally consider the incoming or entering currents as “Positive (+) towards point “A” while the leaving or outgoing currents from point “A” is “Negative (-)”. Then according to KCL I1 + (-I2) + (-I3) + (-I4) + I5 = 0 or I1 + I5 -I2 -I3 -I4 = 0 or I1 + I5 = I2 + I3 + I4 In another circuit topology shown in Figure-2.1(b) applying KCL we have I1 =I2+I3 or 6= 4+2 Thus KCL clearly indicates that charge flowing towards a point in an electrical circuit is equal to the amount of charge flowing away from the point i.e ; there is no accumulation of charge at any point (node) in an electrical circuit.

Kirchhoff’s Voltage Law (KVL): KVL is based on the law of conservation of energy. Statement: The law states that, ”In an electrical circuit in any closed loop (Mesh), the algebraic sum of the EMF applied is equal to the algebraic sum of the voltage drops in the elements of the mesh. Alternatively KVL states that in any closed mesh or loop in an electrical network the algebraic sum of all emfs is equal to zero. Kirchhoff’s second law is also known as Voltage Law or Mesh law.

ΣIR= ΣE Illustration: Consider the Circuit shown in Figure-2.2 where an emf source E excites the circuit of three passive elements R1 , R2 and R3.


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Figure-2.2: Circuit for KVL illustration. Here applied EMF to the closed loop is E=45V Total circuit Resistance R= 5 +10 +7.5 = 22.5Ω Hence loop current I= 45

22.5= 2𝐴

Thus E = I(R1+R2+R3) = 2(22.5)=45V=E This proves that algebraic sum of all emfs in circuit shown in Figure-2 is zero i.e E +(-I(R1+R2=R3)=zero

The voltage drop occurs in the supposed direction of current is known as Positive voltage drop while the other one is negative voltage drop. In the above fig, I1R1 and I3R3 are all positive voltage drops as they occur in one direction only. If we go around the closed circuit (or each mesh), and multiply the resistance of the conductor and the flowing current in it, then the sum of the IR is equal to the sum of the applied EMF sources connected to the circuit. It is very important to determine the direction of current whenever solving circuits via Kirchhoff’s laws. The direction of current can be supposed through clockwise or anticlockwise direction. Once you select the custom direction of the current, you will have to apply and maintain the same direction for overall circuit until the final solution of the circuit.

If we got the final value as positive, it means, the supposed direction of the current were correct. In case of negative values, the current of the direction is reversal as compared to the supposed one then.


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Application of KCL and KVL (Kirchhoff’s Laws) in a given Circuit: Consider the circuit shown in Figure-2.3 where Resistors of R1= 10Ω, R2 = 4Ω and R3 = 8Ω are connected up to two batteries (of negligible resistance) .We have to find the current through each resistor using KCL and KVL.

Figure-2.3: Circuit for application of KCL/KVL for finding branch currents. Let the arrows indicate the direction of currents flowing in loops of circuit shown in Figure-2.3 .Apply KCL on Junctions C and A. Therefore, current in mesh ABC = i1 Current in branch CA = i2 .Then current in Mesh CDA = i1 – i2 Now, Apply KVL on Mesh ABC, 20V are acting in clockwise direction. Equating the sum of IR products, we get; 10i1 + 4i2 = 20 ……………. (2.1) In mesh ACD, 12 volts are acting in clockwise direction, then: 8(i1–i2) – 4i2= 12 8i1 – 8i2 – 4i2=12 8i1 – 12i2 = 12 ……………. (2.2) Multiplying equation (I) by 3; 30i1 + 12i2 = 60 Solving for i1 30i1 + 12i2 = 60 8i1 – 12i2 = 12 ______________ 38i1 = 72


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The above equation can be also simplified by Elimination or Cramer’s Rule. i1 = 72/38 = 1.895 Amperes = Current in 10 Ohms resistor Substituting this value in (2.1), we get: 10(1.895) + 4i2 = 20 4i2 = 20 – 18.95 i2 = 0.263 Amperes = Current in 4 Ohms Resistors. Now, i1 – i2 = 1.895 – 0.263 = 1.632 Amperes.

Thus we can find requisite currents using the law.

3-MESH & NODE ANALYSIS Mesh and Node analysis comprise as two important methods for determining various currents and voltages. These methods are based on the systematic application of Kirchhoff’s laws and form important tools for circuit analysis. THE NODE ANALYSIS METHOD: Consider a typical resistive circuit as shown in Figure-3.1. The circuit is excited by a voltage source Vs.

R1

+ R3

Vs _ R2 R4

Figure -3.1. A circuit for Node analysis. A voltage is always defined as the potential difference between two points. When we talk about the voltage at a certain point of a circuit we imply that the measurement is performed between that point and some other point in the circuit. In most cases that other point is referred to as ground. The node method or the node voltage method, is a very powerful approach for circuit analysis and it is based on the application of KCL, KVL and

http://www.electricaltechnology.org/2015/01/cramers-rule-2-3-equation-systems-easy-step-step.html


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Ohm’s law. The procedure for analyzing a circuit with the node method is based on the following steps.

1. Clearly label all circuit parameters and distinguish the unknown parameters from the known.

2. Identify all nodes of the circuit. 3. Select a node as the reference node also called the ground and

assign to it a potential of 0 Volts. All other voltages in the circuit are measured with respect to the reference node.

4. Label the voltages at all other nodes. 5. Assign and label polarities. 6. Apply KCL at each node and express the branch currents in

terms of the node voltages. 7. Solve the resulting simultaneous equations for the node voltages. 8. Now that the node voltages are known, the branch currents may be

obtained from Ohm’s law. We will use the circuit of Figure-3.1 for a step by step demonstration of the node method. Figure-3.2 shows the implementation of steps 1 and 2. We have labeled all elements and identified all relevant nodes in the circuit.

n1 R1 n2

+ R3

Vs _ R2 n3 R4

n4 Figure -3.2 Circuit with labeled nodes.

The third step is to select one of the identified nodes as the reference node. We have four different choices for the assignment. In principle any of these nodes may be selected as the reference node. However, some nodes are more useful than others. Useful nodes are the ones which make the problem easier to understand and solve. There are a few general guidelines that we need to remember as we make the selection of the reference node.

1. A useful reference node is one which has the largest number of elements connected to it.

2. A useful reference node is one which is connected to the maximum number of voltage sources.


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For our example circuit the selection of node n4 as the reference node is the right choice. The next step is to label the voltages at the selected nodes. Figure-3.3 shows the circuit with the labeled nodal voltages. The reference node is assigned voltage 0 Volts indicated by the ground symbol. The remaining node voltages are labeled v1, v2, v3.

v1 R1 v2

+ R3

Vs _ R2 v3 R4

Figure-3.3. Circuit with assigned nodal voltages. For the next step we assign current flow and polarities, see Figure-3.4. Figure-3. 4. Example circuit with assigned node voltages and polarities. Before proceeding let’s look at the circuit shown on Figure 4 bit closer. Note that the problem is completely defined. Once we determine the values for the node voltages v1, v2, v3 we will be able to completely characterize this circuit. So let’s go on to calculate the node voltages by applying KCL at the designated nodes. For node n1 since the voltage of the voltage source is known we may

1R

2R

3R

4R

1V

3V

2V

VS

1I

1I

2I

3I


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directly label the voltage v1 as

v 1 = Vs (3.1) and as a result we have reduced the number of unknowns from 3 to 2. KCL at node n2 associated with voltage v2 gives:

i1 = i 2 + i 3 (3.2) The currents i1, i2, i3 are expressed in terms of the voltages v1, v2, v3 as follows.

i 1 = Vs- v2 (3.3) R1

i 2 = v 2 (3.4) R 2 I3 = v2 - v3 (3.5) R3

By combining Eqs. 3.2 – 3.5 we obtain

Vs- v 2 - v 2 - v 2 - v 3 = 0 (3.6) R1 R 2 R 3

Rewrite the above expression as a linear function of the unknown voltages v2 and v3

gives.

v 2 1 + 1

+ 1 - v3 1

= Vs 1

R1 R 2 R 3 R 3 R1

KCL at node n3 associated with voltage v3 gives:

v 2 - v 3 - v 3

= 0

R 3 R 4

or

- v 2 1 + v 3 1

+ 1 = 0

R 3 R 3 R 4

(3.7) (3.8) (3.9)

E-Content for Electronics Semester-I (CBCS) UNIT-I

B.Sc 2016

Govt. Degree College Bemina Page 12

The next step is to solve the simultaneous equations 3.7 and 3.9 for the node voltages v2 and v3.

Node voltage method provides an algorithm for calculating the voltages at the nodes of a circuit. Provided one can specify the connectivity of elements between nodes, then one can write down a set of simultaneous equations for the voltages at the nodes. Once these voltages have been solved for, then the currents are calculated via Ohm’s law. THE MESH ANALYSIS METHOD:

In mesh analysis method the mesh currents are used as the circuit variables. The procedure for obtaining the solution is similar to that followed in the Node method and the various steps are given below.

1. Clearly label all circuit parameters and distinguish the unknown parameters from the known.

2. Identify all meshes of the circuit. 3. Assign mesh currents and label polarities. 4. Apply KVL at each mesh and express the voltages in terms of the mesh

currents. 5. Solve the resulting simultaneous equations for the mesh currents. 6. Now that the mesh currents are known, the voltages may be obtained

from Ohm’s law. A mesh is defined as a loop which does not contain any other loops. Our circuit example has three loops but only two meshes as shown on Figure-3.5. Note that we have assigned a ground potential to a certain part of the circuit. Since the definition of ground potential is fundamental in understanding circuits this is a good practice and thus will continue to designate a reference (ground) potential as we continue to design and analyze circuits regardless of the method used in the analysis.

loop R1

R3 +

Vs mesh1 R2 mesh2

_ R4

Figure 3.5. Identification of the meshes


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The meshes of interest are mesh1 and mesh2. For the next step we will assign mesh currents, define current direction and voltage polarities. The direction of the mesh currents I1 and I2 is defined in the clockwise direction as shown on Figure 3.6. This definition for the current direction is arbitrary but it helps if we maintain consistence in the way we define these current directions. Note that in certain parts of the mesh the branch current may be the same as the current in the mesh. The branch of the circuit containing resistor R2 is shared by the two meshes and thus the branch current (the current flowing through R2 ) is the difference of the two mesh currents. (Note that in order to distinguish between the mesh currents and the branch currents by using the symbol I for the mesh currents and the symbol i for the branch currents.)

R1

+ R3

mesh2

Vs mesh1

_ R2

R4

I1 I2

Figure -3.6. Labeling mesh current direction Now let’s turn our attention in labeling the voltages across the various branch elements. We choose to assign the voltage labels to be consistent with the direction of the indicated mesh currents. In the case where a certain branch is shared by two meshes as is the case in our example with the branch that contains resistor R2 the labeling of the voltage is done for each mesh consistent with the assigned direction of the mesh current. In this, our first encounter with mesh analysis let’s consider the each mesh separately and apply KVL around the loop following the defined direction of the mesh current. Considering mesh1. For clarity we have separated mesh1 from the circuit on Figure -3.7. In doing this, care must be taken to carry all the information of the shared branches. Here we indicate the direction of mesh current I2 on the shared branch.


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R1

+ _

+ mesh1 +

I2

Vs R2

_ _

I1

Figure -3.7. Sub-circuit for mesh1 Applying KVL to mesh1. Starting at the upper left corner and proceeding in a clock-wise direction the sum of voltages across all elements encountered is:

I1R1 +(I1 − I2 )R2 −Vs = 0 (3.10) Similarly, consideration of mesh2 is shown on Figure -3.8. Note again that we have indicated the direction of the mesh current I1 on the shared circuit branch.

_

+ R3

_

mesh2

R2

I1 +

+ I2 _ R4

Figure-3.8. Sub-circuit for mesh2 Applying KVL to mesh2 Starting at the upper right corner and proceeding in a clock-wise direction the sum of voltages across all elements encountered is:

I2 ( R3 +R4 )+ ( I2 −I1)R2 = 0 (3.11)


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Keeping in mind that the unknowns of the problem are the mesh currents I1 and I2 we rewrite the mesh equations 3.13 and 3.14 as

I1(R1 + R2 )−I2R2 =Vs (3.12)

− I1R2 +I2 (R2 +R3 +R4 )= 0 (3.13)

In matrix form equations 3.15and 3.16 become,

R1 + R2 −R2 I1 Vs (3.14)

−R2 R2 +R3 +R4

=

0

I2

Equation 3.14 may now be solved for the mesh currents I1 and I2. It is evident from Figure-3.9 that the branch currents are:

i1 R1 i3

i2

+ R3

mesh1 mesh2

Vs

R2

_

R4

I1 I2

Figure 3.9. Branch and mesh currents

i1 = I1 i2 = I1 −I2 (3.15)

i3 = I2 AN EXAMPLE OF MESH ANALYSIS Mesh analysis with current sources Consider the circuit on Figure 3.91 which contains a current source. The application of the mesh analysis for this circuit does not present any difficulty once we realize that the mesh current of the mesh containing the current source is equal to the current of the current source: i.e. I2 = Is.


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i1 R1 i3

i2 I2

+ R3

mesh1 mesh2

Vs

R2 Is

_

I1

Figure-3.91. Mesh analysis with a current source. In defining the direction of the mesh current we have used the direction of the current Is. We also note that the branch current i3 = Is. Applying KVL around mesh1 we obtain

I1R1 + ( I1 + Is)R2 =Vs (3.16) The above equation simply indicates that the presence of the current source in one of the meshes reduces the number of equations in the problem.

The unknown mesh current is = 𝑉𝑠−𝐼𝑠𝑅2

𝑅1+𝑅2

4-Star /Delta network Transformation.

The configuration of circuit connection can be changed to make the calculation easier. There are TWO

type of transformations which are Delta () to star connection () and vice versa.

Figure -4.1: Delta and Star Circuit Connection.

a

c b

Ra

RbRc

R1 R2

R3

a3

c2

1

RR

RR

RR

accbba

accbba

b

accbba

RRRRRR

RRRRRR

RRRRRR


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5-PRINCIPLE OF DUALITY

Two circuits are said to be duals of one another if they are described by the same characterizing Equations with the dual pairs interchanged. The dual pairs means components and sources whose duality is shown in table below;

Table: 5.1

Thus the principle of Duality means that the solution to the characterizing equations for one circuit can be applied to its dual circuit.

The equations that describe the currents and voltages in one circuit are the same set of equations for its dual , where the variables have been interchanged.

In case of an inductor and a capacitor the frequency dependence is main attribute and the same is opposite to each other thus making them ideal duals.

ILLUSTRATION:

We can construct a dual of circuit shown in Figure- 5.1 by following the steps enumerated hereunder;

Figure-5.1: Circuit for illustration of Principle of Duality.

DUALITY OF COMPONETS / DEVICES Voltage (v) Current (i)

Voltage Source Current Source

Resistance (R) Conductance (G)

Inductance (L) Capacitance (C)

Node Mesh/Loop

Series Path Parallel Path

Open Circuit Short Circuit

KVL KCL

Thévenin Norton

Table showing

Duals


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Steps to be taken to generate a dual of a given circuit:

Place a node at the center of each mesh of the circuit (Refer Figure-5.2)

Place a reference node (ground) outside of the circuit.(Refer Figure-5.3)

Draw lines between nodes such that each line crosses an element. (Refer Figure-5.4)

Replace the element by its dual pair i.e a resistance by a conductance and so forth.

.(Refer Table-5.2)

Determine the polarity of the voltage source and direction of the current source.

Figure-5.2: Placement of nodes at the center of each mesh of circuit of Figure-5.1

Figure-5.3 : Placement of reference node outside of circuit of Figure-5.2

Figure-5.4: Placement of reference node outside of circuit of Figure-5.3


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Component in Original circuit Shown in Figure-20

Its Dual

Voltage source (4 V) Current source (4 A)

Resistor Ra (1 kΩ) Conductor R1 (1/1kW = 1 m )

Resistor Rb (4 kΩ) Conductor R2 (1/4kW = 0.25 m )

Resistor Rc (4 kΩ) Conductor R3 (1/1kW = 1 m )

Inductor La (3 mH) Capacitor C1 (3 mF)

Capacitor Ca (50 mF) Inductor L1 (50 mH)

Current Source (20 mA) Voltage source (20 mV)

Table-5.2

Finally for Determining the polarity of the voltage source and direction of the current source we have to ensure that in the original circuit the voltage source forces current to flow from the reference ground to the node that is shared by the current source and R1 , the dual of Ra . Further the current source causes the current to flow from the node where Rc is connected towards other meshes . Its dual should cause current to flow from the node between it and R3 to distributed node (reference) of the rest of the circuit.

Thus the dual circuit is drawn as shown in Figure-5.5. and the said circuit shall be defined by the same equations for currents and voltages as is for the original circuit in Figure-5.1

Figure-5.5: Dual of circuit shown in Figure-5.1


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6-SUPERPOSITION THEOREM

Statment:

Superposition theorem is applicable to any circuit constituted of linear and bilateral elements and states that if a linear system is driven by more than one independent power source, the total response is the sum of the individual responses.

Application (Proof) :

Let us consider a circuit consisting of resistors (linear & bilateral) and a current and voltage source (active device) as shown in Figure-6.1 below.

Figure -6.1 : Showing a network of linear & bilateral elements(resistors) and sources.

Using the principle of superposition as envisaged in the theorem we can find the branch currents by considering one source (energy source) at a time. Hence two cases arise.

Case-I

In this case we will consider the voltage source (120V) and remove current source i.e ; use an open circuit . The circuit of Fig-6.1 reduces to circuit as shown in Fig-6.2

We begin by calculating the branch current caused by the voltage source of 120 V. By substituting the ideal current with open circuit, we deactivate the current source, as shown in Figure -6.2

120 V 3

6

12 A4

2

i1 i2i3

i4


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Figure -6.2 : Showing the network of Fig-6.1 with current source removed.

To calculate the branch current, the node voltage across the 3Ω resistor must be known. Therefore

= 0

Where V1 = 30V

The equations for the currents in each branch are as under;

I’1= =15 A

I’2= =10A

I’3= I’4= =5 A ------(6.I)

Case-II

In this case we will consider the Current source (12A) and remove Voltage source i.e ; use an short circuit . The circuit of Fig-6.1 reduces to circuit as shown in Fig-6.3

120 V 3

6

4

2

i'1 i'2i'3 i'4

v1

42v

3v

6120v 111

630120

330

630


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Figure -6.3 : Showing the network of Fig-01 with Voltage source removed.

Now to compute the branch currents due to current source, we deactivate the ideal voltage source with a short circuit, as shown in Figure-6.4.

To determine the branch current, solve the node voltages across the 3Ω dan 4Ω resistors shown in Fig-6.4.

Figure -6.4 : Calculation of branch voltages

=0

=0

By solving these equations, we obtain

v3 = -12 V

v4 = -24 V

Now we can find the branch currents.

𝑖1" =

−𝑣3

6=

12

6= 2𝐴

2634333 vvvv

124

v2

vv 434

3

6

12 A4

2

i1"

i2"i3"

i4"

3

6

12 A4

2

v3v4

+

-

+

-


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𝑖2" =

𝑣3

3=

−12

3= −4𝐴

𝑖3" =

𝑣3 − 𝑣4

2=

−12 + 24

2= 6𝐴

𝑖4" =

𝑣4

4=

−24

4= −6𝐴

----------------(6.2)

To find the actual current of the circuit, add the currents due to both the current and voltage source,

𝑖1 = 𝑖′1 + 𝑖"1 = 15 + 2 = 17𝐴

𝑖2 = 𝑖′2 + 𝑖"2 = 10 − 4 = 6𝐴

𝑖3 = 𝑖′3 + 𝑖"3 = 5 + 6 = 11𝐴

𝑖4 = 𝑖′4 + 𝑖"4 = 5 − 6 = −1𝐴

Thus the final currents can be computed by the Principle of Superposition.

7-THEVNIN’S THEOREM

(M. Leon Thévenin (1857-1926), published his famous theorem in 1883)

Statment :

Thevenin's Theorem states that any two terminal network consisting of

linear and bilateral elements and energy source/s (Voltage and /or

Current) can be converted into an equivalent circuit consisting of a

voltage source called Thevenin’s Voltage in series with a resistance

(Impedance for ac circuits) called as Thevenin’s Resistance (Impedance for

ac circuits).


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Thevenin’s Voltage Vo is the voltage that appears across the two terminals when load

resistance (RL) is removed.

Thevenin’s Resistance Rs is the resistance that appears across the two terminals when

looking into the circuit in absence of load resistance RL with all sources removed i.e :

Voltage sources short circuited and current sources open circuited.

Figure -7.1 : Thevenin’s Equivalent Circuit Model

Here we see V= Vo - i . Rs


Let us consider a circuit shown in figure-7.2 which consists of

Resistors and a voltage Source and a current source. The Circuit

delivers a voltage of Vab across its output terminals a and b.

Inorder to draw its equivalent circuit we have to calculate the value

of Vo and Rs.

Figure -7.2 : Circuit whose Thevenin’s Equivalent is to be computed.

25 V 20

+

-

v13 A

5 4 +

-

vab

a

b


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In order to find the Thevenin equivalent circuit for the circuit shown in Figure -07, calculate

the open circuit voltage, vab. Note that when the a, b terminals are open, there is no current

flow to 4Ω resistor. Therefore, the voltage Vab is the same as the voltage across the 3A

current source, labeled V1.

To find the voltage V1, solve the equations for the singular node voltage. By choosing the

bottom right node as the reference node,

V1−25

5+

v1

20− 3 = 0

By solving the equation, V1 = 32 V. Therefore, the Thevenin voltage Vth for the circuit is 32 V.

The next step is to short circuit the terminals and find the short circuit current for the circuit

shown in Figure-08. Note that the current is in the same direction as the falling voltage at the

terminal.

Figure -7.3 : Short Circuit for computation of Thevenin’s Equivalent..

Current isc can be found if V2 is known. By using the bottom right node as the reference

node, the equation for v2 becomes

𝑉2 − 25

5+

𝑉2

20− 3 +

𝑉2

4= 0

By solving the above equation, V2 = 16 V. Therefore, the short circuit current isc is

𝑖𝑠𝑐 =16

4= 4𝐴

The Thevenin’s Resistance Rs is

𝑅𝑠 =𝑉𝑜

𝐼𝑠𝑐=

32

4= 8 𝑂ℎ𝑚

25 V 20

+

-

v23 A

5 4 +

-

vab

a

b

isc


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Thus equivalent circuit for circuit shown in Figure-7.2 will be as shown in Figure-7.4

Figure -7.4 : Thevenin’s Equivalent Circuit of Circuit shown in Figure-7.1

Since both circuits shown in Figure-7.1 and 7.4 deliver the same current to the load and as

such Thevenin’s Theorem is verified.

Thevenin’s Equivalent circuit delivering same functionality has one resistor and a voltage

source while as the original circuit shown in Figure-07 has got three resistors and two energy

sources.

8-NORTON’S THEOREM

Statment :

Norton's Theorem states that any two terminal network consisting of linear

and bilateral elements and energy source/s (Voltage and /or Current) can

be converted into an equivalent circuit consisting of a current source in

parallel with a resistance (Impedance for ac circuits).

Current source Io called as Norton’s Current is the short circuit current when load

resistance (RL) is removed.

8

V32


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Norton’s Resistance Rs is the resistance that appears across the two terminals when

looking into the circuit in absence of load resistance RL with all sources removed i.e :

Voltage sources short circuited and current sources open circuited. Thus Norton’s

resistance and Thevenin’s Resistance are calculated in identical form.

Thus the Norton equivalent circuit contains an independent current source which is parallel

to the Norton equivalent resistance. It can be derived from the Thevenin equivalent circuit by

using source transformation. Therefore, the Norton current is equivalent to the short circuit

current at the terminal being studied, and Norton resistance is equivalent to Thevenin

resistance.

Figure -8.1 : Norton’s’s Equivalent Circuit Model

Here we see i = io - 𝑉

𝑅𝑆


Since Thevenin’s and Norton’s Equivalents have same process for finding equivalent

resistance as such let us find both Thevenin’s as well as Norton’s Equivalent circuits

for the circuit shown hereunder as Figure-8.2

Figure -8.2 : Circuit whose Norton’s / Thevenin’s Equivalent is to be computed.

25 V 20 3 A

5 4 a

b

sR

VI 0

0


B.Sc 2016


For finding the Norton’s Equivalent circuit we proceed with following steps:

Step- 1: Source transformation (The 25V voltage source is converted to a 5 A current source.)

Figure -8.3 : Source transformation of circuit shown in Figure-8.1.

Step-2 : Combination of parallel source and parallel resistance

Figure -8.4 : Building of Parallel current source and Parallel resistance from circuit in Figure-8.3

Step-03: Source transformation (combined serial resistance to produce the Thevenin equivalent

circuit.)

Figure -8.5 : Thevenin’s Equivalent of circuit in Figure-8.4

20 3 A5

4 a

b

5 A

4 8 A

4 a

b

8

32 V

a

b


B.Sc 2016


• Step 4: Source transformation (To produce the Norton equivalent circuit. The current source

is 4A (I = V/R = 32 V/8 ))

Figure -8.5 : Norton’s’s Equivalent of circuit in Figure-8.1

9-MAXIMUM POWER TRANSFER THEOREM

Statment :

The theorem states that’ “The power transfered from a source or circuit to a load is maximum when the resistance of load is made equal or matched to the internal resistance of the source or circuit providing the power to the load.”

Illustration:

Maximum power transfer can be illustrated by Figure 9.1 . Assume that a resistance network contains independent and dependent sources, and terminals a and b to which the resistance RL is connected. Then determine the value of RL that allows the delivery of maximum power to the load resistor.


B.Sc 2016


Figure -9.1 : Maximum Power Transfer When RL =RTh

Maximum power transfer happens when the load resistance RL is equal to the Thevenin equivalent

resistance, RTh. To find the maximum power delivered to RL,

𝑃𝑚𝑎𝑥 =𝑉𝑇ℎ

2 𝑅𝐿

(2𝑅𝐿 )2 =𝑉𝑇ℎ

2

4𝑅𝐿

10-RECIPROCITY THEOREM

Statment:

"In any linear and bilateral network consisting the linear and bilateral impedance the ratio of voltage V applied between any two terminals to the current I measured in any branch is same as the ratio V to I obtained by interchanging the positions of voltage source and the ammeter used for current measurement."

The ratio V to I is generally called transfer impedance. Here both the voltage source and ammeter are assumed to have zero impedance. This theorem holds good if both, voltage source and ammeter have same internal impedances.

This theorem is equally useful in the circuit theory as well as the field theory. Let us consider that the antenna system is represented as a 4-terminal network with pair of terminals at input and another pair of terminals at the output. It is also called two port network as pair of terminals is defined as port. The 4-terminal representation of the


B.Sc 2016


antenna system is as shown in the Fig. 10.1 (a). Note that the pair of terminals or ports are nothing but the terminals of the dipoles as shown in the Fig. 10.1 (b)

(a) (b)

Fig 10.1 : 4-Terminal representation of the antenna system

𝑉1 = 𝑍11𝐼1 + 𝑍12𝐼2

𝑉2 = 𝑍21𝐼1 + 𝑍22𝐼2

or

𝐼1 = 𝑌11𝑉1 + 𝑌12𝑉2

𝐼2 = 𝑌21𝑉1 + 𝑌22𝑉2

Thus according to the reciprocity theorem for the linear and bilateral networks, the conditions of the reciprocity of the network are,

Z12 =Z21 or Y12=Y21 or Z’12 =Z’21

The impedances z12 and z21 are called mutual impedances which are individually ratio of open circuit voltage at one port to the current at other port. Similarly admittances y 12 and y 21 are called transfer admittances which are individually the ratio of a short circuited current at one port to the voltage at other port. Finally the impedances zɳ12 and zɳ21 are called transfer impedances which are individually the ratio of an open circuit voltage at one port to a short circuit current at other port.

ANTENNA

SYSTEM

1

Port

Input

'1

Port

Output

'2

2 1I 2I 1I 2I

1V

2V


B.Sc 2016



Let us consider a circuit shown in Figure-10.2 and use a source E to excite the circuit alternatively as shown below.

Figure-10.2 : Circuit for Verifying Reciprocity

Case I

Let us find response I2 of voltage source E in the position shown in Fig 10.3.

Figure-10.3 : Circuit with Source in loop-I

𝑍𝑒𝑓𝑓 = (𝑍2𝐼𝐼𝑍3) + 𝑍1

=𝑍2𝑍3

𝑍2 + 𝑍3+ 𝑍1

=𝑍2𝑍3 + 𝑍1𝑍2 + 𝑍3𝑍1

𝑍2 + 𝑍3

1Z

3Z

2Z

1Z

3Z

2Z

1I

E

2I

2I


B.Sc 2016


𝐼1 =𝐸

𝑍𝑒𝑓𝑓

𝐼2 = 𝐼1

𝑍3

𝑍2 + 𝑍3=

𝐸𝑍3

𝑍1𝑍2 + 𝑍2𝑍3 + 𝑍3𝑍1

I’1

Figure-10.4: Showing Source in loop-II

𝑍𝑒𝑓𝑓 = (𝑍1𝐼𝐼𝑍3) + 𝑍2

=𝑍1𝑍3

𝑍1 + 𝑍3+ 𝑍2

=𝑍1𝑍2 + 𝑍2𝑍3 + 𝑍3𝑍1

𝑍1 + 𝑍3

𝐼′2 =𝐸

𝑍𝑒𝑓𝑓

𝐼′1 = 𝐼′2

𝑍3

𝑍1 + 𝑍3=

𝐸𝑍3

𝑍1𝑍2 + 𝑍2𝑍3 + 𝑍3𝑍1

1Z

3Z

2Z

'1I

E

'2I


B.Sc 2016


11-Two Port Networks - h, Y, Z Parameters

For applying a signal (current or Voltage) there is a minimum requirement of a pair of terminals called as a port. Since signal processing devices require a signal to enter as well as leave the device (circuit) as such these circuits are called two port networks. A two-port network is an electrical circuit or device with two pairs of terminals. Examples include transistors, filters and other signal processing circuits. A two-port network basically consists in isolating either a complete circuit or part of it and finding its characteristic parameters. Once this is done, the isolated part of the circuit becomes a "black box" with a set of distinctive properties, enabling us to abstract away its specific physical buildup, thus simplifying analysis. Any circuit can be transformed into a two-port network provided that it does not contain an independent source.

Figure-11.1: A two port Network A two-port network is represented by four external variables: voltage and current at the input port, and voltage and current at the output port, so that the two-port network can be treated as a black box modeled by the relationships between the four variables , and there exist six different ways to describe the relationships between these variables, depending on which two of the four variables are given, while the other two can always be derived. The relationship between the input/output currents (I1 and I2) and input/output Voltages (V1 and V2) of two port network depicted in Figure-01 above can be expressed in different ways and as such giving rise two different models of two port networks.

http://2.bp.blogspot.com/_v2T5FtcWTMk/RezcOo91TSI/AAAAAAAAAxo/uHyl-UPc_TQ/s1600-h/twoport.png


B.Sc 2016


H-MODEL:

The H-Model is based on h-parameters which are defined hereunder;

In the H-model or hybrid model, we assume V2 and I1 are known, and find V1 and I2 by:

Where,

Here h12 and h21 are dimensionless coefficients, h11 is impedance and h22 is admittance.

Y-MODEL

In the Y-model or admittance model, the two voltages V1 and V2 are assumed to be known,

and the currents I1 and I2 can be found by:

where,

http://4.bp.blogspot.com/_v2T5FtcWTMk/RezoUI91TfI/AAAAAAAAAzQ/YAlwNa0rpuU/s1600-h/h-+para.png

http://1.bp.blogspot.com/_v2T5FtcWTMk/RezogY91TgI/AAAAAAAAAzY/dbq84YjD3nA/s1600-h/h11.png

http://4.bp.blogspot.com/_v2T5FtcWTMk/RezomI91ThI/AAAAAAAAAzg/aZQkfTh7Wpc/s1600-h/h21.png

http://3.bp.blogspot.com/_v2T5FtcWTMk/Rezje491TZI/AAAAAAAAAyg/40O0fiT1EZk/s1600-h/y-para.png

http://3.bp.blogspot.com/_v2T5FtcWTMk/Rezjy491TaI/AAAAAAAAAyo/Nf-Vw4OwO_s/s1600-h/y11.png


B.Sc 2016


Here all four parameters Y11,Y12 ,Y21 , and Y22 represent admittance. In particular,

Y21 and Y12 are transfer admittances. Y is the corresponding parameter matrix.

Z-MODEL:

In the Z-model or impedance model, the two currents I1 and I2 are assumed to be known,

and the voltages V1and V2can be found by:

where

Here all four parameters Z11, Z12, Z21, and Z22 represent impedance. In

particular, Z21 and Z12 are transfer impedances, defined as the ratio of a voltage V1 (or V2)

in one part of a network to a current I2 (or I1) in another part . Z12 = V1 / I2. Z is a 2 by 2

matrix containing all four parameters. FN: The notes have been compiled with the intention of serving precise and self explanatory content for the

students of Semester-I of CBCS undergraduate program. Any errors and omissions are accepted.

http://2.bp.blogspot.com/_v2T5FtcWTMk/RezkAo91TbI/AAAAAAAAAyw/mF_DCP3WR9I/s1600-h/y21.png

http://3.bp.blogspot.com/_v2T5FtcWTMk/RezgD491TWI/AAAAAAAAAyI/at17nkJtwWw/s1600-h/z-para.png

http://1.bp.blogspot.com/_v2T5FtcWTMk/RezgVY91TXI/AAAAAAAAAyQ/g0FoEIgtSWc/s1600-h/z11.png

http://1.bp.blogspot.com/_v2T5FtcWTMk/RezgyY91TYI/AAAAAAAAAyY/9KTFERBo4iA/s1600-h/z21.png

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