DRAM Visualization Tool -- Austin, Prashant, Vincent

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DRAM SIMULATOR VISUALIZATION TOOL

ENEE 759 H

Austin LanhamPrashant BhootVincent Chan

DRAM Visualization Tool -- Austin, Prashant, Vincent

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OUTLINE

Necessity of Visualization toolFeaturesCode StructureDemoFuture Work

DRAM Visualization Tool -- Austin, Prashant, Vincent

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NECESSITY

Numbers are hard to interpret Our waveform viewer clearly shows latency,

conflicts, bus utilization Gives the Memory system designer an insight

of the Memory Architecture Statistics are necessary to enhance the

performance Useful tool to test new Memory Design

Controller

DRAM Visualization Tool -- Austin, Prashant, Vincent

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FEATURES Command statistics, conflicts, etc. can be viewed in bar

graph Bus Utilization timing diagram Takes DRAM command information and generates

timing diagrams View output for a smaller time range, so user can

macroscopically and microscopically analyze the data Supports SDRAM, DDR, DDR2 User can specify parameters Explicitly indicates Bank Conflict, T_FAW violation

DRAM Visualization Tool -- Austin, Prashant, Vincent

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DRAM SIMULATOR

For integration and testing, used DRAM Simulator by Dave and Brinda at University of Maryland

Memory transaction based User can input the parameter file Generates output files showing latency,

transaction, conflicts, etc. Went through the code and generated required

output files

DRAM Visualization Tool -- Austin, Prashant, Vincent

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JAVA

Platform Independent, runs perfectly on Mac, Windows, Solaris

Extensive libraries/documentationFreely availableEasily expandable

DRAM Visualization Tool -- Austin, Prashant, Vincent

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CODE STRUCTURE

Java is very object oriented A class hierarchy exists

DRAM Visualization Tool -- Austin, Prashant, Vincent

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Class Hierarchy Example

JPanel

JFrame(“Display Dialog”)

JLabel(“Please select…”)

JButtonGroup JButton(“Ok”)

JRadioButton(“Introduction”)

JRadioButton(“Timing Diagram”)

JRadioButton(“Stats Bar Graph”)

ActionListener

DRAM Visualization Tool -- Austin, Prashant, Vincent

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Inheritance Example (Buttons)

Most objects stem from the light weight Object class.

Each layer adds methods. Some classes cannot be

instantiated (AbstractButton).

Object

Component

Container

JComponent

AbstractButton

JToggleButtonJButton

JRadioButton

DRAM Visualization Tool -- Austin, Prashant, Vincent

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Our Tool’s Class Tree

JFrame

JMenuBar

JMenuItem

DRAM SimulatorVisualization

Class(extends JPanel)

SideBarJPanel

JScrollPane

MouseListener

Start/End TimeDialogDisplay

Dialog

Bar GraphParameters

Dialog

DRAMParameters

Dialog

DoubleInput

IntegerInput

TimeBlockVector

StatsVector

… JFrame

main()

DrawingAreaJPanel

DRAM Visualization Tool -- Austin, Prashant, Vincent

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DEMO

File input Start and end time

DRAM Visualization Tool -- Austin, Prashant, Vincent

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DRAM TIMING PARAMETERS

Jacob, Wang, Memory System Simulator Manual

Parameter Description

tBURST Time that data burst occupies on data bus

tCAS Time between Column access command and data by DRAM

tCMD Time period that command occupies on Command bus

tCWD Time between write command and data on bus

tDQS 1 Cycle in DDRs only

tRAS Time between Row access and data restoration

tRC Time between access to different rows in same bank

tRCD Time between Row access and data ready

tRFC Time between Refresh commands

tRP Precharge time

tWR Time between end of data burst and precharge

DRAM Visualization Tool -- Austin, Prashant, Vincent

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DRAM Parameters/Timing Diagram

Bus IDs

Commandtype key

DRAM Parameters Dialog

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DRAM ACCESS PROTOCOL

RAS CAS CAW PRECHARGE REFRESH READ CYCLE

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ROW ACCESS

Jacob, Wang, ENEE 759H Lecture 6

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ROW ACCESSRAScommand

Data sensetRCD clocks long

Transaction ID

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COLUMN READ

Jacob, Wang, ENEE 759H Lecture 6

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COLUMN READ CAS read command

Data BurstTBURST

clocks long

Bank accessdictated by TCAS

DRAM Visualization Tool -- Austin, Prashant, Vincent

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COLUMN WRITE

Jacob, Wang, ENEE 759H Lecture 6

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COLUMN WRITE

TCWD=0

Write takes place in TWR clocks.

DRAM Visualization Tool -- Austin, Prashant, Vincent

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PRECHARGE

Jacob, Wang, ENEE 759H Lecture 6

DRAM Visualization Tool -- Austin, Prashant, Vincent

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BANK CONFLICT

Occurs in Open Page configuration when one row is open and another row from the same bank is accessed.

Must close row and perform a PRECHARGE.

DRAM Visualization Tool -- Austin, Prashant, Vincent

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PRECHARGE/BANK CONFLICT

Precharge before RAS to different row in open bank.

Bank Conflict.

DRAM Visualization Tool -- Austin, Prashant, Vincent

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REFRESH

Jacob, Wang, ENEE 759H Lecture 6

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REFRESHBank access for TRAS clocks.

Precharge for TRP clocks.

DRAM Visualization Tool -- Austin, Prashant, Vincent

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COMPLETE READ CYCLE

Jacob, Wang, ENEE 759H Lecture 6

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COMPLETE READ CYCLERAS followed by a CAS Read and then completed by a precharge when a bank conflict occurs.

Same rank, bank but different row = Bank Conflict.

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BAR GRAPH

Command and conflict distribution over specified time interval

Can dynamically choose timing interval Can selectively show commands &

conflicts Change granularity

DRAM Visualization Tool -- Austin, Prashant, Vincent

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Setting Bar Graph Parameters

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Command and conflict distribution

Legends

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Command and conflict distribution

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Reads and Writes

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Bank Conflicts and Precharge

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Future Work

Include RDRAM and other Memory architectures Power plot Expand Banks and Ranks in Timing Diagram Save, Export and Print data and graphs Automated input configuration Fix known issues Additional Statistics

DRAM Visualization Tool -- Austin, Prashant, Vincent

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QUESTIONS