Download - Virtual Caches

Virtual Caches

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Virtual Caches

CPUVirtualCache

MainMemory

MMU

Data Data

VirtualAddress

PhysicalAddress

VirtualAddress

Virtual Caches

Problems with Virtual Caches•Ambiguities•Aliases

Ambiguities

12

34

56

78

0 x0000

0 x5000

Physical

Address**

*

Ambiguities Virtual Address

01000

Physical Address0 5000x

Maps to

Virtual Cache

010005678

*

*

Tag Data

Ambiguities Virtual Address

01000

Physical Address0 0000x

Maps to

Virtual Cache

010005678

*

*

Tag Data

Aliases

0x0000

0x1000

0x2000

0x3000

0x4000

0x5000

VirtualAddress Space 0x000

00x100

00x200

00x300

00x400

00x500

0

PhysicalAddress Space

Managing a Virtual Cache

Context Switch• Process may use the same virtual add

ress to refer to different physical addr ess before and after context switch

• Kernel must flush everything the old p rocess had cached

• -Flushing a virtual cache can be a time consuming operation


Fork• the child receive a complete copy of

the parent’s address space• Flushing during each context switch

eliminates most inconsistencies bet ween parent’s and child’s data

• But must consider about during the copy operations

Managing a Virtual Cache - -Fork (without copy on write)

Parent’s Virtual Address Space

****

****

****

Kernel Virtual Space

Mapping to Parent’s Physical Pa

ges Temporary Mapping to

Child’s Phy sical Pages

for Copy Operation

Data Co pied to C hild’s Pa

ges


Fork• - If write through caching is used, No

special flushing is needed during for k since at least one context switch m

ust occur before the child executes• - If write back caching is used, Main m

emory must be validated before tem porary mapping is removed


Fork• if fork is implemented with co

- -py on write• - if write through, no flushing is n

eeded at fork time• - if write back, main memory mu

st be validated


Exec• Discards the process’s current addr

ess space and replaces it with a ne w one for the new program the proc

ess will run• Possible to occur ambiguities• Kernel must invalidated all user data

from cache before execution begins


Exit• Address space of process is discarded

• Last step of exit is to perform context switch that flushed th

e cache


Brk and Sbrk• use to grow and shrink the pro

cess’s bss segment• growing bss causes no cache problems

• shrink bss, kernel must invalid ates data from cache


Shared Memory and Mapped Files• no special cache management is n

eeded since the cache is flushed a t each context switch

• if single process attaches shared memory segment at different addr

ess ?


I/O

CPUVirtualCache

MainMemory I/O

MMU

Data Data Data

Virtual Address Virtual Address Physical Address Physical Address


I/O• Some problem occurs when usingDMA

• when write to device, kernel must validate main memory with cache

data before DMA starts• when read from device, cache mus

t be flushed


- User Kernel Data Ambiguities• to prevent cached kernel data

from user process, cache must be flushed

• - Apollo DN 4000, add bit indica te user or kernel mode

Virtual Caches with Keys


Virtual Caches with KeysCurren

tProces

s Key

CPUVirtualCache

MainMemory

MMU

Data Data

VirtualAddress

PhysicalAddress

VirtualAddress

Managing a Virtual Cache with Keys

Context Switch• Normally no need to flush the cach

e as long as enough keys that uniqu e can be assigned to each processe

s• when reassigning key, all entries ta

gged with affected key must be flushed


Fork• No need to Flush• Some problem

Key1

Tag0 1x00

00

0

Data10

11

97

0

Key2

Tag0 1x00

00

0

Data10

11

97

0

Managing a Virtual Cache with Keys Fork

• Some problemKey1

Tag0 1x00

00

0

Data10

11

97

0

- - -

Key1

Tag0 1x00

00

0

Data10

11

97

0

2 0 1x00

00

0

10

11

97

0


Exec• A unique key must be chosen fo

r new address space• if reassigning key, all entries ta

gged with affected key must beflushed


Exit• not necessary to invalidate cac

he at exit time• cache is flushed during contextswitch


Brk and Sbrk• Same as pure virtual cache


Shared Memory and MappedFiles• Can not share data within cache

ModM

Tag0 1x00

00

0

Data10

11

97

0

Key1

Mod-

Tag0 1x00

00

0

Data10

11

97

0

Key2


I/O• Same as pure virtual cache


- User Kernel Data Ambiguities• Kernel process have special key• User process can not access ker

nel data• Kernel process can not share us

er data

Virtual Cache Usage in MMUs

- Special purpose cache, Translation L ookside Buffer (TLB) or Address trans

lation Cache (ATC)• caching most recently used page mapping

• - - speed up virtual to physical address tra nslation process

• must be flush on each context switch

Virtual Caches

with Physical A ddress Tags


Virtual Caches with Physical Tags

CPU Virtual Cache

withPhysic

al Tags

MainMemory

MMU

Data Data

VirtualAddress

PhysicalAddress

Managing a Virtual Cache with Physical Tags

Context Switch• Normally no need to flush the cache

• No keys to mange as virtual cac he with keys


Fork• No cache flushing is required fo

r fork• Data can be shared in cache• No aliases can occur


Exec• Address space not be use by an

y process•exec deallocates pages, must b

e ensure that stale data is remo ved prior to allocating page to n

ew process


Exit• Can be either flushed at system

call or postponed until physical page are reuse


Brk and Sbrk• Like exec and exit• Can be either flushed at system

call or postponed until physical page are reuse


Shared Memory and MappedFiles• Can share data in cache• Better hit ratio for shared memory


I/O• Same as pure virtual cache


- User Kernel Data Ambiguities• No ambiguities between user a

nd kernel data• Kernel can reference cached us

er data directly

The End

Download - Virtual Caches

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