Self-sensing cantilevers with integrated conductive coaxial tips for high-resolutionelectrical scanning probe metrologyAlexandre J. Haemmerli, Nahid Harjee, Markus Koenig, Andrei G. F. Garcia, David Goldhaber-Gordon, and BethL. Pruitt Citation: Journal of Applied Physics 118, 034306 (2015); doi: 10.1063/1.4923231 View online: http://dx.doi.org/10.1063/1.4923231 View Table of Contents: http://scitation.aip.org/content/aip/journal/jap/118/3?ver=pdfcov Published by the AIP Publishing Articles you may be interested in Self-heating in piezoresistive cantilevers Appl. Phys. Lett. 98, 223103 (2011); 10.1063/1.3595485 Study of sensitivity and noise in the piezoelectric self-sensing and self-actuating cantilever with an integratedWheatstone bridge circuit Rev. Sci. Instrum. 81, 035109 (2010); 10.1063/1.3327822 Current integration force and displacement self-sensing method for cantilevered piezoelectric actuators Rev. Sci. Instrum. 80, 126103 (2009); 10.1063/1.3244040 Quasistatic displacement self-sensing method for cantilevered piezoelectric actuators Rev. Sci. Instrum. 80, 065102 (2009); 10.1063/1.3142486 Parylene cantilevers integrated with polycrystalline silicon piezoresistors for surface stress sensing Appl. Phys. Lett. 91, 083505 (2007); 10.1063/1.2772189
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Self-sensing cantilevers with integrated conductive coaxial tipsfor high-resolution electrical scanning probe metrology
Alexandre J. Haemmerli,1,a) Nahid Harjee,2,a) Markus Koenig,3 Andrei G. F. Garcia,3
David Goldhaber-Gordon,3 and Beth L. Pruitt1,b)
1Department of Mechanical Engineering, Stanford University, 440 Escondido Mall, Stanford,North Carolina 94305, USA2Department of Electrical Engineering, Stanford University, 350 Serra Mall, Stanford, North Carolina 94305,USA3Department of Physics, Stanford University, 382 Via Pueblo Mall, Stanford, North Carolina 94305, USA
(Received 4 March 2015; accepted 7 June 2015; published online 20 July 2015)
The lateral resolution of many electrical scanning probe techniques is limited by the spatial extent
of the electrostatic potential profiles produced by their probes. Conventional unshielded conductive
atomic force microscopy probes produce broad potential profiles. Shielded probes could offer
higher resolution and easier data interpretation in the study of nanostructures. Electrical scanning
probe techniques require a method of locating structures of interest, often by mapping surface
topography. As the samples studied with these techniques are often photosensitive, the typical laser
measurement of cantilever deflection can excite the sample, causing undesirable changes electrical
properties. In this work, we present the design, fabrication, and characterization of probes that
integrate coaxial tips for spatially sharp potential profiles with piezoresistors for self-contained,
electrical displacement sensing. With the apex 100 nm above the sample surface, the electrostatic
potential profile produced by our coaxial tips is more than 2 times narrower than that of unshielded
tips with no long tails. In a scan bandwidth of 1 Hz–10 kHz, our probes have a displacement resolu-
tion of 2.9 A at 293 K and 79 A at 2 K, where the low-temperature performance is limited by ampli-
fier noise. We show scanning gate microscopy images of a quantum point contact obtained with
our probes, highlighting the improvement to lateral resolution resulting from the coaxial tip.VC 2015 AIP Publishing LLC. [http://dx.doi.org/10.1063/1.4923231]
I. INTRODUCTION
Building on the principles of atomic force microscopy
(AFM), researchers have developed a wide range of electri-
cal scanning probe techniques to measure and manipulate
the local electronic properties of materials. These techniques
include scanning gate microscopy, electrostatic force micros-
copy, and Kelvin probe force microscopy which together
enable mapping of current flow, surface potential, and work
function. Common to each of these techniques is the need
for a conductive probe with a sharp tip that is used to pro-
duce an electrostatic potential perturbation at the sample.
The affect of this perturbation on the sample or the probe
itself is recorded as the probe is raster scanned to produce an
image. For example, in scanning gate microscopy (SGM),
the conductance through the sample is measured as the tip
modulates energy barriers or backscatters current carriers. In
this way, SGM has been used to map branched current flow
in two-dimensional electron gases (2DEGs)1–4 and to iden-
tify energy barriers in carbon nanotubes (CNTs).5–9 The lat-
eral resolution of AFM is limited by the tip geometry, as
features in the image plane are a spatial convolution between
the tip and sample. Sharper tips (i.e., those that approach a
spatial delta function) produce more accurate images of the
sample. Similarly, the lateral resolution of electrical
scanning probe techniques is limited by the spatial extent of
the electrostatic potential profile produced by the conductive
probe. Often, the shape of the potential profile is controlled
by the tip shape. However, the method of fabricating the con-
ductor also plays a role. Consider the most commonly used
conductive probes, commercially available metal-coated
AFM probes. Because the conductor blankets the entire can-
tilever and tip cone and is completely unshielded, it produces
a broad potential profile. Thus, while these probes have been
used to study nanostructures such as CNTs, the features in
the resulting images often appear larger than the nanostruc-
tures themselves, blurring their true location and size.
Furthermore, even when these probes are used to image mes-
oscale samples such as 2DEGs, non-trivial measurement
techniques and data post-processing are often required to
separate the data of interest from the background influence
of the broad profile. To facilitate accurate, high-resolution
electrical imaging of nanostructures, a tip capable of produc-
ing a spatially sharp electrostatic potential profile is needed.
Electrical scanning probe techniques require a means of
locating structures of interest, typically accomplished by
mapping surface topography. As the samples studied with
these techniques are often photosensitive, the conventional
laser measurement of cantilever deflection can excite the
sample and cause undesirable changes electrical properties.
At cryogenic temperatures, photoexcited carriers can take
hours or days to relax. Thus, the ideal electrical scanning
probe should have a built-in sensor that enables electrical
a)A. J. Haemmerli and N. Harjee contributed equally to this work.b)Electronic mail: [email protected]
0021-8979/2015/118(3)/034306/10/$30.00 VC 2015 AIP Publishing LLC118, 034306-1
JOURNAL OF APPLIED PHYSICS 118, 034306 (2015)
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readout of cantilever deflection. Self-sensing probes provide
additional benefits including faster setup (no optical align-
ment required) and reduced system size, complexity, and
cost.
Using a tip with a coaxial structure, it is possible to pro-
duce a highly localized potential perturbation. Such a tip
consists of an inner conductor, insulator, and outer shield. At
the tip apex, a small aperture in the shield allows electric
field lines from the inner conductor to reach the sample.
Coaxial tips were first explored for scanning near-field opti-
cal microscopy.10–16 However, these tips were rudimentary
in construction. More recently, several microfabricated
coaxial tips have been reported17–20 and some applied to
electrical scanning probe techniques.21–27
Self-sensing cantilevers have been demonstrated using
capacitors,28 piezoelectrics,29 quartz tuning forks,30 and pie-
zoresistors.31,32 Piezoresistors are attractive as sensors
because they can be readily fabricated using CMOS-
compatible processes, their resistance change can be detected
with a simple Wheatstone bridge circuit, and they provide
linear response to stress with large dynamic range (>140 dB
(Ref. 33)). Researchers have continued to improve piezore-
sistive cantilevers by integrating actuators,34 enabling mea-
surement of lateral forces,35 integrating on-chip signal
conditioning,36 and optimizing force resolution.37–41
In this paper, we present new scanning probes that inte-
grate coaxial tips for spatially sharp electrostatic potential
profiles with piezoresistive cantilevers for self-contained,
electrical displacement sensing. Like commercial AFM
probes, the probes are batch fabricated using standard semi-
conductor manufacturing methods. We describe the design,
fabrication, and characterization of this new probe. We show
scanning gate microscopy images of a quantum point contact
obtained with our probes, highlighting the improvement to
lateral resolution resulting from the coaxial tip.
II. DESIGN
Our scanning probe design is based on the results of a pre-
viously reported numerical optimizer39,42,43 and was adapted
for displacement resolution and 4-leg cantilevers. Cantilever
mechanical properties predicted by the optimizer, including
spring constant and resonant frequency, were verified by finite
element analysis (FEA) with COMSOL Multiphysics. We also
used FEA to compare the electric field distributions produced
by an unshielded tip and a coaxial tip, Figs. 1 and 2.
There are several differences between the current scan-
ning probes and our previous design.44 First, the piezoresis-
tor and inner conductor to the coaxial tip are n-type, formed
by phosphorus diffusion into p-type silicon. We selected this
process as it allows us to easily fabricate dopant profiles with
high surface concentration and shallow junction depths.
Second, we moved the compensation piezoresistor from the
die, where it was not released, to a separate cantilever with
the same geometry as the active cantilever. This more
closely matches the environments of the two piezoresistors
and improves rejection of common mode signals (e.g., fluc-
tuations in ambient temperature) when differential readout is
employed. Last, we included a design variation in which the
silicon between electrical traces is removed to minimize
leakage paths and better defined piezoresistor geometry. This
results in a cantilever with four legs as seen in Fig. 3. With
less current leakage between n-type diffusions, sensitivity to
tip displacement is improved and cross-talk between the
coaxial tip and the piezoresistor is reduced. The numerical
optimizer we used is written in Matlab and can calculate the
performance of a user-specified design or, given an optimiza-
tion goal (for example, minimize the resolvable force at the
tip) and constraints (power consumption, bandwidth, etc.),
can vary the parameters of an initial design to arrive at a
more optimized probe. In this design, the optimized parame-
ters were cantilever and piezoresistor geometries as well as
doping time and temperature. The optimizer uses a recursive
method to optimize and find the optimal displacement reso-
lution while keeping the parameters within the defined
design bounds. More details on the design and operation of
the optimizer can be found in Ref. 39. We made the follow-
ing enhancements to the code to enable optimization of n-
type piezoresistive cantilevers for contact mode AFM.
FIG. 1. Simulations of the electrostatic potential profiles produced by (a) an
unshielded tip and (b) a coaxial tip with a grounded shield. The tips are
100 nm and 20 nm above a GaAs/AlGaAs heterostructure containing a two-
dimensional electron gas (2DEG) 57 nm below the surface. They are biased
at �1 V and have an opening half angle of 33�. The unshielded tip has a ra-
dius of curvature of 10 nm, while the coaxial tip has an opening radius of
30 nm. In (a), the potential decays slowly with distance while in (b), the
potential drop is localized at the tip apex.
034306-2 Haemmerli et al. J. Appl. Phys. 118, 034306 (2015)
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A. Displacement resolution
The code was originally written to optimize cantilevers
for force-sensing applications. Thus, the optimization goal
was to minimize Fmin, the minimum resolvable force, given
by
Fmin ¼Vnoise
SFV; (1)
where Vnoise is the root mean square noise voltage and SFV is
the voltage force sensitivity as defined in Ref. 40. For contact
mode AFM, where we are sensing tip displacements, we
added to ability to minimize dmin, the minimum resolvable
displacement, given by
dmin ¼Vnoise
SdV; (2)
where SdV is the voltage displacement sensitivity. The sensi-
tivities SFV and SdV are related by k, the cantilever spring
constant, such that SdV¼ kSFV.
B. Cantilevers with four legs
The code previously assumed a cantilever with uniform
width. We modified the expression for SFV, applicable for a
quarter-active Wheatstone bridge readout circuit, for cantile-
vers with four legs
SFV ¼3 lc � 0:5lpð Þpl;max
8wpt2c
cVbridgeb�: (3)
Here, lc and tc are the length and thickness of the cantilever,
lp and wp are the length and width of the piezoresistor (with
equivalent dimensions for the legs), l;max is the maximum
piezoresistance coefficient, Vbridge is the voltage across the
bridge, and c and b� are the geometry and efficiency factors
as defined in Ref. 40. In the denominator, we replaced wc,
the width of the cantilever, with 4wp, the effective width at
its root. To calculate SdV, we derived k for a cantilever with
four legs
k ¼ Et3c
4l3c
wcþ lp
1
wp� 4
wc
� �l2p � 3lclp þ 3l2
c
� � ; (4)
where E is the elastic modulus of the cantilever material.
Although the cantilever is made of silicon with silicon diox-
ide and aluminum thin films on top, a single E is a good
approximation as the silicon layer is 40� thicker. To arrive
at this expression, we equated the internal and external tor-
ques from a force at the tip, using a piecewise function for
the cantilever moment of inertia corresponding to the regions
with and without legs.
C. Piezoresistance factor and dopant activation
To calculate b� in (3), we need the relationship between
piezoresistance factor and carrier concentration.40 Because
our piezoresistors are n-type, we replaced the p-type relation-
ship reported by Harley38 with the n-type relationship of
Tufte and Stelzer.45 The code uses Tsais model46 to predict
phosphorus concentration profiles for a given diffusion time
and temperature. Instead of assuming complete dopant ioni-
zation, we now convert the dopant concentration profiles
into carrier concentration profiles using activation data from
Fair and Tsai.47
D. Ambient temperature
As SGM is often performed at cryogenic temperatures,
we now permit a user-specified ambient temperature instead
of fixing it at 300 K. Currently, changing the temperature
only affects the calculation of Johnson noise. We are work-
ing on adding the temperature dependence of mobility and
dopant activation.48
FIG. 2. Simulations of the induced charge density Dn in the 2DEG for the
conditions in Figure 1, where solid and dashed lines are for a tip 100 nm and
20 nm above the surface, respectively. The full width at half maximum
(FWHM) of the perturbation produced by the coaxial tip is �2–3� narrower
than that of the unshielded tip. Moreover, the perturbation from the
unshielded tip exhibits a long tail. At a distance of 1 lm from the tip, it is
still 17% of its maximum value whereas the perturbation from the coaxial
tip is negligibly small.
FIG. 3. Schematic of our cantilever probes in (a) plan and (b) cross-section
views. The silicon between electrical traces was etched to minimize current
leakage paths, resulting in a cantilever with four legs. The inner conductor
runs under the outer shield to the coaxial tip (dotted line).
034306-3 Haemmerli et al. J. Appl. Phys. 118, 034306 (2015)
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E. Inactive resistance
The factor in (3) is the ratio of the active resistance of
piezoresistor, specifically the resistance of the two longitudi-
nal legs, to the total measured resistance. Previously, this
factor was determined by FEA and entered into the code.
Instead, we derived an expression for using an equivalent re-
sistance model
c ¼ 2Rlong
Rloop
Rshunt
Rshunt þ Rloop; (5)
where Rloop ¼ 2Rlong þ Rtrans þ 2Rc. Rlong and Rtrans are the
longitudinal and transverse resistances of the piezoresistor,
Rshunt is the effective resistance due to leakage between the
piezoresistor legs and Rc is the contact resistance from the
metal electrodes to the piezoresistor. The latter two resistan-
ces can be determined with test structures fabricated along-
side the scanning probes. We assume that the resistance of
the metal traces and wire bonds is negligible. If Rshunt is
large, as is the case when the silicon between neighboring
traces is removed, the fraction on the right of 5 approaches
unity.
F. Tip offset
The code previously assumed that the cantilever is
loaded at its free end. However, in the case of scanning
probes, the sharp tip interacts with the sample. This tip is
typically offset from the free end of the cantilever by a dis-
tance we define as loffset. To calculate the cantilever proper-
ties at the tip location, we replaced all occurrences of lc with
le where le ¼ lc � loff set. The design parameters and pre-
dicted performance of our scanning probes resulting from
the optimizer with the enhancements discussed above are
provided in (1). As the devices presented here are intended
for room temperature operation, we specified an ambient
temperature of 300 K. In addition, we restricted power dissi-
pation in the piezoresistor to 2 mW to keep the cantilever
self-heating below � 100 �C,49 selected a measurement
bandwidth of 10 kHz (1 Hz–10 kHz) for reasonable scan
times, and placed an upper bound of 10 N/m on the cantile-
ver spring constant to minimize damage to the sample while
scanning. To facilitate fabrication, we specified a minimum
diffusion time tdiff of 15 min and a range for the diffusion
temperature Tdiff of 1073 K–1173 K. The remaining parame-
ters were determined by the optimizer.
III. FABRICATION
We fabricated the scanning probes using a batch process
that produces >100 devices per wafer. We then opened the
shield and insulator at the apex of each tip, exposing the
inner conductor, using focused ion beam (FIB) milling.
These methods are described in detail below.
A. Batch Fabrication of cantilever probes
We fabricated the scanning probes from 4-in. (100)
double-side polished p-type silicon-on-insulator (SOI)
wafers with device, buried oxide (BOX), and handle layer
thicknesses of 6.5 lm, 0.5 lm, and 400 lm and a nominal re-
sistivity of 1–5 X cm. Our process is illustrated in Figure 4.
We first etched alignment marks in the device layer silicon
with CHF3/O2 plasma. Our next sequence of steps produced
sharp silicon tips. We oxidized the wafers at 1100 �C for
39 min in pyrogenic steam to grow a 5000 A hard mask. We
patterned the oxide into discs with CHF3/O2 plasma. We
etched the unmasked silicon isotropically in SF6 plasma,
undercutting the discs to form conical tip precursors. We
observed the tops of the precursors through the transparent
discs, and stopped the etching when they could no longer be
resolved with an optical microscope. We chose a disc diame-
ter of 4 lm to yield tip heights of �3 lm with this etch rec-
ipe. We stripped the masks in 6:1 buffered oxide etch (BOE)
and oxidized the wafers at 900 �C for 43 min in steam. At
temperatures below 950 �C, the build-up of stress inhibits ox-
idation at regions of high curvature. Thus, the oxidation
sharpened the precursors into final tips.50 Next, we created
the piezoresistors and inner conductors by phosphorus diffu-
sion. We used the 1000 A of oxide grown during the sharpen-
ing process as a hard mask, patterning it in 6:1 BOE. We
avoided dry etching in order to maintain tip sharpness. We
FIG. 4. Batch process used to fabricate our cantilever probes from silicon-
on-insulator wafers: (a) Etch alignment marks, grow thermal oxide, and pat-
tern oxide into discs at the tip locations. Etch device layer Si in SF6 plasma,
undercutting the discs to form tip precursors. Remove discs. (b) Grow ther-
mal oxide to sharpen tips, then pattern oxide and perform phosphorus diffu-
sion to create piezoresistors and inner conductors. (c) Strip oxide mask and
deposit low-temperature oxide to form insulator. Open contacts to diffu-
sions. (d) Sputter and pattern Al into outer shields and bond pads. (e) Define
and (f) release cantilevers with deep reactive ion etching. Clear buried oxide
in CHF3/O2 plasma.
034306-4 Haemmerli et al. J. Appl. Phys. 118, 034306 (2015)
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performed the diffusion at 850 �C for 15 min (parameters cal-
culated by the numerical optimizer) in a POCl3 ambient. We
stripped the phosphosilicate glass deposited during the diffu-
sion and the oxide mask in 6:1 BOE.
To passivate the piezoresistors and create the insulator
for the coaxial tips, we deposited 400 A of low-temperature
oxide (LTO) at 400 �C. This film thickness withstands 10 V
between the inner conductor and outer shield before electri-
cal breakdown but does not round the tip apex significantly.
We used LTO instead of thermal oxide to mitigate dopant
diffusion which would degrade piezoresistor performance.
We etched contact vias to the n-type silicon using 20:1 BOE
and immediately sputtered 400 A of aluminum. We patterned
the metal into the outer shield for the coaxial tips and the
bond pads for the piezoresistors and the inner conductors
with AL-11 wet etchant at 40 �C. Again, we selected the film
thickness to minimize tip rounding.
We defined the cantilevers and die outlines by etching
the device layer silicon in HBr/Cl2 plasma, stopping on
the BOX. To release the cantilevers, we etched through the
handle layer with deep reactive ion etching (DRIE), again
stopping on the BOX, then cleared the BOX in CHF3/O2
plasma. During this process, the frontside of the wafer was
protected with 7 lm of SPR220–7 resist. Finally, we cleaned
the wafers in PRS-1000 at 40 �C. Scanning electron micro-
scope (SEM) images of a completed device are presented in
Figure 5.
B. Opening the coaxial tip
We used FIB milling to obtain small, controlled aper-
tures at the tip apex. We performed the milling with an FEI
Strata 235DB dual-beam FIB/SEM in which the electron
beam (E-beam) and ion-beam (I-beam) are coincident on the
sample and separated by 52�. We aligned the I-beam parallel
to the cantilever and opened the tip from the side using a rec-
tangular milling pattern, as shown in Figure 6. We drew the
pattern such that one edge overlaps the tip apex. We set the
I-beam to mill the rectangle one line at a time, ending at the
overlapping edge, instead of raster scanning the entire pat-
tern for the duration of the etching. The line-by-line
approach is known as a cleaning cross-section and produces
a high-quality surface at the end of the tip. We used a 1 pA
Gaþ beam current to achieve a slow milling rate and to limit
damage to the probe while imaging. We milled until clear
contrast could be observed between the exposed inner con-
ductor and outer shield in E-beam images. With this method,
we could repeatably produce apertures of 30 nm in radius.
SEM images of a tip before and after milling are shown in
Figure 7.
IV. RESULTS AND DISCUSSION
Figure 8 shows a representative topography scan using
our tips. We measured the vertical displacement resolution
of our scanning probes at 293 K and 2 K for the correspond-
ing designs. At room-T, we mounted the probe in a Witec
Alpha300A AFM system and placed the active and compen-
sation piezoresistors in a Wheatstone bridge configuration
FIG. 5. SEM images of a representative device at increasing magnification: (a) entire die, (b) scanning cantilever (front) and matched cantilever for differential
readout (back), (c) scanning cantilever, highlighting the four leg design, and (d) close-up of the unopened tip.
FIG. 6. Focused ion beam (FIB) process used to open the coaxial tips. A
1 pA Gaþ ion beam (I-beam) is used for milling and an electron beam (E-
beam) is used for imaging. We attached the probes to a 45� mount, tilted the
stage 7� to align the I-beam parallel to the cantilevers and opened the tips
from side with a rectangular milling pattern. We configured the I-beam to
scan the pattern line-by-line in the direction of the arrow, producing a high-
quality surface at the tip apices.
034306-5 Haemmerli et al. J. Appl. Phys. 118, 034306 (2015)
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with two matched metal-film resistors. We connected the
output of the bridge to a Texas Instruments INA103 ampli-
fier with 1000� gain. For low-T measurements, we used a
home-built scanning system contained within a top-loading3He cryostat. The readout circuit consisted of a Wheatstone
bridge followed by two Stanford Research Systems SR560
amplifiers in series, with gains of 100� and 500�. The com-
pensation piezoresistor was not used because the temperature
in the cryostat is well controlled. During operation, the three
matched resistors in the bridge are at the same temperature
as the probe; while the amplifiers remain at room-T. In either
systems, the probes were mounted at a 12� angle with respect
to the sample. At both temperatures, we first measured the
voltage noise with the tip out of contact and then measured
the output voltage as the cantilever was deflected with a hard
sample, giving displacement sensitivity. We calculated dis-
placement resolution by dividing the integrated noise in
1 Hz–10 kHz by the sensitivity. We also measured the reso-
nant frequency by vibrating the probes with an external pie-
zoelectric actuator and identifying a sharp peak in the output
voltage as we swept the excitation frequency. Our results are
summarized in Tables I and II, where the predicted values
have been updated to reflect actual probe geometry as meas-
ured by SEM (lc¼ 174.5 lm and tc¼ 2.5 lm).
At room-T, the scanning probe is able to resolve dis-
placements of 2.94 A. The predicted and measured values all
agree within 5% with a resolution variation over measured
devices of 5%. At low-T, the measured displacement sensi-
tivity is �18% lower than predicted. We calculated the pre-
dicted sensitivity using room-T values for the piezoresistive
coefficient pl as we did not have data for n-type diffusions at
2 K. Thus, the discrepancy between the measured and pre-
dicted values can be explained by the variation of pl with
FIG. 7. SEM images of a representa-
tive tip (a) before and (b) after FIB
milling. The opening radius is �30 nm.
The inner conductor and outer shield
are separated by 400 A of oxide. The
scale bars are 500 nm.
TABLE I. Design parameters and predicted AFM performance of scanning
probes. Measurements bandwidth is 1 Hz–10 kHz.
Room-T Low-T
Temperature (K) 293 2
Bridge voltage (V) 2 0.2
Cantilever dimensions lc (lm) 145.5 145.5
wc (lm) 35 35
tc (lm) 3 3
Piezoresistor dimensions lp (lm) 42.5 96
wp (lm) 5 5
Spring constant (N/m) 7.40 6.42
Resonant frequency (kHz) 154 154
Power dissipation (lW) 638 3.52
Displacement sensitivity (kV/m) 3.57 0.298
Johnson noise (nV/ffiffiffiffiffiffiHzp
) 5 4
Hooge noise (nV/ffiffiffiffiffiffiHzp
) at 10 Hz 35 20
Total noise (nV) 581 422
Displacement resolution (A) 1.63 14.2
TABLE II. AFM performance of two fabricated scanning probes. Two sepa-
rate designs are presented optimized for room or low temperature. Boldface
values are measured, others are predicted. Measurements bandwidth is
1 Hz–10 kHz.
Room-T Low-T
Temperature (K) 293 2
Bridge voltage (V) 2 0.2
Spring constant (N/m) 2.96 2.67
Resonant frequency (kHz) 105 114
100 103
Displacement sensitivity (kV/m) 2.00 0.146
2.03 0.178
Total noise (nV) 587 1150
581 422
Displacement
resolution (A)
2.94 78.8
2.86 23.7
FIG. 8. Topographic image of an aluminum test pattern on glass taken with
our probe in contact mode using piezoresistive feedback. The sample was
fabricated by spin-coating polystyrene beads on a glass slide, evaporating Al
and removing the beads in solvent. Aluminum not in contact with the glass
lifted off with the beads, leaving an inverted hexagonal close-packed lattice
with �10 nm step heights.
034306-6 Haemmerli et al. J. Appl. Phys. 118, 034306 (2015)
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temperature. In Figure 9, we plot pl for n-type diffusions
with different surface concentrations ns down to 77 K, taken
from Tufte and Stelzer.45 Because the carrier concentration
varies with depth in diffused piezoresistors, the pl values
presented here are conductivity-weighted averages over the
thickness. We see that below �100 K, pl decreases with tem-
perature. The pl values extracted from our piezoresistors
(ns¼ 1.3� 1020 cm�3, verified by spreading resistance analy-
sis) show good agreement with the existing data. We also
see that the measured noise is 2.7� larger than predicted. At
low-T operating conditions, the two main sources of noise
from the piezoresistor are small (V2J / T and V2
H / V2bridge).
Total noise is determined by the amplifier noise floor. We
verified that the total noise did not change when the inputs of
the first-stage amplifier were disconnected from the bridge
and grounded. Thus, although the scanning probe is only
able to resolve displacements of 78.8 A, the resolution is lim-
ited by the amplifier. Switching from the SR560 (4 nV/ffiffiffiffiffiffiHzp
at 1 kHz) to the INA103 (1 nV/ffiffiffiffiffiffiHzp
at 1 kHz) should allow
displacements of 7.19 A to be resolved. We measured the
electrostatic potential profile produced by our coaxial tips
using a quantum point contact. At 2 K, we first obtained a
plot of conductance Gds through the QPC versus voltage VG
FIG. 9. Variation of piezoresistor coefficient pl with temperature for
n-type diffusions with different surface concentrations ns. The measured
value of pl is a conductivity-weighted average of the piezoresistive coeffi-
cient over the thickness of the diffusion. Below �100 K, pl shows a
decrease with temperature. Data from this work fits well with that of Tufte
and Stelzer.45
FIG. 10. QPC measurements of a
coaxial tip: (a) Topography of the sur-
face gates that defines the QPC. (b)
Two-dimensional maps of Gds col-
lected as the tip are scanned 100 nm
above the sample surface. Inner con-
ductor voltage Vic varies along rows
and outer shield voltage Vsh varies
along columns. The nominal conduct-
ance (Gds¼ 2.56 e2=h, determined
with the tip absent) is shown in white,
while suppression and enhancement
are shown as red and blue, respec-
tively. The scale bar is 2 lm, valid for
all images. When Vic and Vsh have the
same polarity (bottom left and top
right), the tip behaves as if it is
unshielded, resulting in long-range
conductance modulation. The benefit
of the coaxial tip is apparent when the
shield is grounded (middle column). In
this case, the tip only modulates con-
ductance when it is above the QPC and
the long-range effect is almost com-
pletely nulled.
034306-7 Haemmerli et al. J. Appl. Phys. 118, 034306 (2015)
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on the surface gates. To measure Gds, we applied a small AC
voltage (�4 lV) across the ohmic contacts and recorded the
resulting current using a DL 1211 current preamplifier and
an EG&G 124A lock-in amplifier. Then, we selected VG
such that the QPC was between the first and second conduct-
ance plateaus. In this region, dGds=dVG is approximately lin-
ear. When the tip is placed in proximity to the QPC, it acts
as a third gate and the tip potential modulate the channel
conductance. Thus, by recording Gds as the tip is scanned
over the QPC, a spatial map of the tip potential can be
obtained.
In Figure 10, we present 8 lm � 8 lm maps of Gds
acquired at a lift height of 100 nm above the semiconductor
surface as in Figure 11. We set VG¼�0.730 V, yielding a
nominal Gds¼ 2.56 e2=h. We varied the inner conductor
voltage Vic from �2 V to þ2 V in steps of 2 V and the outer
shield voltage Vsh from �1 V to þ1 V in steps of 1 V, pro-
ducing a 3 � 3 array of maps (see linecuts in Figure 12). The
maps show that we can independently address the inner con-
ductor and outer shield and that both are capable of gating
the QPC. Qualitatively, we see that by tuning Vsh, we can
narrow the perturbation created by the inner conductor and
eliminate the slow decay in potential that is characteristic of
an unshielded tip. Consider the bottom row of images where
Vic¼�2 V. When Vsh¼�1 V, Gds is suppressed in the entire
scan window. Even when the tip is several microns from the
QPC, the long range fields from the inner conductor and
shield result in a negative DGds. When Vsh¼ 0 V, the region
of strong suppression from the inner conductor is reduced.
Furthermore, with this biasing, when the tip is not directly
above the QPC, Gds returns to its nominal value. Finally,
when Vsh¼þ1 V, the perturbation produced by the inner
conductor is even narrower. However, the potential on the
shield now enhances Gds.
Two surprising features are apparent in the maps. First,
when Vic and Vsh are 0 V, we intuitively expect that the tip
will have no effect on QPC conductance. However, centered
above the QPC, we see a small region of suppression
surrounded by a halo of enhancement. Poggio et al. also
observed a change in Gds in response to a grounded cantile-
ver when they used a QPC as a displacement sensor.51 The
authors hypothesized that the modulation of conductance
was a result of trapped charge on the cantilever or differen-
ces in work function between the cantilever and sample
materials. Here, we believe the latter explanation is valid. By
tuning the Vic and Vsh, we can null the differences in work
function and minimize the tip effect. For example, the halo
is caused by the work function difference between the Al
FIG. 11. Experimental setup to measure the tip potential profile with a quan-
tum point contact (QPC). The sample is a GaAs/AlGaAs heterostructure
containing a buried two-dimensional electron gas (2DEG). A negative volt-
age VG is applied to the surface gates which depletes the 2DEG below and
forms the QPC. Conductance through the QPC Gds is determined by apply-
ing a small AC excitation Vds across the ohmic contacts and measuring the
resulting current via a lock-in amplifier. The bias on the gates is selected
such that Gds is a linear function of VG, between conductance plateaus. As
the probe is scanned above the QPC, the tip potential couples to the surface
gates and the 2DEG below, modulating Gds. A spatial map of Gds reveals
the shape of the potential profile.
FIG. 12. Linecuts of Gds along the dashed line in Figure 10(a). Top:
Vic¼ 0 V and Vsh ranging from �1 V to þ1 V in steps of 0.2 V. Bottom:
Vsh¼ 0 V and Vic is ranging from �2 V to þ2 V in steps of 2 V. The dashed
line in top plot indicates the nominal value of Gds when the tip is absent.
When Vsh¼þ1 V or �1 V, the shield dominates the effect of the tip and the
probe behaves like a conventional metal-coated AFM probe. In either case,
the potential profile is broad and has a long tail (Gds has yet to return to its
nominal value at x¼�4 lm). When Vic¼Vsh¼ 0 V, the effect of the tip on
Gds results from the work function differences between the materials in the
tip and in the sample. The n-type Si inner conductor suppresses conductance,
while the Al outer shield enhances it. These biasing conditions can be used
to produce a sharp perturbation with no long tail (Gds returns to its nominal
value at x¼�4 lm). If undesirable, the enhancement peaks produced by the
Al shield (arrows) can be compensated with slightly negative Vsh, com-
pletely disappearing at Vsh¼�0.6 V. The bottom plot further displays how
the tip inner conductor can be independently biased to produce the desired
tip effect.
034306-8 Haemmerli et al. J. Appl. Phys. 118, 034306 (2015)
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shield and the AlGaAs/GaAs heterostructure. It is eliminated
when we set Vsh ¼ �0:6 V. The same voltage was reported
by other researchers to null the work function difference
between the Al island of a single-electron transistor scanning
electrometer and an AlGaAs/GaAs heterostructure.52 The
map of Gds tells us that the work function difference between
the n-type Si inner conductor and the heterostructure has the
opposite polarity of that between the Al outer shield and the
heterostructure. In general, for SGM imaging with the
coaxial tip, Vsh should be tuned to null the work function dif-
ference between the outer shield and the sample such that
the perturbation to the sample results strictly from the inner
conductor.
Second, we see that the electrostatic potential profile
from the tip appears elliptical instead of circular, with the
long axis of the ellipse perpendicular to the surface gates.
The QPC does not sample the tip potential at a single point
in space. It responds to the potential in a nearby volume,
which can be represented by a point spread function (PSF).
The PSF sets the spatial resolution of QPC when it is used as
a sensor. The maps of Gds are convolutions of the tip
potential profile with the PSF. The shape of the resulting
convolution is controlled by the broader of these two inputs.
From our modeling, we expect that the FWHM of the poten-
tial profile produced by the coaxial tip is below the spatial re-
solution of the QPC, which is determined primarily by the
channel width (300 nm). Thus, when the QPC is used to mea-
sure this profile, the map of Gds takes the shape of the PSF.
We believe that the PSF of the QPC is elongated in the axis
perpendicular to the surface gates because the gates screen
the tip potential. When the tip is scanned along the length of
the gates, its effect decays more rapidly than when it is
scanned along the QPC channel. In addition, the flow of elec-
trons through the QPC is collimated,1 with the maximum
flow occurring through the center of the channel. The flow
decreases at larger angles from the straight-line trajectory.
Because fewer electrons are backscattered at large angles,
the tip has less of an effect in these locations.
To calculate the FWHM of the convolution, which gives
an upper bound on the FWHM of the tip potential profile, we
considered maps of Gds with Vsh¼�0.6 V. We subtracted
the map with Vic¼ 0 V from the map with Vic¼�2 V to
eliminate the effect of work function differences and meas-
ured the FWHM of the result. Because the convolution is el-
liptical, we measured the FWHM in the x and y axes,
yielding 350 nm and 240 nm, respectively. As expected, the
FWHM values roughly correspond to the QPC channel
width.
In Figure 13, we showed that the FWHM of the pertur-
bation induced by an unshielded tip at hlift¼ 100 nm is
560 nm. Using the QPC, we demonstrated that the FWHM of
the potential profile coaxial tip at the same lift height is
�240 nm. Thus, under these conditions, our coaxial tips
improve the lateral resolution of SGM by 2.3�.
V. CONCLUSIONS
Scanning gate microscopy enables measurement of local
current flow, carrier density, and potential barriers, but the
lateral resolution of the technique has been limited by exist-
ing probes. We have demonstrated a new scanning probe
that integrates a coaxial tip on a piezoresistive cantilever.
By shielding the inner conductor up to the tip apex, the
coaxial tip minimizes stray capacitance and produces tightly
confined potential profiles. The piezoresistor provides self-
sensing capability, allowing cantilever deflection to be meas-
ured electrically, without the traditional optical lever setup
that can disturb photosensitive samples. We designed the
piezoresistive cantilevers with the aid of a numerical opti-
mizer and used finite element analysis to compare the elec-
trostatic potential profiles from unshielded and coaxial tips.
We showed that lift height and shield opening radius have
the largest effect on profile width. We developed a 7-mask
process to fabricate scanning probes with both a piezoresis-
tor and a coaxial tip. We used FIB milling to open the shield
metal at the tip apex. The smallest apertures we produced
were �30 nm in radius. We characterized the AFM perform-
ance of the probes by measuring the total system noise with
the tip out of contact and then recording the readout circuit
output while deflecting the cantilever with a hard sample to
FIG. 13. (a) FWHM of Dn versus lift height for unshielded (•) and coaxial
(�) tips. For both tips, rc¼ 10 nm and for the coaxial tip, ro ¼ 100 nm.
FWHM increases with hlift as there is a larger distance between the tip and
sample over which the electric field can diverge. (b) FWHM of Dn versus
shield opening for a coaxial tip with rc¼ 10 nm and hlift ¼ 100 nm. FWHM
increases with ro as shielding of the inner conductor is less effective.
034306-9 Haemmerli et al. J. Appl. Phys. 118, 034306 (2015)
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calculate displacement sensitivity. The probes can self-sense
tip displacements of 2.9 A at 293 K and 79 A at 2 K in a
10 kHz bandwidth, where the low-T performance is limited
by amplifier noise. Finally, we imaged the potential profiles
produced by the coaxial tips using a quantum point contact.
At a lift height of 100 nm, the coaxial tips produce profiles
that are 2.3� narrower than those of unshielded tips. We
are currently using our self-sensing coaxial-tip probes to
investigate carbon nanotube field effect transistors.
ACKNOWLEDGMENTS
This work was supported by the National Science
Foundation (NSF) under Grant No. ECCS-0708031, NSF
NSEC Center for Probing the Nanoscale (CPN) Grant No.
PHY-0425897, and a CPN fellowship to NH. Fabrication work
was performed in part at the Stanford Nanofabrication Facility
(a member of the National Nanotechnology Infrastructure
Network) supported by the NSF under Grant No. ECS-9731293,
its lab members, and the industrial members of the Stanford
Center for Integrated Systems. The authors would like to thank
Keji Lai and Worasom Kundhikanjana for helpful discussions.
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