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CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Behavioral Simulatorof Analog-to-Digital Converters
Grzegorz ZarebaOlgierd. A. Palusinski
University of Arizona
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Outline
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Introduction and Motivation
Behavioral Simulator of Analog-to-Digital Converters
Basic Building Modules of Analog-to-Digital Converters
Example of sample-and-hold module
Simulation of Analog-to-Digital Converters
Example of 8-bit multistage A/D converter
Example of 8-bit pipelined A/D converter
Summary
Future work
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IntroductionSimulation Levels
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Behavioral level simulationcircuit is described by structural and behavioral blocks
Register level simulationcircuit is defined by combinational and sequential componentssequence of register transfers and arithmetic operations is used to describe
circuit operationSwitch level simulation
CMOS transistors are simplified and seen as gate-controlled switchesGate level simulation
transistors are grouped into logic gatesElectrical level simulation
delivers the greatest amount of details about the circuitrequires solving a system of nonlinear ordinary differential equations
Simulink, Verilog, VHDL
PSpice, MicroCap
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IntroductionAvailable Simulation Tools
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
Two options are available for behavioral simulation of A/D converters:
Commercial Simulation Tools (Matlab/Simulink, HDL-based simulators)
Dedicated simulators (capable to simulate only one particular A/D converter)
Disadvantages of Commercial Simulation Tools:expensive in terms of computer timetranslation of simulation language is neededlimited by simulation language capability
Disadvantages of Dedicated simulators: excessive programming effort needed for implementation of converter modelallows for simulation only one dedicated A/D converter
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IntroductionSimulations with Commercial Simulation Tools
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Simulation languages: VHDL, VHDL-A, Verilog, etc
Graphical languages: Simulink, LabView, VEE, etc
Matlab
Verilog
Simulink
if v_div == v_first/I;t_res(k,1)=v_div;t_res(k,2)=i;k=k+1;
end;
module test;reg [4:0] inreg;wire [1:0] outwire;integer I;
Additional processing
Design description
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IntroductionNew Approach in Behavioral Modeling of A/D Converters
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
Any programming language
A new approach in behavioral modeling of A/D converters is based on utilization of Dynamic Linked Libraries (DLLs) to encapsulate behavior of basic blocks of A/D converters
DLL modules
Design description
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IntroductionNew Approach in Behavioral Modeling of A/D Converters
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
A library of executable functions or data that can be used by a Windows application
What is a DLL module?
Advantages:• Any programming environment can be used to create a DLL module• DLL module can be modified without having to update the simulator• Executable module
Disadvantage?• It seems that creation of a DLL module requires a proficiency in programming
Simulator
*.exe
+
*.dll
BBMs = Executable model of A/D converter
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Behavioral Simulator of A/D ConvertersStructure of the simulator
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
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Behavioral Simulator of A/D ConvertersRepresentation of A/D converters
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Simulation parameters:• Simulation time• Simulation mode
Parameters of BBMs:• input offset voltage• droop rate• slew rate• hysteresis• delay
[BEGIN]name="Vref N"id=27type=Block_VREFN
<out>out[1]=31:in[2]out[1]=23:in[1]out[1]=24:in[1]out[1]=25:in[1]out[1]=26:in[1]
[END]
[BEGIN]name="SubADC"id=23type=Block_SUBADC
<in>in[1]=27:out[1]in[2]=15:out[1]
<out>out[1]=14:in[1]out[2]=14:in[2]
<ctrl>ctrl[1]=3:out[1][END]
Connectivity of BBMs
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Behavioral Simulator of A/D ConvertersBasic Building Modules of A/D converters
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
Input signal applied at the input of A/D converter:• sin• ramp
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Behavioral Simulator of A/D ConvertersBBMs – Example of BBM written in C++
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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More flexible than existingsimulation languages
if( bCtr ){ // Block activated by the control line
if( bSample ){dOutput = dInput;bSample = false;
}else
{dOutput = dInput;bSample = true;
}}
else // Block activated by the output line{
if( bSample )dOutput = dInput;
}
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Basic Building Modules Sample-and-Hold Module
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Approximation with RC circuitTypical Sample-and-Hold circuit
( )ln 0.001acqt
τ = −
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Basic Building Modules Sample-and-Hold Module – Behavioral model
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Sampling mode: charging capacitor CH
( ) ( ) ( ) ( )( )( )ln 0.001
1 acq
tt
CH CH in offV t V t t V t V t e∆
⋅⎛ ⎞⎜ ⎟= − ∆ + + −⎜ ⎟⎝ ⎠
Sampling mode: discharging capacitor CH
( ) ( ) ( )( )( )
( )ln 0.001
acq
tt
CH CH CHinV t V t t V t e V t t
∆
= − ∆ − ⋅ + − ∆
Holding mode: discharging capacitor CH
( ) ( )CH CH rV t V t t D t= − ∆ − ⋅∆
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Basic Building Modules Sample and Hold Module – Simulation results
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Simulation results Test circuit
0
1
2
3
4
5
6
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8
t[us]
Vout
, Vct
rl [V
]
0
1
2
3
4
5
6
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38
t[us]
Vin,
Vout
[V]
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Basic Building Modules Other Modules
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
Mixed-Signal BBMs:Sub-ADC
Sub-DAC
Binary Encoder
Control BBMs:Input Signal
Register
Clock
Clock Delay
Noise Generator
Analog BBMs:Comparator
Sample-and-Hold
Analog Switch
Voltage Reference
Folding circuit
Summation
Subtraction
Digital BBMs:Digital Register
Shift Register
Flash, multi-stage, pipelined, and folding A/D converters
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Basic Building ModulesGraphical representation of BBMs
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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BBM’s (Behavior encapsulated in Dynamic Link Library):
Setting Parameters for Comparator Module:
Gain
Input Offset Voltage
Slew rate
Min Output Amplitude
Max Output Amplitude
Min Hysteresis
Max Hysteresis
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Behavioral Simulator of A/D ConvertersSimulator core
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Behavioral Simulator of A/D ConvertersSimulation Module – Multilevel dynamic list
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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PSpice Schematic
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Behavioral Simulator of A/D ConvertersSimulation Module – Simulation setup
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Simulation Setup:
Simulation Time
Simulation Mode
Input Signal type
Clock Frequency
Output File
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Behavioral Simulator of A/D ConvertersPost-Processing Module
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Post-processing:Localization of code transition pointsCalculation of DNL and INLDetermination of offset and gain errorCalculation of SFDR
Required circuit configuration:
DUT
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Simulation of A/D Converters 8-bit Multistage A/D Converter
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
17 Comparators
17 Analog Switches
1 Reference Voltage
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Simulation of A/D Converters 8-bit Multistage A/D Converter
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
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Simulation of A/D Converters 8-bit Multistage A/D Converter – Simulation results
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
INL Error
-0.2-0.15-0.1
-0.050
0.050.1
0.150.2
0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240
Input codes
INL[
VLSB
]
DNL Error
-0.2-0.15-0.1
-0.050
0.050.1
0.15
0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240
Input codes
DNL[
LSB]
P III, 733 MHz, 256 MB RAM
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Simulation of A/D Converters 8-bit Multistage A/D Converter – Simulink
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Simulink (ideal model) – 6 min. Behavioral Simulator – 10 sec.
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Simulation of A/D Converters Pipelined A/D Converters
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Basic elements:• Sample-and-hold
• Sub-ADC
• Sub-DAC
• Summation
• Amplifier
• Shift register
• Digital correction
( ) [ ]2 1
FSres in k in k
VV V D V V= − ⋅−
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Simulation of A/D Converters 8-bit Pipelined A/D Converter - Schematic
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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2-2-2-2-bit configuration
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Simulation of A/D Converters 8-bit Pipelined A/D Converter – Simulation results
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Imperfections:• Synchronization errors• Input offset voltage
Imperfections:• Stability of Vref• Gain error• Input offset voltage
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Summary
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
New approach in behavioral simulation of A/D Converters
New simulation algorithm based on combination of an event driven scheme and data flow technique
Advanced method for encapsulating BBMs in DLL modules
Significant reduction of circuit preparation and simulation time
Open simulator architecture, which allows adding new BBMs without modification of the simulator core
Simulation package capable to simulate various architectures of A/D converters as well as analog, digital and other mixed-signal circuits
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Future work
CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
COMPUTERENGINEERING
Implementation of load effect
Construction of BBMs designated to support simulation of D/A converters (current source, analog switch, etc.)
Construction of post-processing module for D/A converters
Implementation of an interface to PSpice simulator
Implementation of an interface to Matlab and Simulink
Development of distributed simulation framework using Local Area Networks (LANs) or Universal Serial Bus (USB)
Implementation of BBMs for system level design (RAM, EPROM, etc.)
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CMSL - Circuit Modeling and Simulation LaboratoryELECTRICAL and
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Questions ?