ALGEBRAIC MODELS OF COMPUTATION
By
Nitin Saurabh
The Institute of Mathematical Sciences, Chennai.
A thesis submitted to the
Board of Studies in Mathematical Sciences
In partial ful�llment of the requirements
For the Degree of
Master of Science
of
HOMI BHABHA NATIONAL INSTITUTE
April 2012
CERTIFICATE
Certi�ed that the work contained in the thesis entitled
Algebraic models of Computation, by Nitin Saurabh,
has been carried out under my supervision and that this work
has not been submitted elsewhere for a degree.
Meena Mahajan
Theoretical Computer Science Group
The Institute of Mathematical Sciences, Chennai
ACKNOWLEDGEMENTS
I would like to thank my advisor Prof. Meena Mahajan for her invaluable
guidance and continuous support since my undergraduate days. Her expertise and
ideas helped me comprehend new techniques. Her guidance during the preparation
of this thesis has been invaluable. I also thank her for always being there to discuss
and clarify any matter.
I am extremely grateful to all the faculty members of theory group at IMSc and
CMI for their continuous encouragement and giving me an opportunity to learn
from them. I would like to thank all my friends, at IMSc and CMI, for making my
stay in Chennai a memorable one.
Most of all, I take this opportunity to thank my parents, my uncle and my
brother.
Abstract
Valiant [Val79, Val82] had proposed an analogue of the theory of NP-completeness
in an entirely algebraic framework to study the complexity of polynomial families.
Artihmetic circuits form the most standard model for studying the complexity of
polynomial computations. In a note [Val92], Valiant argued that in order to prove
lower bounds for boolean circuits, obtaining lower bounds for arithmetic circuits
should be a �rst step. One could hope that techniques from well-developed areas of
mathematics may help us to solve fundamental problems in algebraic complexity
theory. Therefore, It has attracted a large amount of research in last two decades.
As a consequence, there has been a lot of progress in the area.
The aim of this thesis is to explore Valiant's approach and to understand dif-
ferent models of algebraic computation. In the process, we survey known results
and new techniques. We discuss simple combinatorial proofs of known results like
VNP = VNPe and study combinatorial characterization of classes VP and VQP.
Further, we explore the parallelization of the class VP and discuss a complete
problem for the same class. We also cover classical proof of completeness for the
permanent family. Later, we study how the complexity of computing certain inte-
gers is related to separating constant-free algebraic classes.
iv
Contents
1 Introduction 1
2 Branching Programs 3
2.1 Algebraic Branching Programs . . . . . . . . . . . . . . . . . . . . . 3
2.2 Reduction and Completeness . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Comparison with other models of computation . . . . . . . . . . . . 9
2.4 Depth reduced circuits . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 VP 18
3.1 The Class VP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2 Parallel Complexity . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3 Complete polynomials . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.4 Classes within VP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.5 Class VQP and Determinant . . . . . . . . . . . . . . . . . . . . . . 32
3.6 Symmetric determinantal representation . . . . . . . . . . . . . . . 35
4 VNP 39
4.1 Class VNP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
4.2 Universality and Completeness of the Permanent . . . . . . . . . . . 44
4.3 Characterizing uniform VNP . . . . . . . . . . . . . . . . . . . . . . 50
5 Cost of computing Integers 57
5.1 Basic de�nitions and simple bounds . . . . . . . . . . . . . . . . . . 57
5.2 Connection to Valiant's Theory . . . . . . . . . . . . . . . . . . . . 60
5.3 Relaxing the hypothesis VP0 = VNP0 . . . . . . . . . . . . . . . . . 64
6 Conclusion 67
i
List of Figures
2.1 An algebraic branching program computing : 2x1x2x3 + x21x
23 + x1 . 3
2.2 A circuit and a formula computing 4(x1 + x2) . . . . . . . . . . . . 10
2.3 Construction of an algebraic branching program from a formula . . 11
2.4 Algebraic branching program to skew circuit . . . . . . . . . . . . . 13
2.5 Weakly skew circuit to algebraic branching program . . . . . . . . . 15
4.1 Graph K; i�-coupling of edges c = (u, v) and c′ = (u′, v′) . . . . . . 46
4.2 The Rosette R(4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
ii
1Introduction
Valiant introduced algebraic complexity theory to study the complexity of poly-
nomial families. Arithmetic circuits provide a natural model of computation that
captures the complexity of computing polynomials using algebraic operations. The
most fundamental problems in algebraic complexity are related to the complexity
of arithmetic circuits. In general arithmetic circuits are quite powerful, and to this
day, we do not know explicit examples of polynomials requiring super-polynomial
circuit size. Apart from arithmetic circuits, there is another model of arithmetic
computation called algebraic branching programs. The expressive power of these
models has been a puzzling question for more than �ve decades. Nevertheless,
advances have been made on understanding restricted models of arithmetic com-
putation.
The goal of this thesis is to understand di�erent models of algebraic computa-
tion. This thesis is structured in the following ways. There are four main chapters.
• In Chapter 2, we introduce a simple model of computation called algebraic
branching programs. We show the completeness of the determinant fam-
ily. Then we introduce arithmetic circuits and compare their computational
power with algebraic branching programs. Finally, we give a depth e�cient
construction of arithmetic circuits from algebraic branching programs.
• In Chapter 3, we study the computational power of restricted circuits ob-
tained by restricting the size of the circuit. Then we discuss an e�cient
parallel algorithm for the Valiant's class VP. Again we see completeness of
the determinant for a di�erent class, but under di�erent notion of reduc-
1
Chapter 1. Introduction
tion. Finally, we end the chapter with a discussion on symmetrizing the
determinant polynomial.
• In Chapter 4, we begin our discussion by de�ning the class VNP and then
going on to develop a proof of the completeness of the permanent. At the end
we take a slight detour to characterize certain uniform versions of Valiant's
algebraic classes.
• In Chapter 5, we investigate the cost of computing integers in the arithmetic
circuit model. We present some simple lower and upper bounds and dis-
cuss some examples. We also describe the relationship between the cost of
computing certain integer sequences and Valiant's classes.
We conclude the thesis and discuss a few open problems in Chapter 6.
2
2Branching Programs
2.1 Algebraic Branching Programs
In this section we will de�ne a simple model of algebraic computation, called
algebraic branching programs.
De�nition 2.1. An algebraic branching program (ABP) G = (V,E) is a directed
acyclic graph with two distinguished vertices, a source s and a sink t. The source
s has in-degree 0 and the sink t has out-degree 0. There is a weight function
w : E → F ∪ {x1, x2, . . .} de�ned on edges, where F is a �eld or ring.
The weight of a path from s to t is the product of the weights of the edges
appearing in the path. The weight of (s, t) in G is the sum of the weights of all
paths from s to t. The polynomial computed by an algebraic branching program
G is the weight of (s, t) in G (Figure 2.1). The size of an algebraic branching
program is the number of vertices in it.
De�nition 2.2. A sequence of polynomials (fn) belongs to the class VBP if and
x2
x31
x3
x1 t
s
x1
x2
Figure 2.1: An algebraic branching program computing : 2x1x2x3 + x21x
23 + x1
3
Chapter 2. Branching Programs
only if there exist a sequence of algebraic branching programs (Gn) of polynomially
bounded size such that Gn computes fn.
It has been known for long that the determinant family DETn belongs to
the class VBP. We will present here an elegant combinatorial construction from
[MV97].
Let A be an n × n matrix. Let GA denote the weighted directed graph rep-
resented by A. Let the vertex set of GA be {1, 2, . . . , n}. The edges in GA are
weighted, that is, an edge (i, j) has weight ai,j. Then we know,
det(A) =∑
C is a cycle cover of GA
sign(C)w(C)
where, w(C) denotes the weight of a cycle cover C. But it seems di�cult to
get an algebraic branching program to e�ciently compute determinant from this
de�nition. The ingenuity of the proof lies in extending the summation to a larger
set such that the overall contribution from the new terms is zero. To achieve this,
we generalize the notion of cycle covers to clow sequences.
A clow is an ordered sequence of vertices C = 〈v1, v2, . . . , vl〉 such that (vl, v1) is
an edge in the graph and also, any (vi, vi+1) is an edge in the graph. We will require
that v1 is the least numbered vertex in the clow and occurs only once in the clow. v1
is called the head of the clow. The weight of a clow C, w(C), is the product of the
weights of the edges in C with multiplicity, that is, w(C) = (∏l−1
i=1 avi,vi+1) · avl,v1 .
A clow sequence is a sequence of clowsW = 〈C1, C2, . . . , Ck〉 such that head(C1) <
head(C2) < · · · < head(Ck) and the total number of edges, counted with multi-
plicity, adds to exactly n. The sign of a clow sequence is de�ned to be (−1)n+k,
where n is the number of vertices and k is the number of clows in the sequence.
The weight of a clow sequence w(W) =∏k
i=1w(Ci).
Theorem 2.3 ([MV97]). Let A be a (n× n)-matrix. Then,
det(A) =∑
W is a clow sequence in GA
sign(W)w(W)
Proof. As alluded before the proof is by showing that the total contribution of the
clow sequences that are not cycle covers is zero.
4
Chapter 2. Branching Programs
An involution φ on a set is a bijection with the property that φ2 is the identity
map on the set. The idea of the proof is to de�ne an involution on the set of clow
sequence, such that a cycle cover is mapped to itself and otherwise a clow sequence
in mapped to another clow sequence of same weight but di�erent sign.
Let W = 〈C1, C2, . . . , Ck〉 be a clow sequence. The involution is de�ned as
follows: Choose the smallest i such that 〈Ci+1, . . . , Ck〉 is a set of disjoint simple
cycles. If i = 0 then the involution maps W to itself. Otherwise, traverse Ci
starting from the head until one of the two things happen:
1. we hit a vertex that touches one of 〈Ci+1, . . . , Ck〉
2. we hit a vertex that completes a simple cycle within Ci
Let us call this vertex v. Because of the choice of i, such a vertex must exist and
will satisfy exactly one of the above conditions.
Case 1: Suppose v touches Cj, i+ 1 ≤ j ≤ k. Consider a clow C ′i, obtained from
Ci by inserting the cycle Cj into Ci at the �rst occurrence of v. The involution
maps W to W ′, where,
W ′ = 〈C1, . . . , Ci−1, C′i, Ci+1, . . . , Cj−1, Cj+1, . . . , Ck〉
Clearly W ′ is a clow sequence and sign(W ′) = −sign(W).
Case 2: Suppose v completes a simple cycle C within Ci. Note that cycle C must
be disjoint from all the later cycles. Modify the sequence W by deleting C from
Ci and introducing C as a new clow in an appropriate position, depending on the
minimum labelled vertex in C, which is made the head of C. Call this new sequence
W ′. It is easy to see thatW ′ is indeed a clow sequence and sign(W ′) = −sign(W).
So, the involution maps W to W ′.It is clear that the given map is an involution and the signs of two clow se-
quence are di�erent, whereas the weights are unchanged. Let C` be the set of clow
5
Chapter 2. Branching Programs
sequences in GA. Let C be the set of cycle covers of GA. Hence, we have∑W∈C`
sign(W)w(W) =∑W∈C
sign(W)w(W) +∑W∈C`\C
sign(W)w(W)
=∑W∈C
sign(W)w(W)
= det(A)
Given an n × n matrix A, let us construct an algebraic branching program
computing det(A). Let HA be a weighted directed acyclic graph. The vertex set
of HA is {s, t+, t−, t} ∪ {[p, h, v, i] | p ∈ {0, 1}, h ∈ {1, . . . , n}, v ∈ {1, . . . , n}, i ∈{0, . . . , n− 1}}. The edge connections in HA are made as follows:
1. Add edges (s, [n mod 2, h, h, 0]) for h ∈ {1, . . . , n} with weight 1.
2. If v > h and i+ 1 < n, add edges ([p, h, u, i], [p, h, v, i+ 1]) with weight au,v.
3. If h′ > h and i+1 < n, add edges ([p, h, v, i], [p, h′, h′, i+1]) with weight av,h.
4. Add edges ([1, h, v, n− 1], t+) with weight av,h.
5. Add edges ([0, h, v, n− 1], t−) with weight av,h.
6. Add edges (t+, t) and (t−, t) with weights 1 and −1, respectively.
The idea for the construction is that s-t paths trace out clow sequences. If a
path from s reaches a vertex of the form [p, h, v, i], this indicates that in the clow
sequence being constructed along this path, p is the parity of the quantity �n +
the number of clows already constructed,� h is the head of the clow currently being
constructed, v is the vertex that the current clow has reached, and i edges have
been traversed so far.
Theorem 2.4. Let A be an n×n matrix and HA be the graph constructed as above.
Then,
det(A) = weight of (s, t) in HA
6
Chapter 2. Branching Programs
Proof. It su�ces to prove,
det(A) =∑
ρ is a s t+ path
w(ρ)−∑
η is a s t− path
w(η) (2.1)
Theorem 2.3 implies that to prove Equation 2.1, it is su�cient to establish a one-
to-one correspondence between s t+ and clow sequences of positive sign such
that the weights are preserved, and similarly between s t− and clow sequence
of negative sign, also preserving weights.
Let W = 〈C1, . . . , Ck〉 be a clow sequence of positive sign. Let hi be the
head of Ci, and let ni be the number of edges in clows C1, . . . , Ci−1. Let us
construct a s t+ path corresponding to W in HA. Clearly, the �rst edge is
(s, [n mod 2, h1, h1, 0]). Suppose that path has reached [p, hi, hi, ni]. Let the clow
Ci be 〈hi, v1, . . . , vl〉. Starting at [p, hi, hi, ni], we can follow a path through vertices
[p, hi, v1, ni+1], [p, hi, v2, ni+2], . . . , [p, hi, vl, ni+l], [p, hi+1, hi+1, ni+1 = (ni+l+1)].
At the last clow, starting from [1, hk, hk, nk], as before we traverses the edges in
clow Ck and �nally make a transition to t+. The way edge weights are given, it is
clear that the weight of this path is equal to the weight of the clow sequence W .
Conversely, let ρ be an s t+ path in HA. In the sequence of vertices visited
along this path, the second component of the vertex labels is monotonically non-
decreasing and takes, say, k distinct values h1, . . . , hk. Consider the maximal
segment of the path with second component hi. The third component along this
segment gives a clow with head hi and then a new clow with larger head starts.
The tuple corresponding to each vertex easily allows us to reconstruct the clow
sequence. Hence ρ corresponds to a clow sequence with positive sign in GA.
Similarly, one can show the correspondence between paths from s to t− and
clow sequences with negative sign in GA.
Theorem 2.5. (DETn) ∈ VBP.
Proof. Observe that the directed acyclic graph HA constructed in Theorem 2.4 has
O(n3) vertices.
7
Chapter 2. Branching Programs
2.2 Reduction and Completeness
Now to compare polynomials we need a notion of reduction between families of
polynomials that preserves �complexity�. Valiant [Val79] suggested a very simple
idea of change of variables as a reduction.
De�nition 2.6. A polynomial f in F[x1, x2, . . . , xn] is a projection of a polynomial
g in F[y1, y2, . . . , ym], denoted f ≤ g, if and only if
f(x1, . . . , xn) = g(a1, . . . , am)
where ai ∈ F ∪ {x1, x2, . . . , xn}.
De�nition 2.7. A sequence of polynomial (fn) is a p-projection of a sequence
(gm), symbolically (fn) ≤p (gm), if and only if there exists a polynomially bounded
function t(n) such that fn ≤ gt(n) for all n.
From the de�nitions it is clear that the class VBP is closed under p-projection.
De�nition 2.8. A sequence of polynomial f = (fn) is said to be VBP-complete if
and only if f ∈ VBP and for all g ∈ VBP, g ≤p f .
It is reasonable to ask whether VBP-complete problems exist. The following
lemma shows that they do exist; in fact, the DET family is VBP-complete.
Lemma 2.9. If f is a polynomial computed by an algebraic branching program of
size n, then f is a projection of DETn−1.
Proof. Let G be an algebraic branching program of size n computing f . Let G′
be a directed graph obtained from G by identifying s and t and adding a loop of
weight 1 to each vertex di�erent from s ≡ t. Since G is acyclic, there exists a one
to one correspondence between cycle covers of G′ and s-t paths of G. Also note
that the weight of a cycle cover in G′ is equal to weight of the corresponding s-t
path in G and |G′| = n − 1. For a cycle cover C, let pC denote the s-t path in G
corresponding to C and w(C) denote its weight. Let A′ be the weighted adjacency
matrix of G′. Let us obtain a matrix A′′ from A′ as follows: a′′i,i = a′i,i for all i and
a′′i,j = −a′i,j if i 6= j.
8
Chapter 2. Branching Programs
det(A′′) =∑
C is a cycle cover of G′sign(C)(−1)|pC |w(C)
=∑
C is a cycle cover of G′(−1)|pC |+1(−1)|pC |w(C)
= (−1)∑
C is a cycle cover of G′w(C)
= −f
Let A be a (n − 1) × (n − 1) matrix, such that a1,j = −a′′1,j for all j, and
ai,j = a′′i,j for all i 6= 1. Now, it is easy to see that det(A) = f .
From Theorem 2.5 and Lemma 2.9 we get the following theorem.
Theorem 2.10. Over any �eld, the determinant family DETn is VBP-complete
with respect to p-projection.
2.3 Comparison with other models of computation
In this section we will de�ne arithmetic circuits and compare their computational
power with algebraic branching programs.
De�nition 2.11. An arithmetic circuit is a �nite acyclic directed graph with ver-
tices of in-degree 0 or 2 and exactly one vertex of out-degree 0. Vertices of in-degree
0 are called input gates and labelled by a constant or a variable. The other vertices,
of in-degree 2, are labelled by × or + and called computation gates. The vertex of
out-degree 0 is called the output gate.
Note that each gate computes a polynomial. The polynomial computed by a
circuit is the polynomial computed by the output gate of a circuit.
De�nition 2.12. The size of a circuit is the number of gates in the circuit. The
depth is maximum length of a directed path from an input gate to the output gate.
Alternately the in-degree and out-degree of a gate is referred as fan-in and
fan-out, respectively. Let us now put some restrictions on the structure of circuits.
9
Chapter 2. Branching Programs
3
×
+
x1 x2 3
+
×
+
x1 x2
+
x1 x2
+
Circuit Formula
Figure 2.2: A circuit and a formula computing 4(x1 + x2)
De�nition 2.13. A circuit C is called a formula if every gate in C has fan-out at
most 1.
Hence, the underlying graph of a formula is a tree. Note that the crucial di�er-
ence between circuits and formulas is that in the circuit model a result computed
at a gate can be used many times with no need to recompute it again and again,
whereas in the formula a result computed at a gate can be used at most once.
Lemma 2.14. For any formula F of size n, there exist an algebraic branching
program G of size at most n+ 1, such that G computes the same polynomial as F .
Moreover, G has at most n edges of weight di�erent from 1.
Proof. The proof is by induction on the size of the formula F .
Base Case: n = 1. Let α be the gate, with label u, in the formula of size 1.
Construct a directed acyclic graph G with two vertices s and t and an edge (s, t)
of weight u. Clearly, G has size 2 and computes the same polynomial as F . Also,
G has at most 1 edge of weight di�erent from 1.
Suppose the lemma holds for formulas of size strictly less than n.
Induction Step: Let F be a formula of size n and α be the output gate of
F . let β and γ be the two children of α with sub-formula Fβ and Fγ respectively.
Let Fβ be of size nβ and Fγ be of size nγ. We have n = nβ + nγ + 1. Applying
induction hypothesis separately to Fβ and Fγ, we obtain two algebraic branching
programs Gβ and Gγ, of size nβ + 1 and nγ + 1, respectively. For i ∈ {β, γ}, there
10
Chapter 2. Branching Programs
s tβ = sγ t
‖sβ
‖tγ
s
‖sβ
‖sγ
‖tγ
‖tβ
t
Gβ Gγ
Gγ
Gβ
Case 1
Case 2
Figure 2.3: Construction of an algebraic branching program from a formula
exist vertices si and ti in Gi such that the weight of (si, ti) in Gi is the polynomial
computed by Fi.
Case 1: α is a +-gate, that is F = Fβ+Fγ. We obtain a graph G by taking the
disjoint union of Gβ and Gγ and, the source s is obtained by identifying sβ with
sγ and the sink t is obtained by identifying tβ with tγ. Clearly, weight of (s, t) in
G = weight of (sβ, tβ) in Gβ + weight of (sγ, tγ) in Gγ, and hence G computes the
same polynomial as F . Also, size of G is at most (nβ + 1 + nγ + 1− 2) = (n− 1).
Furthermore, Gβ has at most nβ edges of weight di�erent from 1 and Gγ has at
most nγ edges of weight di�erent from 1, then G has at most (nβ + nγ) = (n− 1)
edges of weight di�erent from 1.
Case 2: α is a ×-gate, that is F = Fβ · Fγ. Now we obtain G by taking the
disjoint union of Gβ and Gγ, and identifying the vertices tβ and sγ. De�ne s = sβ
and t = tγ. It is easy to verify now that G satis�es all the required properties.
Therefore, for an arithmetic circuit C we can get an algebraic branching pro-
gram G, computing the same polynomial as C, by �rst converting the circuit to a
formula and then using Lemma 2.14 to get an algebraic branching program sim-
ulating the circuit C. But the obtained algebraic branching program could be of
exponential size, as the conversion from circuits to formulas may blow up the size
exponentially.
11
Chapter 2. Branching Programs
De�nition 2.15. A circuit C is called skew if all multiplication gates in C have
at least one incoming arrow from an input gate.
Weakly skew circuits are de�ned by relaxing the condition on multiplication
gate.
De�nition 2.16. A circuit C is called weakly skew if for any multiplication gate
α, receiving arrows from gates β and γ, one of the two sub-circuits Cβ or Cγ is
connected to the rest of the circuit only by the arrow going to α.
It is obvious that a skew circuit is also a weakly skew circuit. From the def-
inition, it seems that may be weakly skew circuits are more powerful than skew
circuits. But it is known that at polynomial level they de�ne the same class. In
fact, we will show that the class de�ned by polynomial sized skew circuits, the class
de�ned by polynomial sized weakly skew circuits and the class VBP are the same.
To prove the claim, it su�ces to show the following containments VBP ⊆ {poly-sized skew circuits} ⊆ {poly-sized weakly skew circuits} ⊆ VBP. The second
containment follows from the de�nition.
Lemma 2.17. Let G = (V,E) be an algebraic branching program, such that |V | =n and |E| = m. There exists a skew circuit C of size at most 2n + 3m, such that
C computes the same polynomial as G.
Proof. G is a directed acyclic graph computing f . Without loss of generality
assume s is the only source (can be achieved by deleting all nodes not reachable
from s). We will construct a skew circuit computing f as follows: Take an identical
copy of G, say G′. Label every vertex in G′, except s′, as a +-gate. Label s′ by
1. If there exist a +-gate of fan-in 1 then add an input gate label 0 to this gate.
Now, subdivide every edge in G′. Label the subdividing vertex as ×-gate and keep
the direction of edges as before. Add an input gate to the subdividing vertex and
label it by the label of the subdivided edge. The gate t′ is the output gate of the
circuit constructed, say C ′ (see Figure 2.4). By construction, the circuit C ′ is skew
and its size is at most 2(n+m). It is easy to see that for every vertex v in G, the
corresponding +-gate in the C ′ computes the same polynomial as the weight of
(s, v) in G. Since the output gate corresponds to the vertex t in G, the circuit C ′
computes the same polynomial as G. But there is one problem with C ′, it might
12
Chapter 2. Branching Programs
× ×
× ×
×
×
×
×
x1
x2
0
0
x4
x8
x7
×c
0x3
x5
x6
×
x9
1
+ +
+
+
+
+
+
+
bounded fan-in
t
s
x1
x8
x6
c
x3
x5
x7x9
x4
x2
(ABP)(Skew Circuit)
Figure 2.4: Algebraic branching program to skew circuit
have unbounded fan-in +-gates. We convert C ′ to a circuit C with bounded fan-in
by adding at most m new +-gates. Now circuit C has bounded fan-in, size at most
2n+ 3m and computes the same polynomial as G.
Lemma 2.18 ([MP08]). Let C be a weakly skew circuit of size n. Then there exists
an algebraic branching program G of size n + 1, such that G computes the same
polynomial as C.
Proof. The proof is by induction on the size of the circuit. For the induction to go
through we will need a stronger statement concerning multiple output weakly skew
circuits. A gate in a weakly skew circuit is called reusable if it does not belong to
the independent sub-circuit of a multiplication gate. Note that an output gate is
always reusable.
We will show that for any weakly skew circuit C of size n with multiple outputs,
there exists an algebraic branching program G of size n + 1 with a source s,
satisfying the following property:
for any reusable gate α in C there exists a vertex tα in G such that the
weight of (s, tα) in G is the polynomial computed by α in C
13
Chapter 2. Branching Programs
Base Case: n = 1. Let α be the gate, with label u, in the circuit of size 1.
Construct a directed acyclic graph G with two vertices s and tα and an edge (s, tα)
of weight u. Since α is the only reusable gate, clearly G is the required algebraic
branching program satisfying the above properties.
Suppose the above claim holds for circuits of size strictly less than n.
Induction Step: Let C be a weakly skew circuit of size n and α be one of its
output gates.
If α is an input gate labelled u, let C ′ be the circuit C with α removed. Applying
the induction hypothesis to C ′ we obtain an algebraic branching program G′ of size
n. We add a new vertex tα and an edge (s, tα) with weight u to G′. Let us call this
new graph G. A reusable gate δ 6= α in C remains reusable in C ′. For such gates,
by induction hypothesis, there exists a vertex tδ in G′ satisfying the above claim
and for all t in G′, w(s, t) in G′ is equal to w(s, t) in G. Hence, G is the required
algebraic branching program.
If α is a + gate in C, Let C ′ be the circuit C with α removed. Applying
induction hypothesis to C ′ we obtain an algebraic branching program G′ of size n.
Now there are two cases to consider.
Case 1: If α receives both its incoming edges from the same gate β, then
there exists a vertex tβ in G′ such that the weight of (s, tβ) in G′ is the polynomial
computed by the gate β in C ′. We add a new vertex tα and an edge (tβ, tα) with
weight 2 to G′ (see Figure 2.5). Call this new graph G.
Case 2: If α receives incoming edges from two distinct gates β and γ, then
there exists vertices tβ and tγ in G′ such that the weights of (s, tβ) and (s, tγ) are
the polynomials computed by β and γ, respectively in C. We add a new vertex tα
and edges (tβ, tα) and (tγ, tα) with weight 1 to G′ (see Figure 2.5). Call this new
graph G.
In both cases G is of size at most n+ 1 and satis�es the required properties.
If α is a × gate, then α receives incoming edges from two distinct gates β and
γ. Let Cγ be the sub-circuit connected to the rest of the circuit only by the edge
going to α. Let C ′ be the circuit C with α removed. Hence C ′ is composed of
two disjoint circuits Cβ and Cγ of size nβ and nγ, respectively. Applying induction
hypothesis separately to Cβ and Cγ we get two algebraic branching programs Gβ
and Gγ, of size nβ + 1 and nγ + 1, respectively. There exists a vertex tβ in Gβ such
that the weight of (s, tβ) in Gβ is the polynomial computed by β in C. Also, there
14
Chapter 2. Branching Programs
s tβ s
tβ
tγ
tαtα
s tβ = sγ tα = tγ
G′
2G′
1
1
(Addition gate)
(Multiplication gate)
Gβ Gγ
Figure 2.5: Weakly skew circuit to algebraic branching program
exists a vertex tγ in Gγ such that the weight of (sγ, tγ) in Gγ is the polynomial
computed by γ in C. We obtain a graph G by identifying tβ and sγ and relabel
tγ to tα. The source in G is the node s of Gβ (see Figure 2.5). The weight of
(s, tα) in G is clearly the polynomial computed by α in C. The size of G is at most
nβ + 1 + nγ + 1− 1 = n+ 1. Note that we have changed the value of the weights
(s, v) for every vertex v in Gγ, but since these vertices are not reusable in C, G
satis�es the required properties.
Using Lemma 2.17 and Lemma 2.18, we get the following equivalence.
Theorem 2.19. VBP = families of polynomials computed by poly-sized skew cir-
cuits = families of polynomials having poly-sized weakly skew circuits.
2.4 Depth reduced circuits
In the last section, we saw a simulation of an algebraic branching program by skew
circuits. But these constructions have one drawback, the depth of the circuit could
be as large as O(n) where n is the size of the algebraic branching program. In this
section we will address the concern raised, by giving depth e�cient constructions.
The cost we pay is that the circuits may not be skew or even weakly skew circuits.
De�nition 2.20. A layered algebraic branching program is a directed acyclic graph
in which the vertex set is partitioned into layers V0, V1, . . . , V`, and the edge set E
is contained in ∪`i=1Vi−1 × Vi. As before, there is a weight function w : E →F ∪ {x1, x2, . . .} de�ned on edges and two distinguished vertices s ∈ V0 and t ∈ V`.
15
Chapter 2. Branching Programs
Because of the next lemma we can assume that a given algebraic branching
program is layered.
Lemma 2.21. For every algebraic branching program G = (V,E) with |V | = n
and |E| = m, there exists an equivalent layered branching program G′ = (V ′, E ′),
computing the same polynomial as G, such that |V ′| = O(n2), |E ′| = O(nm) and
number of layers is at most n.
Proof. We will assume that G has a single source s and a single sink t. The proof
is essentially the same for multiple source-sink algebraic branching program. The
set of vertices of G′ consist of n distinct copies of V and a special vertex t′. Let
V ′ = ∪n−1i=0 Vi ∪ t′, where Vi = {ui | u ∈ V } and t′ is a vertex disjoint from every
other vertex. Edges in G′ are added as follows: If (u, v) ∈ E then (ui, vi+1) ∈ E ′,for all i, 0 ≤ i ≤ (n − 2). For an edge (ui, vi+1) ∈ E ′, its weight is equal to the
weight of the edge (u, v) ∈ E. Finally add edges (ti, ti+1), for all i, and (tn−1, t′)
of weight 1 to G′. Let s0 be the source in G′ and relabel it to s′. Clearly the
weight of (s′, ti) in G′ is equal to the sum of weight of (s, t) paths, in G, of length i.
Therefore, we have weight of (s, t) in G is equal to the weight of (s′, t′) in G′.
Without loss of generality, now onwards we will assume that the branching
programs are always layered.
Theorem 2.22. Let G be an algebraic branching program with ` layers and n
vertices. There exists a circuit C with × gates having fan-in 2 and unbounded
fan-in + gates, of depth O(log `) and size polynomial in n, such that C computes
the same polynomial as G.
Proof. The proof is essentially Savitch's construction. We sketch a proof here for
completeness. We will prove the above theorem for algebraic branching programs
with multiple source and sink. Let G′ be the algebraic branching program (possibly
with multiple sink and source) with vertex set V ′ = ∪d`2e
i=1Vi obtained from G by
restricting edges to V ′. Let G′′ be the algebraic branching program (possibly
multiple sink and source) with vertex set V ′′ = ∪`i=d `
2eVi obtained from G by
restricting edges to V ′′. Suppose inductively, we have circuit C ′ (possibly with
multiple outputs) with an output gate for every source-sink pair in G′. Similarly,
we have C ′′ for G′′. Now we will show how to obtain a circuit C for G from C ′ and
16
Chapter 2. Branching Programs
C ′′. Let wG(s, t) denote the weight of (s, t) in G. Then we have,
wG(s, t) =∑
u∈Vd `2 e
wG′(s, u)× wG′′(u, t)
Hence, for every source-sink pair (s, t) in G we require at most n distinct multi-
plication gates and an addition gate to sum these multiplication gates. The above
equation clearly shows that this addition gate computes the same polynomial as
the weight of (s, t) in G and also suggests how to make connections between C ′
and C ′′ to get C. There are at most n2 distinct source-sink pair in G. Thus, we
have increased the depth by an additive factor of at most 2, and size by an additive
factor of at most O(n3). Therefore the depth of the circuit C is O(log `) and its size
is polynomial. Now it is easy to verify that C satis�es the required properties.
As a corollary to Theorem 2.22, we have the following.
Corollary 2.23. Every algebraic branching program with ` layers and n vertices
can be simulated by a circuit, with bounded fan-in gates, of depth (O(log ` log n))
and size polynomial in n.
17
3VP
3.1 The Class VP
Valiant proposed algebraic complexity theory to study the complexity of evaluating
multivariate polynomials. The basic computation model is the arithmetic circuit,
which make these classes easy to de�ne and amenable to combinatorial techniques.
Let us recall some de�nitions from the last chapter.
De�nition 3.1. An arithmetic circuit is a �nite acyclic directed graph with vertices
of in-degree 0 or 2 and exactly one vertex of out-degree 0. Vertices of in-degree 0
are called input gates and labelled by a constant or a variable. The other vertices,
of in-degree 2, are labelled by × or + and called computation gates. The vertex of
out-degree 0 is called the output gate.
Note that each gate computes a polynomial. The polynomial computed by a
circuit is the polynomial computed by the output gate of a circuit.
De�nition 3.2. The size of a circuit is the number of gates in the circuit. The
depth is maximum length of a directed path from an input gate to the output gate.
The degree of a gate is de�ned recursively: any input (variables or constant) is of
degree 1, the degree of a +-gate is the maximum of the incoming degrees, and the
degree of a ×-gate is the sum of the incoming degrees. The degree of a circuit is
the degree of its output gate.
Note that the degree of a circuit upper bounds the degree of the polynomial
computed by the circuit. Observe that we have de�ned degree of a constant to be
18
Chapter 3. VP
1 instead of 0. However, this does not in�ate the over all degree too much as the
following theorem shows. Also this de�nition is much more convenient in some of
the later constructions.
Theorem 3.3. Let C be a circuit of size s. De�ne degree in C inductively as before
but allowing constants to have degree 0. Then there exists a circuit C ′ satisfying
following properties:
1. C ′ has size at most s.
2. If degree in C ′ is de�ned assuming constants have degree 1, then for each gate
g of degree dg in C, there exist a gate g′ in C ′ of degree at most max{sdg, 1}and computing the same polynomial as g.
Proof. The proof is by induction on the size of the circuit. We will assume that
no gate in the circuit has both its inputs labelled by constants.
Base case: s = 1. Let C be the circuit of size 1. De�ne C ′ to be C exactly.
Clearly, C ′ is of size at most s and degree at most 1.
Suppose that the theorem holds for circuits of size strictly less than s.
Induction Step: Let C be a circuit of size s and α be an output gate in C.
Let Cα be the circuit obtained from C by deleting α from it.
Case 1: α is an input gate with label u. Applying induction hypothesis to Cα
we get a circuit C ′α satisfying the properties required. Add an input gate α′ with
label u to C ′α to obtain the circuit C ′. Clearly C ′ is of size at most s. It is easy to
verify that C ′ satis�es the second property too.
If α is not an input gate, then let β and γ be the children of α.
Case 2: α is a +-gate. Let α be of degree at most d. Applying induction
hypothesis on Cα, we have a circuit C′α such that it has nodes β′ and α′ computing
the same polynomial as β and α respectively. Add a +-gate α′ to C ′α and edges
(β′, α′) and (γ′, α′) to obtain C ′ from C ′α. Clearly C′ is equivalent to C. The degree
of α′ is max{(s−1)d, 1} and the degree of a gate δ′ distinct from α′ is by induction
hypothesis at most max{(s− 1)dδ, 1}, where dδ is the degree of δ in C. Hence C ′
is the required circuit.
Case 3: α is a ×-gate. Applying induction hypothesis on Cα, we have a
circuit C ′α such that it has nodes β′ and α′ computing the same polynomial as β
and α respectively. Add a ×-gate α′ to C ′α and edges (β′, α′) and (γ′, α′) to obtain
19
Chapter 3. VP
C ′ from C ′α. Clearly C ′ is equivalent to C. By induction hypothesis, the degree
of β′ is at most max{(s − 1)dβ, 1}, where dβ is the degree of β in C. Similarly
the degree of γ′ is at most max{(s − 1)dγ, 1}. Thus, the degree of α′ is at most
max{(s− 1)dβ, 1}+ max{(s− 1)dγ, 1} ≤ max{sdα, 1}. For a gate distinct from α′,
say δ′, by induction hypothesis its degree is at most max{(s− 1)dδ, 1}.
Now onwards we may use the two de�nitions of degree interchangeably. But
the choice of de�nitions will be clear from the context.
De�nition 3.4. A sequence of polynomials (fn) belongs to VP if there exists a
sequence of circuits (Cn) of polynomially bounded (in n) size and degree such that
Cn computes fn.
The determinant family DETn is an interesting example for the class VP.
Theorem 3.5. (DETn) ∈ VP
Proof. Follows from Theorem 2.5 and Theorem 2.19 and the de�nition of VP.
We now de�ne a restriction of circuits and use it to give a characterization of
the class VP.
De�nition 3.6. Let α be a gate receiving arrows from gates β and γ. α is said to
be disjoint if the sub-circuits associated to β and γ are disjoint from one another.
De�nition 3.7. A circuit is called multiplicatively disjoint(MD) if all its multipli-
cation gates are disjoint.
Note that a circuit is a formula if and only if all its gates are disjoint. Recall that
the algebraic branching programs easily simulated formulas (refer Lemma 2.14) and
have e�cient circuit construction (refer Lemma 2.17). Similarly, a multiplicatively
disjoint circuit can be seen as intermediate between circuits and formulas. Disjoint
multiplications allow us to control the degree of the polynomial computed by a
circuit.
Lemma 3.8. If C is a MD circuit of size s, then its degree is at most s.
20
Chapter 3. VP
Proof. We will prove it by induction on the size of the circuit. If s = 1, the circuit
is a singleton gate labelled either by a variable or constant and the degree is at
most 1. Suppose the claim is true for circuits of size strictly less than s. Let C
be a MD circuit of size s and α be its output gate. Let β and γ be the two input
gates of α. Obtain C ′ from C by deleting α.
Case 1: α is a + gate. By induction hypothesis on the sub-circuit rooted at
β we know that the degree of β is at most (s− 1). Similarly, the degree of γ is at
most (s− 1). Hence, the degree of α is at most (s− 1).
Case 2: α is a × gate. Let Cβ and Cγ be the disjoint sub-circuit rooted at β
and γ, of size sβ and sγ, respectively. We know that s = sβ + sγ + 1. Applying
induction hypothesis on Cβ and Cγ, we have degree of β is at most sβ and degree
of γ is at most sγ. Therefore the degree of α is at most sβ + sγ, which is at most
s.
This immediately implies that a sequence of polynomials (fn) computed by a
sequence of poly-size MD circuits (Cn) belongs to VP. In fact, [MP08] shows that
the converse is also true.
Lemma 3.9. Let C be a circuit of size s and degree d, computing a polynomial.
Then, there exists a MD circuit C ′ of size at most sd computing the same polyno-
mial.
Proof. We will build a sequence of MD circuits Cj, 1 ≤ j ≤ d satisfying the
following properties:
1. for any gate α of degree j in C, Cj will contain distinct gates α1, . . . , αd+1−j
such that each compute the same polynomial as α in C. Gate αi is called
the clone of α of index i.
2. the gates in the sub-circuit rooted at clone αi are clones whose index is in
the range [i, i+ j − 1].
We will build the circuit inductively. Circuit C1 is made of d copies of the sub-
circuit of C, such that the sub-circuit contains only gates of degree 1. Hence C1
does not contain multiplication gate (degree of constant is 1). Also, gates in the
sub-circuit associated with a clone αi are clones of index i. Therefore, C1 is a MD
circuit satisfying the required properties.
21
Chapter 3. VP
Suppose we have built circuits Cj for 1 ≤ j ≤ (k − 1). Let us now see how
to build the circuit Ck. Addition gates of degree k can have a child of degree
k. So we start by adding ×-gates of degree k. Let α be a ×-gate of degree k
in C. Let its children be β and γ of degree k1 and k2, respectively. Let us add
the clones α1, . . . , αd+1−k. For any clone αi, let βi of Ck1and γk1+i of Ck2 be its
children. Note that these clones exist because 1 ≤ i ≤ d+ 1− k ≤ d+ 1− k1 and
k1 + 1 ≤ i + k1 ≤ d + 1 − k2. Since βi and γk1+i computes the same polynomial
as the gate β and γ in C, αi computes the same polynomial as α in C. Gates
in the sub-circuit associated with βi are clones whose index lies in the range i to
i + k1 − 1 and the gates in the sub-circuit associated with γi+k1 are clones whose
index lies in the range i+k1 to i+k−1. Therefore, each gate αi is disjoint and the
gates in the sub-circuit associated with αi are clones of index lying in the range i
to i+ k − 1. Hence, this partially constructed circuit is multiplicatively disjoint.
Now, we add +-gates of degree k. A +-gate is added only after its children are
already added to the circuit Ck. Let α be a +-gate of degree k and its children
be β and γ of respective degrees k1 and k2. We add the clones α1, . . . , αd+1−k.
For any clone αi, it receives an arrow from the clone βi of Ck1 and an arrow from
the clone γi of Ck2 . Since we are adding +-gates, the circuit stays MD. Clearly,
each αi computes the same polynomial as α in C and the gates in the sub-circuit
associated with αi have index in the range i to i+ k − 1.
Let C ′ be the sub-circuit rooted at the output gate of C in Cd. Since each gate
in C has been copied at most d times, the size of C ′ is at most sd. By construction
C ′ is a MD circuit and computes the same polynomial as C.
Therefore we conclude from Lemma 3.8 and Lemma 3.9 that the MD circuits
characterize VP.
Theorem 3.10 ([MP08]). A sequence of polynomials (fn) belongs to VP if and
only if there exists a sequence (Cn) of MD circuits of polynomially bounded size,
such that Cn computes the polynomial fn.
3.2 Parallel Complexity
Valiant, Skyum, Berkowitz and Racko� showed that sequential computation can
always be parallelized in algebraic model. Note this is in contrast to what we
22
Chapter 3. VP
believe to be true in boolean complexity.
De�nition 3.11. Let i be a non-negative integer. A sequence of polynomials (fn)
is in VNCi if there exists a sequence of circuits (Cn) of polynomially bounded size
and degree, and depth of the circuit is O(logi n), such that Cn computes fn.
De�nition 3.12. A circuit C is called semi-unbounded if fan-in of + gate in the
circuit is unbounded and fan-in of × gates in the circuit is 2.
De�nition 3.13. Let i be a non-negative integer. A sequence of polynomials (fn)
∈ VSACi if there exists a sequence of semi-unbounded circuits (Cn) of polynomially
bounded size and degree, and depth of the circuit is O(logi n), such that Cn computes
fn.
Obviously, VNC1 ⊆ VSAC1 ⊆ VNC2 ⊆ VSAC2 ⊆ VNC3 ⊆ . . . ⊆ VP.
Theorem 3.14 ([VSBR83]). VP = VSAC1 = VNC2
But before we go into the proof of the above theorem we need some concepts
that will help us build the proof.
Let C be a circuit of size s. Let g be a gate in C and f(g) denotes the polynomial
computed by g. Let gout be the output gate of C. Thus f(gout) is the polynomial
computed by C. Degree of a gate g in C is the degree of the polynomial computed
by g in C, denoted by d(g). Observe that this notion of degree is di�erent from
what we have seen in previous sections. For a gate g, let gl and gr be the left and
right child of g respectively. Henceforth, we will assume that d(gl) ≥ d(gr) for
every gate g.
A polynomial is called homogeneous if the degree of all the monomials in the
polynomial is same. We say that a circuit is homogeneous if every gate in the
circuit computes a homogeneous polynomial. The following result due to Strassen
[Str73] shows that we can always assume C to be homogeneous.
Lemma 3.15. If C is a non-homogeneous circuit of size s computing a polynomial
p of degree d, then there exists a homogeneous circuit C ′ (with multiple outputs) of
size O(sd2) computing d+ 1 polynomials such that their sum is p.
Proof. We will sketch the proof here. The idea of the proof is to homogenize every
gate in the circuit C. Thus for each gate g in C, we will have d + 1 gates which
23
Chapter 3. VP
compute the d + 1 homogeneous parts of f(g). If g is a +-gate, then we require
O(d) additional gates to add similar degree terms of the children of g. If g is
a ×-gate, then we require O(d2) gates to obtain the homogeneous terms of f(g)
from the monomials of the children of g. In this way, we get C ′ that satis�es the
required properties.
From now onwards we say that a homogeneous circuit computes a non-homogeneous
polynomial, if the circuit computes all the homogeneous parts of the polynomial.
The following proposition is easy to verify.
Proposition 3.16. If C is a homogeneous circuit of the smallest size computing
a polynomial p, then for any gate g in C, f(g) is not the zero polynomial, and
d(g) ≤ d(gout).
The construction is based on breaking a circuit into smaller parts and thinking
of polynomials computed at each parts as pseudo-monomials of original polynomial.
Finally, computing the coe�cients of these pseudo-monomials and summing these
pseudo-monomials with their coe�cients gives the polynomial computed by the
original circuit.
To this aid we will de�ne polynomials f(v;w) for any two gates v and w in the
circuit. We will de�ne f(v;w) such that it is equal to the coe�cient of v′ in f(w)
in a modi�ed circuit obtained by replacing the node v by a new indeterminate v′.
One can think of f(v;w) as the partial derivative of f(w) with respect to v′. But
if f(w) is not linear in v′ then the partial derivative is not the coe�cient we are
looking for. Therefore, we will make sure that f(v;w) take its intended value only
when d(v) > d(w)2. Let us now formalize this idea.
De�nition 3.17. Let C be any circuit. Let v and w be any gates in C. Let us
de�ne f(v;w) inductively,
• If v = w, then f(v;w) = 1.
• Else if the label of w ∈ F ∪ {x1, x2, . . .}, then f(v;w) = 0.
• Otherwise, if w is a +-gate, such that w = wl+wr, then f(v;w) = f(v;wl)+
f(v;wr).
• If w is a ×-gate, such that w = wl × wr, then f(v;w) = f(wr) · f(v;wl).
24
Chapter 3. VP
Lemma 3.18. If C is a homogeneous circuit and w be any gate in C, then each
nonzero f(v;w) is homogeneous and the degree of f(v;w) is equal to (d(w)−d(v)).
Proof. The proof is by induction on the depth of the gate w.
Now observe how the de�nition of f(v;w) is motivated by it being the partial
derivative of f(w) with respect to v′. The less obvious de�nition is for the ×-gate.Let w be a ×-gate. Suppose f(wl) = f(v;wl) · v′ + p and f(wr) = f(v;wr) · v′ + q
where f(v;wl), f(v;wr), p and q are independent of v′. Assume d(v) > d(w)
2. Hence,
d(v) > d(wr). Therefore, by Lemma 3.18 f(v;wr) = 0. Thus, f(wr) = q and
f(w) = f(wl) × f(wr) = f(v;wl) · q · v′ + p · q. Therefore, we have f(v;w) =
f(wr) · f(v;wl).
De�nition 3.19. Let C be any circuit and V be the set of gates in C. For a > 0,
de�ne
Va = {g ∈ V | d(g) > a, g = gl × gr, d(gl) ≤ a}.
Lemma 3.20 ([VSBR83]). Let C be any homogeneous circuit (possibly with mul-
tiple outputs) and V be the set of gates of C. Let v, w ∈ V and a > 0, such that
d(v) ≤ a < d(w). Then,
f(v;w) =∑g∈Va
f(v; g) · f(g;w) and f(w) =∑g∈Va
f(g) · f(g;w)
Proof. The proof is by induction on the depth of w in C. Note that v 6= w, since
d(v) < d(w).
Base case: depth of w is zero, that is, w is labelled by a variable or a constant.
But this is not possible since d(w) > a and a > 0.
Suppose the lemma is true for gates upto depth i− 1.
Induction step: Let w be a gate of depth i.
Case 1: w is a +-gate, say w = wl+wr. By homogenity, d(w) = d(wl) = d(wr).
From de�nition, we have
f(v;w) = f(v;wl) + f(v, wr)
25
Chapter 3. VP
Applying induction hypothesis, we get
f(v;w) =∑g∈Va
f(v; g) · f(g;wl) +∑g∈Va
f(v; g) · f(g;wr)
=∑g inVa
f(v; g) · (f(g;wl) + f(g;wr))
=∑g∈Va
f(v; g) · f(g;w)
Similarly,
f(w) = f(wl) + f(wr)
=∑g∈Va
f(g) · f(g;wl) +∑g∈Va
f(g) · f(g;wr)
=∑g∈Va
f(g) · (f(g;wl) + f(g;wr))
=∑g∈Va
f(g) · f(g;w)
Case 2: w is a ×-gate, say w = wl × wr.Case 2a: w ∈ Va. That is, d(wr) ≤ d(wl) ≤ a. Let g 6= w and g ∈ Va.
Then f(g;w) = f(wr) · f(g;wl). Since d(g) > a ≥ d(wl), By Lemma 3.18 we have
f(g;wl) = 0 and hence f(g;w) = 0. Therefore,∑g∈Va
f(v; g) · f(g;w) = f(v;w) · f(w;w) +∑
g∈Va\{w}
f(v; g) · f(g;w) = f(v;w)
Similarly, f(w) =∑
g∈Va f(g) · f(g;w).
Case 2b: w /∈ Va. Then d(w) ≥ d(wl) > a. By induction hypothesis the
26
Chapter 3. VP
lemma holds for wl. Hence,
f(v;w) = f(wr) · f(v;wl)
= f(wr) ·∑g∈Va
f(v; g) · f(g;wl) (by induction hypothesis)
=∑g∈Va
f(v; g) · f(wr) · f(g;wl)
=∑g∈Va
f(v; g) · f(g;w) (by de�nition of f(g;w))
Similarly,
f(w) = f(wr) · f(wl)
= f(wr) ·∑g∈Va
f(g) · f(g;wl)
=∑g∈Va
f(g) · f(g;w)
Theorem 3.21 ([VSBR83]). If C is a homogeneous circuit (possibly with multiple
outputs) of the smallest size s computing a polynomial p(x1, x2, . . . , xn) of degree
d, then there exists a circuit C ′ (possibly with multiple outputs) of size O(s3) which
computes p, such that the depth of any gate in C ′ is O(log s log d).
Proof. The construction of C ′ will proceed in dlog de stages. Stage (i + 1) will
compute all f(w) and f(v;w) that have degree in the range (2i, 2i+1]. Furthermore,
each stage is of depth O(log s). By Proposition 3.16, we would have computed p
in dlog de stages.Stage 0: We compute all f(w) and f(v;w) that have degree at most 1. Clearly,
depth O(log s) and size O(s) is su�cient to compute required polynomials of degree
at most 1.
Stage (i+1): Suppose we have built the circuit C ′ upto stage i. Let us �rst
compute f(w) for all w satisfying 2i < d(w) ≤ 2i+1. Let a = 2i. Then by
Lemma 3.20 we have,
f(w) =∑g∈Va
f(g) · f(g;w) =∑g∈Va
f(gl) · f(gr) · f(g;w)
27
Chapter 3. VP
Since g ∈ Va, d(gr) ≤ d(gl) ≤ 2i and by Lemma 3.18 degree of f(g;w) is at
most 2i. Hence each f(gr), f(gl) and f(g;w) has already been computed by stage
i. Since |Va| ≤ s, f(w) can be computed in O(log s) depth and with O(s) gates.
Let us now compute f(v;w) for v, w such that 2i < degree(f(v;w)) = d(w) −d(v) ≤ 2i+1. Let a = d(v) + 2i. So, d(w) ∈ (a, a + 2i]. Again by Lemma 3.20 we
have,
f(v;w) =∑g∈Va
f(v; g) · f(g;w) =∑g∈Va
f(gr) · f(v; gl) · f(g;w)
Again note that each f(v; gl) and f(g;w) has degree at most 2i and hence, are
already computed by stage i. Now if d(gr) ≤ 2i+1, then f(gr) has already been
computed before in stage i + 1. Therefore if d(gr) ≤ 2i+1, we can compute the
contribution of g to f(v;w) using at most 2 gates in constant depth. Otherwise
d(gl) ≥ d(gr) > 2i+1. In this case we will argue that f(gr) · f(v; gl) · f(g;w) ≡ 0
and hence such a g can be ignored while computing f(v;w).
If f(v; gl) ≡ 0, then obviously the whole product is zero. Otherwise, f(v; gl) 6= 0
and therefore, by Lemma 3.18, d(gl) ≥ d(v). Hence d(g) = d(gl) + d(gr) > d(v) +
2i+1 ≥ d(w) and so, f(g;w) ≡ 0. Thus the contribution of all relevant g can be
computed in depth O(log s) with O(s) gates.
There are at most s2 pairs (v, w). Therefore the overall size of the circuit is
O(s3).
Observe that this construction computes the homogeneous terms of p sepa-
rately. To get a single output gate computing p, we can sum these homogeneous
terms using log d depth. The size of this new circuit is O(s3 + d) but the depth is
still O(log s log d).
Proof of Theorem 3.14: Clearly, VSAC1 ⊆ VNC2 ⊆ VP. VP ⊆ VNC2 follows
directly from Lemma 3.15 and Theorem 3.21. To prove VP ⊆ VSAC1, modify the
proof of Theorem 3.21 to use unbounded fan-in +-gate in each stage to bring down
the depth of each stage to a constant.
3.3 Complete polynomials
VP was very naturally de�ned using circuits, but there is one irritating aspect
about it; to the best of our knowledge there are no known natural sequences of
28
Chapter 3. VP
polynomials that are complete for VP.
We present here a canonical construction to obtain a complete problem for VP.
We will construct a sequence of circuits (CN) such that the family of polynomials
(PN) represented by it belongs to VP and for every sequence (fn) ∈ VP, (fn) ≤p(PN).
First we will give the construction of the circuit CN and later we will see how
to embed any polynomial sequence, in VP, into (PN).
Construction of CN : Let X = {X1, X2, . . . , XN} and Y = {yi,j,k,`|1 ≤ i, j, k ≤N, 1 ≤ ` ≤ logN}. Let X ∪ Y be the set of input variables of CN . CN is a layered
circuit where each layer has gates with the same operation. There are 2 logN − 1
layers in CN such that level 1 has all the leaves labelled with distinct variables,
level 2 is a layer of multiplication gate with fan-in 3, level 3 is a layer of addition
gate with unbounded fan-in, and so on till the last layer which contain unbounded
fan-in addition gates. Formally, CN is de�ned by the following set of polynomials.
For 1 ≤ ` ≤ logN , let g`,1, g`,2, . . . , g`,N be the set of polynomials computed by CN
at stage `. The polynomial g's are de�ned as follows;
1. g1,i = Xi, for 1 ≤ i ≤ N .
2. Inductively for `+ 1, g`+1,i =∑
j,k∈[N ] yi,j,k,` · g`,j · g`,k.
3. glogN,1 is the output gate of CN .
Clearly, PN has (N3 logN + N) variables and degree at most N . The size of
the circuit CN is O(N3 logN). Therefore, (PN) ∈ VP. Also, note that the depth
of the circuit is O(logN).
Reduction: Now consider any sequence (fn) ∈ VP. By Theorem 3.14 (fn) ∈VSAC1. Let (Gn) be a sequence of VSAC1 circuits that represents (fn). Without
loss of generality we can assume that Gn has the following layered structure:
• Output gate of Gn is a +-gate.
• Gn is strictly alternating.
• All ×-gates have fan-in 2 and addition gates have unbounded fan-in.
• All leaves are at the same depth.
29
Chapter 3. VP
Suppose Gn is of size s ≤ nc and depth at most d log n. Then choose N =
max{nd, s}. The depth of CN is more than Gn, so add dummy gates to Gn main-
taining the layered structure to make it have the same depth as CN .
Embedding : Let us now move on to embed Gn into CN . For a layer of addition
gates in Gn there exists a corresponding layer of addition gates in CN at the same
depth. From this layer we arbitrarily choose the same number of gates as in Gn.
Then we keep appropriate connections between the two adjacent layer of addition
gates in CN . Let us now formalize this idea. Recall that the layers of addition
gates and input gates are called stages in CN . We will use the same terminology
for Gn. The layer of input gates is stage 1. We will build an embedding inductively
in stages.
For the layer of input gates in Gn having p1 nodes, we choose p1 nodes from
the layer of input gates, stage 1, in CN and label them accordingly. So, for each
input gate α in Gn there exists an i in [N ] such that g1,i in CN has the same label
as α. The input gates of CN which are not chosen are set to 0.
Suppose now we have built this embedding till the layer of addition gates at
stage `. Inductively, we know that the chosen addition gates in stage ` in CN
compute the same polynomials as the corresponding gates in Gn. Now we can
extend the embedding to stage `+ 1. Let the layer of addition gates at stage `+ 1
in Gn have p`+1 nodes. We choose p`+1 nodes in the layer of addition gates at stage
`+ 1 in CN . Thus for each +-gate β from stage `+ 1 in Gn there exists an i in [N ]
such that g`+1,i corresponds to β. Now we will make the interconnections so that
g`+1,i computes the same polynomial as β. We know that
g`+1,i =∑j,k∈[N ]
yi,j,k,` · g`,j · g`,k
Now set yi,j,k,` to 1 if the product g`,j · g`,k contributes to the sum computed at β,
otherwise to 0. If a multiplication gate does not feed into any of the chosen g`+1,is
then set its y variable to 0. Since the addition gates at stage ` in CN computes
the same polynomial as the corresponding gates in Gn, g`+1,i computes the same
polynomial as β. Inductively we can conclude that at stage logN , glogN,1 computes
the polynomial fn. Since N is polynomial in n, we have (fn) ≤p (CN). Therefore
(CN) de�nes a VP-complete family of polynomials.
30
Chapter 3. VP
Circuit independent characterization of VP : Recently, there have been
attempts to �nd sequences of polynomials, not de�ned via circuits, that are com-
plete for VP. We do not know if these attempts have been successful. However,
Mengel [Men11] obtained a characterization of VP that does not depend on cir-
cuits. He obtained polynomials from constraint satisfaction problems (CSPs) to
characterize several arithmetic circuit classes, in particular VP. We only mention
the characterization of VP. For a more detailed treatment refer to [Men11].
A constraint φ(Y ) over the variable set var(φ) = Y is a function from D|Y | to
{0, 1}. D is a �nite set and is called the domain of φ. The Arity of the constraint
φ is |Y |. If |Y | = 2, we say the φ is binary. A CSP Φ of size m in the variables
var(Φ) and domain D is a set of m constraints {φ1, . . . , φm} such that the domain
of all φi is D and⋃i∈[m] var(φi) = var(Φ). A CSP Φ is called binary if and only
if all constraints φi of Φ are binary.
Let (Φn) denote a family of CSPs. Every Φn may have its own universe Dn and
its own set of variables var(Φn). A sequence (Φn) is said to have bounded arity if
the arity of all the constraints in all of Φn is bounded by a constant. A family (Φn)
of CSPs is called p-bounded if and only if (Φn) has bounded arity and there exists
polynomials p and q such that |Dn| ≤ p(n) and |var(Φn)| ≤ q(n) for every n.
To a CSP Φ let us assign a graph GΦ. Its vertex set is var(Φ) and there is
an edge between two vertices x and y if and only if there is a constraint φ in Φ
such that {x, y} ⊆ var(φ). Observe that the constraints in Φ yield cliques in GΦ.
Tree-width of a CSP Φ is de�ned to be the tree-width of graph GΦ. A family of
CSPs (Φn) is said to have bounded tree-width if and only if tree-width of GΦn is
bounded by a constant.
To a CSP Φ we now associate a polynomial Q(Φ). Let D be the domain of Φ.
The variable set of Q(Φ) is {Xd | d ∈ D}. De�ne,
Q(Φ) =∑
a : var(Φ)→D
Φ(a)∏
y∈var(Φ)
Xa(y)
Note that Q(Φ) is homogeneous of degree |var(Φ)|.
Theorem 3.22 ([Men11]). The following statements hold true and characterize
VP.
1. If (Φn) is a p-bounded family of CSPs with bounded treewidth, then (Q(Φn))
31
Chapter 3. VP
is in VP.
2. Let (fn) ∈ VP. Then there exists a p-bounded family of bounded treewidth
(in fact, 1) CSPs (Φn) such that (fn) ≤p (Q(Φn)). Moreover, Φn is a binary
CSP for every n.
3.4 Classes within VP
In this section we will describe the sub-classes of VP and their relationship with
the computation of determinant.
De�nition 3.23. A sequence of polynomials (fn) belongs to the class VPws if it is
represented by a sequence of weakly skew circuits of polynomially bounded size.
De�nition 3.24. A sequence of polynomials (fn) belongs to the class VPs if it is
represented by a sequence of skew circuits of polynomially bounded size.
Therefore, we get the following restatement of Theorem 2.19.
Theorem 3.25. VPws = VPs = VBP
Similarly we can restate a few more results from Chapter 2. Theorem 2.10 can
be restated as follows.
Theorem 3.26. Over any �eld, (DETn) is VPws-complete with respect to p-projections.
3.5 Class VQP and Determinant
We have seen that the determinant family (DETn) belongs to the class VP. How-
ever, it is not known whether the determinant family is VP-complete with respect
to p-projections. The class VQP, de�ned via circuits of quasi-polynomial size, was
introduced to study and characterize the complexity of the determinant. We will
present here an interesting result, which states that DET is complete for VQP with
a slightly weaker notion of reduction.
De�nition 3.27. A function t : N → N is called quasi-polynomially bounded, if
there exist two positive constants a and b such that for all n ≥ 2,
t(n) ≤ na·logb n
32
Chapter 3. VP
De�nition 3.28. A sequence of polynomials (fn) belongs to the class VQP if the
number of variables and degree of fn is polynomially bounded in n, and it is com-
puted by a circuit of quasi-polynomially bounded size.
Clearly, VP ⊆ VQP. [MP08] shows that weakly skew circuits characterize VQP.
The following lemma is the main ingredient of the proof.
Lemma 3.29. If C is a circuit of size s and degree d, then there exists a weakly
skew circuit C ′ computing the same polynomial as C and of size less than slog 2d.
Proof. We will prove the claim for multiple output circuits and in such a case the
degree of the circuit is the maximal degree of a gate in the circuit. We will also
keep the notion of reusable gates for a weakly skew circuit. To recall, a gate in a
weakly skew circuit will be called reusable if it does not belong to the independent
sub-circuit of a multiplication gate.
We will show, by induction on n, that for any integer d such that 2n ≤ d < 2n+1,
for any (possibly multiple outputs) circuit of size s and degree d, there exists a
weakly skew circuit C ′ such that:
1. size of C ′ is at most slog 2d
2. for any gate α in C, there exists a reusable gate in C ′ which computes the
same polynomial as α in C.
Base case: n = 0. The degree of C is 1. Since even the degree of a constant
is de�ned to be 1, there are no multiplication gates in C. Thus C is a weakly skew
circuit satisfying the required properties.
Suppose now that the above claim is true for all k strictly less than n.
Induction step:Let C be a circuit of size s and degree d such that 2n ≤ d <
2n+1. Let C0 be the circuit obtained by removing all gates of degree strictly greater
than bd/2c. Let s1 be the number of gates of C of degree > bd/2c, and s0 be the
size of the circuit C0. Applying induction hypothesis to C0, we obtain a weakly
skew circuit C ′0 of size at most slog d0 and for any gate of C0 there exists a reusable
gate in C ′0 computing the same polynomial. Let us now see how to build C ′ from
C ′0. Add s1 + 1 copies of the circuit C ′0 to C ′. The duplicate copies of C ′0 can be
thought of as a reserved copy for each gate deleted (there are s1 of these) and one
reusable copy. For each deleted gate vj, 1 ≤ j ≤ s1, let C′0j be its reserved copy of
33
Chapter 3. VP
C ′0. Let C′0r be the reusable copy of C ′0. Add the removed gates to C ′. Let us now
see how to connect these gates.
Let vj be a +-gate of degree strictly greater than bd/2c. If a child of vj has
degree at most bd/2c then connect vj to the reusable copy of that child in C ′0r. If a
child of vj has degree strictly greater than bd/2c then connect vj to the only copy
of that child in C ′.
Let us now connect ×-gate of C of degree strictly greater than bd/2c, say vk.The key observation is that at least one child of vk must be in C0.
Case 1: Both the children of vk, say β and γ, are of degree at most bd/2c.Then vk receive arrows from a reusable gate for β in C ′0r and a reusable gate for γ
in C ′0k. Note that these reusable gates exist by induction hypothesis.
Case 2: Otherwise, one of the children is of degree at most bd/2c, say β. Thenvk receive arrows from the only copy of γ and from a reusable gate for β in C ′0k.
Clearly, C ′ is a weakly skew circuit and satis�es the second property. The size
of C ′ is at most (s1 + 1)slog d0 + s1 ≤ s · slog d ≤ slog 2d, as required.
The above lemma immediately suggests the following characterization.
Theorem 3.30. A sequence of polynomials (fn) belongs to VQP if and only if there
exists a sequence of (Cn) of weakly skew circuits, of quasi-polynomially bounded size
and polynomially bounded degree, such that Cn represents the polynomial fn.
Proof. The if direction follows from the de�nition of VQP and the only if direction
follows from Lemma 3.29.
De�nition 3.31. A sequence (fn) is a qp-projection of a sequence (gn) if and only
if there exists a quasi-polynomially bounded function t such that for all n, fn is a
projection of gt(n).
Now we have the required machinery to prove that (DETn) is VQP-complete.
Theorem 3.32. Over any �eld, the Determinant family (DETn) is VQP-complete
with respect to qp-projections.
Proof. Theorem 3.5 implies that (DETn) ∈ VQP. Theorem 3.30, Lemma 2.18 and
Lemma 2.9 show that any polynomial sequence in VQP is a qp-projection of the
determinant.
34
Chapter 3. VP
3.6 Symmetric determinantal representation
The aim of this section is to write a weakly-skew circuit as a determinant of a
symmetric matrix, whose entries are constants or variables.
[GKKP11] shows how to obtain a symmetric matrix directly from a weakly
skew circuit. Observe that there is another way to construct a symmetric matrix
representing a weakly skew circuit. First we obtain an algebraic branching program
from a weakly skew circuit using Lemma 2.18, then Lemma 2.9 gives a matrix A
representing an algebraic branching program and �nally symmetrizing A. We will
describe the second approach here. [GKKP11] attributes this proof to Meena
Mahajan and Prajakta Nimbhorkar.
Theorem 3.33 ([GKKP11]). For every n, there is a symmetric matrix M of
dimensions 4n3 + 7 and entries in {xi,j | 1 ≤ i, j ≤ n} ∪ {0, 1,−1, 1/2} such that
DETn = det(M).
Proof. Let G = (V,E) be the graph obtained from Theorem 2.4 for computing
DETn. The symmetric weighted graph G′ is constructed as follows: the set of its
vertices, V ′, is {uin, uout | u ∈ V \ {s, t}} ∪ {sout, tin} and the set of its edges,
E ′, is {uoutvin | (u, v) ∈ E} ∪ {uinuout | u ∈ V \ {s, t}}. It will be helpful to
think of undirected edges as bidirectional edges. Weights on edges are de�ned by
w(uoutvin) = w(u, v) and w(uinuout) = 1. Clearly G′ has 4n3 + 6 vertices arranged
in 2n+ 2 layers. A path P in a graph G is called acceptable if G\P admits a cycle
cover. We claim that the following holds true:
DETn =∑
acceptable sout−tin path P ′ in G′
w(P ′)
To prove the claim it su�ces to describe a weight-preserving bijection between
acceptable sout − tin paths in G′ and s-t paths in G. Let P = 〈s, v1, . . . , t〉 be ans-t path in G. Then
P ′ = 〈sout, v1,in, v1,out, v2,in, . . . , tin〉
is an acceptable sout − tin path in G′. Clearly, the weight of P ′ is equal to the
weight of P . Conversely, let P ′ be an acceptable sout − tin path in G′ and C ′ be a
35
Chapter 3. VP
cycle cover of G′ \P ′. We prove that for every u ∈ V \{s, t}, either the vertices uinand uout are both in P ′ or together form a length-2 cycle of C ′. The �rst vertex of
the path P ′ is sout and the second vertex is some u1,in where u1 is the vertex in the
second layer of G. The third vertex has to be u1,out as u1,in is only linked to sout
and u1,out. Let us now consider another vertex vin where v belongs to the second
layer of G. Since it is only linked to sout and vout, and it is not in path P ′, it has to
form a length-2 cycle vinvout of weight 1 in C. Similarly, we can argue about the
following layers. Hence, we get an s-t path in G and also, showed that G′ \ P ′ hasonly one cycle cover of weight 1 and sign (−1)|G
′\P ′|/2 = (−1)2n3−n+2 = (−1)n. Let
P be the set of acceptable sout − tin paths in G′ and Prev be the set of acceptabletin − sout paths in G′. Since the graph G′ is symmetric, we have,
DETn =1
2
(∑P ′∈P
w(P ′) +∑
P ′∈Prevw(P ′)
)
Let G′′ be the graph obtained from G′ by adding a new vertex c and the edges
tinc of weight 1/2 and csout of weight (−1)n. Let M be the adjacency matrix of
G′′. The only odd cycles in G′′ are the ones including c and an sout − tin path
or a tin − sout path. Since G′′ is an odd graph, every cycle decomposition of G′′
contains one of these odd cycles and the rest of the graph decomposes into only
one possible cycle decomposition. Therefore,
DETn =∑
C is a cycle cover in G′′
sgn(C)w(C)
and thus we have,
DETn = det(M)
Clearly, M is a symmetric matrix of dimension 4n3 + 7.
In characteristic 2, the above construction breaks down because of the coef-
�cients 2−1 used. Nevertheless, for a polynomial computable by a weakly-skew
circuit, it is possible to represent its square as the determinant of a symmetric
matrix in characteristic 2.
First let us see an easy fact about determinants in characteristic 2.
36
Chapter 3. VP
Fact 3.34. Let G be an edge-weighted graph and A be its adjacency matrix. Then
in characteristic 2,
det(A) =∑
C is a cycle cover of G
w(C)
Now we will establish a more stronger claim about symmetric determinant in
characteristic 2. The following lemma claims that the determinant of a matrix in
char 2 is obtained as the sum of the weights of cycle covers with cycles of length
1 or 2, i.e. a partial matching.
Lemma 3.35 ([GKKP11]). Let G be an edge-weighted graph and A be its adjacency
matrix. Then in characteristic 2, det(A) is the sum of weights of the cycle covers
with cycles of length at most 2.
Proof. By Fact 3.34 we need to prove that the total contribution of cycle covers of
G containing a cycle of length at least 3 is zero. It su�ces to show that for every
cycle cover C of G containing a cycle of length at least 3, there exist a di�erent
cycle cover C ′ of G of the same weight. Let C contains a cycle (v1, v2, . . . , vk, v1) of
length at least 3. Consider a cycle cover C ′ containing the same cycles as C, but
(vk, vk−1, . . . , v1, vk) instead of (v1, v2, . . . , vk, v1). Clearly, weight of C ′ is the same
as the weight of C. Thus their contributions to the determinant cancel out.
Theorem 3.36 ([GKKP11]). Let p be a polynomial over a �eld of characteristic
2, represented by a weakly skew circuit C of size n. Then there exists a symmetric
matrix A of dimensions 2n such that p2 = det(A).
Proof. Let G (of Lemma 2.18) be the algebraic branching program of size n + 1
computing p. Let G′ (of Lemma 2.9) be the directed graph of size n. By Fact 3.34
det(A′) = p, where A′ is the adjacency matrix of G′. Let G′′ = (V ′′, E ′′) be a
bipartite graph obtained from G′, such that V ′′ = {vs, vt|v ∈ V (G′)} and E ′′ =
{usvt|(u, v) ∈ E(G′)}. The weight of an edge usvt is equal to the weight of the arc
(u, v). Let A′′ be the symmetric adjacency matrix of G′′. Then,
det(A′′) =∑
C is a cycle cover of G′′w(C)
37
Chapter 3. VP
From Lemma 3.35 and the fact that there is no loop in G′′, we have
det(A′′) =∑
µ : µ is a perfect matching in G′′
w(µ)2 =
(∑µ
w(µ)
)2
where the second equality holds because the �eld is of characteristic 2. Now we
will show that det(A′) =∑
µw(µ). It su�ces to prove that cycle covers of G′
and perfect matchings of G′′ are in one-to-one correspondence. Suppose G′′ has a
perfect matching. Let us be any vertex. Then it is matched to some vt. Now vs is
matched to some wt. This way at some point we go back to ut, and thus obtain a
cycle in G′. Doing this for every vertex we obtain a cycle cover in G′. Conversely,
suppose there is a cycle cover of G′. For each edge (u, v) in the cycle cover, we
obtain a matching edge usvt in G′′. So, we get p = det(A′) =∑
µw(µ). Therefore,
p2 = det(A′)2 =
(∑µ
w(µ)
)2
= det(A′′)
De�ne A to be A′′. Clearly, A is a symmetric matrix of dimension 2n.
38
4VNP
4.1 Class VNP
We now introduce another important class. It can be thought of as an analogue
of the class NP.
De�nition 4.1. A sequence of polynomials (fn) belongs to VNP if there exist a
polynomial p and a sequence (gn) ∈ VP such that for all n,
fn(x) =∑
y∈{0,1}p(|x|)gn(x, y)
Observe that VP is clearly contained in VNP. The Valiant's hypothesis states
that this is a strict containment.
An interesting example in the class VNP is given by the permanent polynomials.
Let us denote the permanent of an n×n matrix of independent indeterminates by
PERn.
Lemma 4.2. (PERn) ∈ VNP.
Proof. Recall that the permanent per(X) of an n× n matrix X is de�ned as
per(A) =∑π∈Sn
n∏i=1
Xi,π(i)
39
Chapter 4. VNP
Let Y be an n×nmatrix of indeterminates. Consider the following polynomials,
gn(Y ) =n∏i=1
[1−
n∏j=1
(1− yi,j)
]·n∏j=1
[1−
n∏i=1
(1− yi,j)
]
and
g′n(Y ) =n∏i=1
n∏j=1
(1− yi,j) +n∑k=1
(yi,k ·n∏
j=1;j 6=k
(1− yi,j))
· n∏j=1
n∏i=1
(1− yi,j) +n∑k=1
(yk,j ·n∏i=1;i 6=k
(1− yi,j))
It is easy to verify that for any 0-1 (n× n)-matrix Y , gn(Y ) = 1 i� every row and
every column of Y has at least one 1 and g′n(Y ) = 1 i� every row and every column
of Y has at most one 1. Observe that gn(Y ), g′n(Y ) ∈ {0, 1}, when Y is a (n× n)
boolean matrix. So gn(Y ) · g′n(Y ) = 1 i� Y is a permutation matrix. Therefore,
we have
per(X) =∑
Y ∈{0,1}(n×n)
Gn(X, Y )
where Gn(X, Y ) = gn(Y ) · g′n(Y ) · (∏n
i=1
∑nj=1Xi,jYi,j). Clearly Gn(X, Y ) ∈ VP.
Thus PERn ∈ VNP.
One of the main results in Valiant's theory is the completeness of the permanent
family for VNP, over �elds of characteristic di�erent from 2. We will see a proof
of this in Section 4.2 This result stands in stark contrast to the fact that the
determinant family belongs to the class VP.
Restricting circuits to formulas in the de�nition of VP and VNP, we get the
following classes.
De�nition 4.3. A sequence of polynomials (fn) belongs to the class VPe if there
exists a sequence of formulas (Fn) of polynomially bounded size such that Fn com-
putes fn.
Remark 4.4. Formulas are also called expressions and �e� in the class VPe signi-
�es this. Recall we looked at the class VPe in Section 2.3.
De�nition 4.5. A sequence of polynomials (fn) belongs to VNPe if there exists a
40
Chapter 4. VNP
polynomial p and a sequence (gn) ∈ VPe such that for all n,
fn(x) =∑
y∈{0,1}p(|x|)gn(x, y)
It is obvious that VNPe ⊆ VNP. Valiant showed that these two classes are in
fact equal and used this an ingredient to prove the completeness of permanent for
the class VNP. Here we will present a proof due to Malod and Portier which is
much more combinatorial in nature. But before going into the proof, we introduce
the important notion of parse trees.
De�nition 4.6. The set of parse trees of a circuit C is de�ned by induction on
its size:
• If C is of size 1 it has only one parse tree, itself.
• If the output gate of C is a + gate whose arguments are the gates α and β,
the parse trees of C are obtained by taking either a parse tree of Cα and the
arrow from α to the output or a parse tree of Cβ and the arrow from β to the
output.
• If the output gate of C is a × gate whose arguments are the gates α and β,
the parse trees of C are obtained by taking a parse trees of Cα and a parse
tree of a disjoint copy of Cβ and the arrows from α and β to the output.
Every parse tree can be associated with a monomial, that is the product of
labels of leaves of the parse tree. Let m(T ) denote the monomial associated with
the parse tree T. It is reasonable to think that maybe the polynomial computed
by the circuit is equal to the sum of the associated monomials of parse trees of the
circuit; and indeed it is true. Let pt(C) = {T | T is a parse tree of the circuit C}.
Lemma 4.7. Let C be a circuit computing the polynomial p. Then p(x) =∑
T∈pt(C)m(T ).
Proof. The proof is by induction on the size of the circuit C. If the size of the
circuit is 1, then clearly the lemma holds. Suppose now that the lemma holds for
all circuits of size at most s− 1.
Let C be a circuit of size s. Based on the output gate there are two cases to
consider. Let α be the output gate of C, and β and γ be its children.
41
Chapter 4. VNP
Case 1: α is a +-gate. By de�nition of parse tree, we know that a parse tree
of C is obtained from a parse tree of Cβ or Cγ by adding the edge (β, α) or (γ, α),
respectively. Let pβ and pγ be the polynomials computed at β and γ respectively.
Hence, applying induction hypothesis on Cβ and Cγ we get
p(x) = pβ(x) + pγ(x) =∑
T∈pt(Cβ)
m(T ) +∑
T ′∈pt(Cγ)
m(T ′)
Therefore,
p(x) =∑
T∈pt(C)
m(T )
Case 2: α is a ×-gate. Again from the de�nition of parse trees and applying
induction hypothesis on Cβ and Cγ, we have
p(x) = pβ(x) · pγ(x) =
∑T∈pt(Cβ)
m(T )
· ∑T ′∈pt(Cγ)
m(T ′)
=∑
T∈pt(C)
m(T )
A graph G′ = (V ′, E ′) is called a subgraph of G = (V,E) if V ′ ⊆ V and E ′ ⊆ E.
Lemma 4.8. A circuit C is MD if and only if every parse tree of C is a subgraph
of C.
Proof. (⇒ direction) Let C be a MD circuit. Since the multiplication gates are
disjoint and at an addition gate the parse tree follows only one edge, clearly a parse
tree obtained from a MD circuit is a subgraph of C.
(⇐ direction) We will prove the contrapositive, that is, If a circuit C is not
MD then there exist a parse tree which is not a subgraph of C. Since C is not
MD, there exist a multiplication gate in C that is not disjoint. Let us call this
multiplication gate α and its children β and γ. Let δ be the node common to both
Cβ and Cγ. Construct the following tree, a path from output gate to α and then,
a path from α to δ via β and a path from α to δ via γ (duplicate δ). Extend this
tree to a parse tree of C. This parse tree is not a subgraph of C because C has
only one copy of δ whereas the parse tree has two copies of δ.
Now we have all the ideas needed to prove that VNPe equals VNP.
42
Chapter 4. VNP
Theorem 4.9 ([Val82, MP08]). Over any �eld, VNPe = VNP.
Proof. From the de�nitions it follow that VNPe ⊆ VNP. We need to prove the
reverse containment. It is easy to see that the inclusion VP ⊆ VNPe implies
VNP ⊆ VNPe. It therefore su�ces to show VP ⊆ VNPe. From Theorem 3.10 and
de�nition of VNPe we need to express the polynomial computed by a MD circuit
as a sum of formulas.
Let (fn) be a polynomial sequence in VP and (Cn) be a sequence of MD circuits
representing (fn). We are aiming to get the following expression,
fn =∑
T is a subgraph of Cn
[T is a parse tree] ·m(T )
where [·] is a 0-1 predicate.
Since Cn is MD, no multiplication gate receives both of its inputs from the same
gate. We would like that the same property holds for addition gates and to achieve
this we will add an addition gate with one input label 0. The modi�ed circuit is also
denoted by Cn. Let us label the gates of Cn with the number from 1 to s. De�ne I =
{i | i is a label of an input gate}, M = {i | i is a label of a multiplication gate}and A = {i | i is a label of an addition gate}. Clearly I,M and A partition the
set [s]. Let us suppose that s is the label of the output gate of Cn. Let zi denote
the variable or constant for the input gate labelled i. We shall encode a parse tree
T by variables ei,j, 1 ≤ i, j ≤ s and vi, 1 ≤ i ≤ s. De�ne ei,j = 1 if the edge
(i, j) ∈ Cn and (i, j) ∈ T , and 0 otherwise. Similarly, vi = 1 if the vertex labelled
i belongs to T and 0 otherwise. Let e = 〈ei,j〉 ∈ {0, 1}s×s and v = 〈vi〉 ∈ {0, 1}s.Let us now construct a predicate that checks whether the T de�ned by e and
v is indeed a parse tree of Cn. Consider the following polynomials, each de�ned to
meet one of the requirements in the de�nition of a parse tree of a circuit.
1. To ensure that T contains the output gate, vs
2. To ensure that for any multiplication gate in T , both its children are also in
T , ∏i∈M and j,k such that
(j,i)∈Cn and (k,i)∈Cn
(vi · ej,i · ek,i + (1− vi))
43
Chapter 4. VNP
3. To ensure that for any addition gate in T , exactly one of its children is in T ,∏i∈A and j,k such that
(j,i)∈Cn and (k,i)∈Cn
(vi · [ej,i(1− ek,i) + (1− ej,i)ek,i] + (1− vi))
4. To ensure that if an edge is in T then its endpoints should be in T ,∏(i,j)∈Cn
(ei,j · vi · vj + (1− ei,j))
5. To ensure that a gate in T which is not the output gate must sends at least
one arrow toward another gate in T ,
∏1≤i<s
vi ·1−
∏j such that
(i,j)∈Cn
(1− ei,j)
+ (1− vi)
It is easy to verify that any e ∈ {0, 1}s×s and v ∈ {0, 1}s satisfying conditions
(1)− (5) indeed encodes a parse tree of Cn. Let gn(e, v) be the product of polyno-
mials in (1) − (5). Clearly, gn(e, v) = 1 if e and v encodes a parse tree of Cn and
0 otherwise. Also, it is easy to see that gn(e, v) ∈ VPe. Therefore, we have shown
fn =∑
e∈{0,1}s×s
∑v∈{0,1}s
gn(e, v) ·∏i∈I
(vi · zi + (1− vi))
4.2 Universality and Completeness of the Perma-
nent
In Chapter 2 we saw the universality lemma, Lemma 2.9, of the determinant. The
aim of this section is to obtain a similar universality lemma for the permanent and
using that give a proof of the VNP-completeness of the permanent family.
44
Chapter 4. VNP
Lemma 4.10. If p is a polynomial computable by a formula F of size n, then p is
a projection of PERn. That is, p = per(A), where A is a (n×n)-matrix. Moreover,
we can assume that A has at most n entries di�erent from 1.
Proof. Let G′ be the algebraic branching program from Lemma 2.14. We build a
graph G by identifying the vertices s and t and adding a loop of weight 1 to all
nodes except s ≡ t. Clearly, |G| = |G′| − 1 ≤ n. Since G′ is acyclic, there exists
a bijective correspondence between cycle covers of G and s-t paths of G′. Extend
a path to cycle cover by including self loops at all vertices not on path. Also, the
weight of a cycle cover of G is equal to the weight of the corresponding s-t path in
G′. Let A be the weighted adjacency matrix of G. We therefore obtain p = per(A)
and by construction, A has at most n entries di�erent from 1.
Theorem 4.11 ([Bür00]). Let us assume that the underlying �eld has character-
istic di�erent from 2. Let
f(X) =∑
Y ∈{0,1}mg(X, Y )
where g(X, Y ) has a formula of size s. Then there exists a directed graph G of size
at most 6s such that f = per(A), where A is the adjacency matrix of G. In other
words, f is a projection of PER6s.
Assuming the above theorem, let us see the proof of completeness.
Theorem 4.12 ([Val79, Val82]). PERn is VNP-complete over any �eld of charac-
teristic 6= 2.
Proof. From Lemma 4.2 we know that PERn ∈ VNP. For hardness, let f = (fn)
be a sequence in VNP. Using Theorem 4.9 and then Theorem 4.11, we have fn is
a p-projection of PER.
But before we go into the proof of Theorem 4.11, let us see two gadget con-
structions that we need for the proof.
Suppose we have an edge-weighted directed graph G with distinguished edges
c = (u, v) and c′ = (u′, v′). We assume that u, v, u′, v′ are pairwise distinct. We
insert between c and c′ an auxiliary directed graph K according to Figure 4.1. In
words, we introduce two additional nodes p1 and p2 on c, and one additional node
45
Chapter 4. VNP
p3
u′ v′
u v
p1 p2
c′− c′+w(c′)
c+c−
w(c)
1/2
−1/2
−1
−1/2
1
1
1
1
1
1
1
Figure 4.1: Graph K; i�-coupling of edges c = (u, v) and c′ = (u′, v′)
p3 on c′. Edge weights between the nodes pi are given according to the following
matrix.
K =
−1 1 12
1 1 −12
1 1 −12
The edge c− = (u, p1) is given the weight w(c) and the edge c+ = (p2, v) is of
weight 1. Similarly, c′− = (u′, p3) has the weight w(c′) and c′+ = (p3, v′) is of weight
1. The resulting digraph is denoted by G. Let us call this gadget i�-coupling of
the edges c and c′.
Lemma 4.13 ([Bür00]). The permanent of A, where A is the weighted adjacency
matrix of G, equals the sum of the weights of all those cycle covers of G, which
contain either both of the edges c and c′, or none.
Proof. For S ⊆ C = {c−, c+, c′−, c
′+}, let CCG(S) denote the set of all cycle covers of
G which, among the edges in C, contain exactly the edges in S. An easy inspection
tells us that there are at most 6 possibilities for S with nonempty CCG(S). They
are,
S1 = {c−, c+}, S2 = {c′−, c′+}, S3 = {c−, c′+}, S4 = {c′−, c+}, S5 = ∅, S6 = C
For 1 ≤ i ≤ 6, letWi denote the sum of the weights of the cycle covers in CCG(Si).
Then we have
per(A) = W1 + . . .+W6
46
Chapter 4. VNP
We will show that W1 = W2 = · · · = W4 = 0. We will prove it for W1 = 0
and the rest follows essentially from the same argument. Each cycle cover σ =
〈β1, β2, . . . , βj〉 of G containing c, but not c′, can be extended to exactly two cycles
covers σ1, σ2 in CCG(S1). Let βi be the cycle in σ containing the edge c. Let β′i be
obtained from βi by removing the edge c and adding the path c− − (p1, p2) − c+.
Then
σ1 = 〈β1, . . . , βi−1, β′i, . . . , βk, (p3, p3)〉
and has weight −12w(σ). Let β′′i be obtained from βi by removing the edge c and
adding the path c− − (p1, p3)− (p3, p2)− c+. Then
σ2 = 〈β1, . . . , βi−1, β′′i , βi+1, . . . , βj〉
and has weight 12w(σ). Also, all cycle covers in CCG(S1) are obtained in this way.
Therefore, we have W1 = 0.
It is easily seen that W5 is the sum of weights of all cycle covers of G that
neither contain c nor c′, and W6 is the sum of the weights of all cycle covers of G
which contain both c and c′. Thus, we have established the lemma.
Let us now move to the second construction. The graph is constructed as
follows. We start with a directed cycle of length `, consisting of the nodes u1, . . . , u`
and the connector edges ci = (ui, ui+1), for 1 ≤ i < `, and c` = (u`, u1). Let us
add new nodes v1, . . . , v` and edges (ui, vi), (vi, ui+1), for 1 ≤ i < `, and (u`, v`)
and (v`, u1). Finally, let us add loops (ui, ui) and (vi, vi) to all nodes. Let us call
the resulting digraph the rosettes, denoted by R(`). All edges of R(`) have weight
1. We denote by C = {c1, c2, . . . , c`} the set of connector edges of R(`). Figure 4.2
shows the rosette R(4). We will state without proof two easily veri�able properties
of the rosette R(`).
P1: For each ∅ 6= S ⊆ C, there exists exactly one cycle cover of R(`), which,
among the connector edges, contains exactly the edges in S.
P2: There are exactly two cycle covers of R(`), that contain no connector
edges. One of them consists of loops only, called the loop covering of R(`), and
the other is the single cycle 〈u1, v1, u2, . . . , u`, v`, u1〉.Having built all the preliminaries needed to prove the VNP-completeness of the
permanent, let us now see the proof.
47
Chapter 4. VNP
v1
u2
v2
u3
v4
u1
v3
u4
c4 c2
c1
c3
Figure 4.2: The Rosette R(4)
Proof of Theorem 4.11: By Lemma 4.10, there exist a digraph G and its
weighted adjacency matrix, A, such that g(X, Y ) = per(A). Also, |G| ≤ s. Let
X = {X1, X2, . . . , Xn} and Y = {Y1, . . . , Ym}. For 1 ≤ i ≤ m, let di,1, . . . , di,`i be
the edges ofG carrying the weight Yi. Again by Lemma 4.10, we have `1+· · ·+`m ≤s. Without loss of generality we will assume that `i > 0 for all i.
Let us now form a graph G′, which is the disjoint union of G and R(`i) for
1 ≤ i ≤ m. The connector edges of R(`i) are denoted by ci,j for 1 ≤ j ≤ `i. The
edges in G′ inherit edge weights from G and the rosettes, except the edges di,j, for
all i, j, which have weight 1.
Let G′ result from G′ by i�-couplings between ci,j and di,j, for all i, j. Let
ΦG′ denote the set of cycle covers of G′, such that for each i, j these cycle covers
contain either both the edges ci,j and di,j or neither. Let wG′(φ) denote the weight
of a cycle cover φ of G′. By Lemma 4.13 we have per(A′) =∑
φ∈ΦG′wG′(φ).
Moreover, |G′| ≤ |G| + 2∑m
i=1 `i + 3∑m
i=1 `i ≤ 6s. Suppose we can prove that
f(X) =∑
φ∈ΦG′wG′(φ), then G′ is the required digraph in Theorem 4.11. Hence,
it su�ces to prove the following claim.
Claim 4.14. f(X) =∑
φ∈ΦG′wG′(φ)
Proof. Let Γ be the set of cycle covers of G and CG′ be the set of cycle covers ofG′. A cycle cover σ ∈ CG′ restricted to G and R(`i) yields cycle covers γ = σ|G of
48
Chapter 4. VNP
G and σ|R(`i) of R(`i), respectively. For σ ∈ CG′ , de�ne
J(σ) = {i ∈ [m] | σ|R(`i) is the loop covering of R(`i)}
and for γ ∈ Γ de�ne
I(γ) = {i ∈ [m] | ∃j such that γ contains edge di,j}
We claim that the mapping φ 7→ (φ|G, J(φ)) from ΦG′ to the set of pairs (γ, J),
where γ ∈ Γ and J ⊆ [m] is disjoint to I(γ), is a bijection. Let φ ∈ ΦG′ and
γ = φ|G. If i ∈ I(γ) then φ contains ci,j, and this implies φ|R(`i) is not the loop
covering of R(`i). So, i /∈ J(φ). Thus for all φ ∈ ΦG′ , J(φ) and I(φ|G) are disjoint.
Conversely, suppose that (γ, J) be such that γ ∈ Γ and J ⊆ [m] is disjoint to
I(γ). Now if i ∈ I(γ), then an extension of γ to a cover in ΦG′ must contain some
connector edge ci,j. By P1 of rosettes the extension to the rosette R(`i) is uniquely
determined. Otherwise i /∈ I(γ), then by P2 of rosettes there are two extensions
to R(`i) but at this point J makes the choice unique. Hence, we have established
the bijection.
Given a subset J ⊆ [m], let us de�ne a weight function wJG on G. The edges
di,j get the weight 0 if i ∈ J , and 1 if i /∈ J . All other edges get the same weight
as in G. It is easy to verify that for γ ∈ Γ and J ⊆ [m], if I(γ) is not disjoint from
J , then there exists i ∈ I(γ) ∩ J and hence wJG(di,j) = 0 implying wJG(γ) = 0. For
a vector y ∈ {0, 1}m associate a set Jy, such that yi = 0 i� i ∈ Jy.Since g(X, Y ) = per(A) =
∑γ∈ΓwG(γ), we have for y ∈ {0, 1}m
g(X, y) =∑γ∈Γ
wJyG (γ)
Therefore,
f(X) =∑
y∈{0,1}mg(X, y) =
∑J⊆[m]
∑γ∈Γ
wJG(γ) =∑γ∈Γ
∑J⊆[m]
wJG(γ)
49
Chapter 4. VNP
By the above observation, we have
f(X) =∑γ∈Γ
∑J⊆[m]
J∩I(γ)=∅
wJG(γ)
Now recall the bijection between φ ∈ ΦG′ and pairs (γ, J), such that γ ∈ Γ and
J ∩ I(γ) = ∅. Also, if φ ∈ ΦG′ , then wJ(φ)G (φ|G) = wG′(φ). Hence,
f(X) =∑γ∈Γ
∑J⊆[m]
J∩I(γ)=∅
wJG(γ) =∑φ∈ΦG′
wJ(φ)G (φ|G) =
∑φ∈ΦG′
wG′(φ)
This concludes the proof.
4.3 Characterizing uniform VNP
In the previous sections and chapters, we have put restrictions on the size and
degree of the circuits and studied them. The goal of this section is to study the
expressive power of circuits of polynomial depth and polynomially bounded degree.
Note that there is no restriction on size, but polynomial bound on depth implies
that the size is at most exponential.
Proposition 4.15. Let (fn) ∈ VNP. Then there exists a sequence of circuits (Cn)
of polynomially bounded depth and degree, such that Cn computes fn.
Proof. There exists gn(X, Y ) ∈ VP, such that
fn(X) =∑
Y ∈{0,1}p(|X|)gn(X, Y )
Since (gn) ∈ VP, there exists a sequence of circuits (Gn) of polynomial size and
degree, and therefore polynomial depth and degree, such that Gn computes gn.
The circuit Cn for fn is constructed as follows. First build a complete binary tree
of depth p(|X|). Internal nodes of this tree are +-gates and the root is the output
gate. Each leaf ` in the tree can be identi�ed with a vector in {0, 1}p(|X|). To
50
Chapter 4. VNP
each leaf ` in the tree attach the circuit Gn(X, Y`), where Y` is the 0-1 vector
corresponding to `. Clearly, Cn computes fn.
Proposition 4.15 shows that circuits of polynomial depth and degree are at
least as powerful as VNP. This raises the question about the converse of Proposi-
tion 4.15. And in fact, [MP08] addresses this question and gets a characterization
for a uniform version of VNP.
Henceforth, the depth of a circuit is the number of nodes on a maximum length
path from an input gate to the output gate.
Lemma 4.16. If C is a circuit of depth m and degree d, then any parse tree of C
is of size less than md.
Proof. The proof is by induction on the depth.
Let us now introduce the notion of uniformity of circuits. The most natural
de�nition requires that an encoding of the circuit Cn is produced by a deterministic
Turing machine in polynomial time given 1n as input. We will use admissible
encoding scheme for circuits de�ned in [Vol99]. For the uniformity we will require
that either the circuits use constants from the set {−1, 0, 1} or they use a �xed
and �nite set of constants. But the set of constants may depend on the sequence
of circuits.
De�nition 4.17. A sequence of circuits (Cn) is called P -uniform i� there exists a
deterministic Turing machine that produces an encoding of Cn in polynomial time
upon input 1n.
De�nition 4.18. A sequence of polynomials is in the class VPu i� it is represented
by a P -uniform sequence of circuits of polynomial size and degree.
De�nition 4.19. A sequence of polynomials (fn) belongs to VNPu i� there exists
a polynomial p and a sequence gn ∈ VPu, such that
fn(X) =∑
Y ∈{0,1}p(|X|)gn(X, Y )
The P -uniformity condition is de�ned in terms of computation of a function,
that is 1n 7→ Cn. It is not useful if the circuit size is not polynomially bounded.
51
Chapter 4. VNP
Next, we will see a uniformity condition that is de�ned in terms of acceptance of
a set and it helps us to characterize the class VNPu.
De�ne the direct connection language of a sequence of circuits Cn as the set of
strings of the form 〈1n, g, y, p〉 such that (i) g is an addition gate in Cn and y is an
input of g, or (ii) g is a multiplication gate in Cn and y is a left or right input of
g depending on p ∈ {0, 1}, or (iii) g is a gate name in Cn and y is the type/label
of g.
De�nition 4.20. A sequence of circuits (Cn) is DLOGTIME-uniform i� its di-
rect connection language can be recognized by a deterministic Turing machine in
time logarithmic in the size of the circuits.
Theorem 4.21 ([MP08]). A sequence of polynomials (fn) belongs to the class
VNPu i� it can be represented by a DLOGTIME-uniform sequence of circuits
(Cn) of polynomial depth, degree and the number of variables.
Proof. (⇒ direction) Let (fn) ∈ VNPu. Then there exists a sequence (gn) ∈ VPu
such that fn(X) =∑
Y ∈{0,1}p(|X|) gn(X, Y ). Since (gn) ∈ VPu, there exist a P -
uniform sequence of circuits (Gn) of polynomial size and degree representing (gn).
Let the deterministic Turing machine producing the encoding of Gn takes time
r(n), where r(n) is polynomial in n. Then clearly r(n) dominates the size of the
circuit Gn and hence, p(|X|). We now build a sequence of circuits (Cn) representing
(fn). First construct a complete binary tree of depth r(n). Internal nodes of this
tree are +-gates and the root is the output gate. Each leaf ` in the tree can be
identi�ed with a vector in {0, 1}r(n). To each leaf ` in the tree attach a circuit as
follows. If ` is labelled by a string of the form 0r(n)−p(|X|)v, where v ∈ {0, 1}p(|X|),then attach the circuit Gn(X, v) at `, otherwise label the leaf ` by the constant
0. Clearly, Cn computes fn and is of polynomial depth and degree. Let us now
give an encoding of Cn. Each gate in the addition tree is encoded by a sequence of
0-1 vector representing the path from the output gate to that node. Each gate in
Gn(X, v) is encoded by giving both its encoding in Gn and the index 0r(n)−p(|X|)v.
We claim that the direct connection language of Cn can be recognized by a
deterministic Turing machine running in time logarithmic in the size of Cn. The
deterministic machine will use n to build the circuitGn in r(n) time. Now to answer
queries about gates in Gn(X, v) it uses the string 0r(n)−p(|X|)v and the encoding of
52
Chapter 4. VNP
Gn computed at the start. Also, the queries about gates in the addition tree can
easily be answered using their encodings. Since the machine runs in O(r(n)) time,
the run-time of the machine is logarithmic in the size of the circuit Cn.
(⇐ direction) The construction follows in several stages. We will discuss them
one by one. Let (Cn) be a DLOGTIME-uniform sequence of circuits with depth,
degree and the number of variables bounded by a polynomial in n. Let fn be the
polynomial computed by Cn. Let the number of variables be m(n).
From circuits to formulas: By duplicating gates we �rst transform the
circuit Cn into a formula Fn of polynomial depth and degree. The gates in the
formula Fn are encoded as they were in the circuit Cn, but pre�xed with the 0-1
path from the output gate to the gate in consideration. Since the depth of the
formula is polynomial, the encodings of the gates are of polynomial length. Now
we claim that the direct connection language of the formula Fn is recognizable in
time polynomial in n. Roughly, the machine starts by checking that the path does
exist and that it leads to the gate being considered by querying the DLOGTIME-
machine for Cn. Then it checks the type of the gate or its connection with other
gates using the same DLOGTIME-machine. Clearly, the run time of the new
machine is bounded by the depth of the formula Fn and hence, the machine runs
in polynomial in n time. Let UF be the uniformity machine for Fn.
From Lemma 4.7 we have
fn(x) =∑t
[t encodes a parse tree T of Fn] ·m(T )
where [·] is a 0-1 predicate that checks whether t encodes a parse tree of Fn and
m(T ) is the monomial associated with the parse tree T . We will assume that the
set of variables, say X, and constants, say K, is ordered. Note that the size of
X ∪K is at most m(n) + k, where k, a �xed constant, is the size of K.Checking parse trees: Consider now the sequence of formulas (Fn) of poly-
nomial depth and degree constructed in previous stage. Let us encode a parse tree
of a formula as a list of the gates in the parse tree satisfying the condition that
the gates are listed in lexicographic order (this ensures that a parse tree has a
unique encoding). Let us now construct a Turing machine, M , which given 1n and
a boolean string t, runs in polynomial time and does the following.
53
Chapter 4. VNP
First of all M checks whether t encodes a parse tree of Fn. If it does then M
computes the list of the input gates of the parse tree (we can assume that this list
is also ordered), otherwise it lists an all 0s string. And then, M uses this list to
�nd the labels of the input gates in the list. Finally, using these labels, M outputs
a list of indices in X ∪K corresponding to the list of labels of the input gates if t
encodes a parse tree, otherwise M outputs all 0s string. Basically, the steps of M
are as follows and all the steps use the uniformity machine UF for Fn.
• Check that the output gate is in the list t.
• Check that for a multiplication gate in t both its children also appear in t
• Check that for an addition gate in t exactly one child appears in t.
• Check that each gate in t, except the output gate, has fan-out at least 1 in t.
• Check the ordering of the gates.
• Compute the list of input gates of the parse tree encoded by t.
• Find the labels of the input gates in the list.
• Outputs the list of indices of these labels in the set X ∪ K. Note that the
list of indices may have multiple entries of a single index.
By Lemma 4.16 the parse tree is of polynomial size. The size of the set X ∪ Kis polynomially bounded. Further, the direct connection language is recognizable
in polynomial time. Hence M runs in time polynomial in n. So, now we have a
deterministic Turing machine that outputs the list of indices. Let the output list
of M be denoted by I = 〈i1, i2, . . . , iL〉, where L is the maximum number of input
gates that any parse tree of Fn have. Also, note that ij's are binary strings of the
same size and let this size be s. From this we would like to get the variables or
constants corresponding to these indices.
Building Boolean circuits: Using the deterministic Turing machineM , con-
structed in previous stage, we can build a P -uniform sequence of poly-sized boolean
circuits (with multiple outputs) Dn(t), which outputs the list I. One can note that
this boolean circuit can be simulated by an arithmetic circuit, but the degree may
54
Chapter 4. VNP
not be polynomially bounded. To handle this we �rst do a depth reduction of the
circuit Dn using auxiliary variables.
For each gate α in the circuit Dn, we add a new variable yα. Let us now
construct a set Φ of formulas, in variables y and t, as follows.
• If α is an input gate, add yα = (input bit of α) to Φ. Note that the input
bit of α is a bit of t.
• If α is a conjunction of gates β and γ, add yα = yβ ∧ yγ to Φ.
• If α is a disjunction of gates β and γ, add yα = yβ ∨ yγ to Φ.
Observe that given a boolean setting to the variables in t, there is only one
possible value for the variables in y such that all the formulas in Φ are satis�ed,
and that is the value of the associated gates in Dn. Let us now build a new boolean
circuit D′n(t, y) which outputs the list I if t encodes a parse tree of Fn and y is
a correct proof for t, and 0 otherwise. First compute, in parallel, the value of all
the formulas in Φ. Then compute their conjunction by a tree of conjunctions of
logarithmic depth (since |Φ| is polynomial). Let ρ be the root of the conjunction
tree. Finally, for every output gate α in Dn, add a new output gate which is the
conjunction of ρ and yα. Thus we have constructed a boolean circuit D′n(t, y) of
logarithmic depth such that for any boolean string t, there is exactly one boolean
string y for which the output list the indices of labels of input gates of the parse
tree encoded by t, otherwise it outputs 0.
Constructing Arithmetic circuits: Let us now simulate the boolean circuit
D′n by an arithmetic circuit A′n. This simulation is such that on boolean inputs,
the outputs of A′n and D′n are the same. The degree of A′n is polynomially bounded
because the depth of D′n is logarithmic. So, now
fn(x) =∑t
∑y
V(A′n(t, y))
where V(A′n(t, y)) is the product of the variables or constants corresponding to the
indices in the list I if I is not an all 0s string, and 0 otherwise. Now we will show
how to compute V(A′n(t, y)). Let L(i) denote the variable or constant indexed by
an index i in the set X ∪K. Let [i = e] denote a 0-1 predicate that is 1 if and only
55
Chapter 4. VNP
if i is equal to e. Now, it is easy to verify that the following expression computes
V(A′n(t, y)),
(1− [I = 0]) ·L∏j=1
[ij = 0] + (1− [ij = 0]) ·m(n)+k∑e=1
(L(e) · [ij = e])
Clearly, the predicates [·] involved in the above expression can be computed
by a polynomial over polynomially many variables and of polynomial degree. And
therefore, the expression can be computed by a polynomial sized arithmetic circuit
of polynomial degree.
We compose A′n with the arithmetic circuit computing the above expression to
get an arithmetic circuit An. Note that L(i) ∈ X ∪ K. Hence, we have a circuit
An(x, t, y) over polynomially many variables and of polynomial size and degree
such that the following holds,
Cn(x) = fn(x) =∑t
∑y
An(x, t, y)
Also, the above construction shows us that the circuit An can be built by a deter-
ministic Turing machine running in time polynomial in n upon input 1n. Thus the
circuit An is P -uniform.
56
5Cost of computing Integers
In this chapter we study the cost of computing integers using arithmetic opera-
tions from the set {+,−,×} starting from the constants 1 and 2. Although 2 is
obtainable from 1 in one operation, we have included it as a starting number to
simplify proofs.
5.1 Basic de�nitions and simple bounds
A computation of length ` is a sequence 〈n−1, n0, n1, . . . , n`〉 of instructions suchthat n−1 = 1, n0 = 2 and for each k, 1 ≤ k ≤ `, there exist integers −1 ≤ i, j < k
and ◦ ∈ {+,−,×} such that nk = ni ◦ nj. It is easy to see that each instruction
computes an integer. Let us denote the integer computed by an instruction nk as
I(nk). It is de�ned recursively, that is, if nk = ni ◦ nj then I(nk) = I(ni) ◦ I(nj).
We say that a computation of length ` computes an integer n if I(n`) = n.
Let τ : N → N be the function that associates to each number n the length of
a shortest computation of n. Observe that τ(1) = τ(2) = 0.
Let us have a look at few examples.
Example 5.1. For n ∈ N, τ(22n) ≤ n. This is witnessed by the computation
sequence 〈1, 2, 221, 222
, . . . , 22n〉. For 1 ≤ k ≤ `, each instruction is nk = nk−1 ×nk−1.
Example 5.2. For n ∈ N, τ(2n) ≤ 2blog nc. Let n = 2jk + · · · + 2j1, where
blog nc ≥ jk > · · · > j1 ≥ 0. The sequence
〈1, 2, 221
, 222
, . . . , 22jk , 22j1 × 22j2 , . . . , 22j1+2j2+···+2jk 〉
57
Chapter 5. Cost of computing Integers
is a computation sequence for 2n. Clearly, τ(2n) ≤ jk + k − 1 ≤ blog nc+ blog nc.
Example 5.3. For n ∈ N, τ(n!) ≤ 2n − 4. Consider the following computation
sequence
〈1, 2, 3, 4, . . . , n, 2 · 3, 2 · 3 · 4, . . . , 2 · 3 · · ·n〉
Hence, we have τ(n!) ≤ n− 2 + n− 2 = 2(n− 2).
Lemma 5.4 ([MS96]). For n ∈ N, log log(n) ≤ τ(n) ≤ 2blog(n)c − 1.
Proof. Lower bound: Let τ(n) = k. Then there exists a computation 〈n−1, n0, n1, . . . , nk =
n〉 of length k. Now consider the computation 〈m−1,m0,m1, . . . ,mk〉 of length k,where mi = mi−1×mi−1, 1 ≤ i ≤ k. Note that m1 = 22 and n1 ≤ 22. By induction
we have ni ≤ mi for all i ≤ k and mk = 22k . In particular,
n = nk ≤ mk = 22k
Therefore, we have
log log(n) ≤ k = τ(n)
Upper bound: Let the binary expansion of n be, n = 2jk + · · · + 2j1 , where
blog nc ≥ jk > · · · > j1 ≥ 0. Now consider the following computation sequence
〈1, 2, 22, 23, 24, . . . , 2jk , 2j1 + 2j2 , . . . , 2j1 + 2j2 + . . .+ 2jk = n〉
Therefore, we get τ(n) ≤ jk−1+k−1 ≤ blog(n)c−1+blog(n)c = 2blog(n)c−1.
As a corollary we are able to derive the exact τ complexity of the sequence
(22n).
Corollary 5.5. τ(22n) = n
Proof. n ≤ τ(22n) follows from Lemma 5.4 and Example 5.1 shows τ(22n) ≤ n.
Let us now obtain a simple bound on the τ complexity of an integer sequence
if it is sandwiched between two other sequences.
Proposition 5.6. Let (an), (bn) and (cn) be sequences of integers such that for all
n,
an ≤ bn ≤ an + cn.
58
Chapter 5. Cost of computing Integers
Then τ(bn) ≤ τ(an) + 2blog cnc.
Proof. Since an ≤ bn ≤ an + cn, there exists a non-negative integer k ≤ cn such
that bn = an + k. Clearly, τ(bn) ≤ τ(an) + τ(k) + 1. Because of Lemma 5.4 we
have τ(k) ≤ 2blog kc− 1 ≤ 2blog cnc− 1. Therefore, τ(bn) ≤ τ(an) + 2blog cnc.
From complexity theoretic viewpoint we would like to classify sequences of
integers in broadly two classes, those that are �e�ciently� computable and those
that are not. A natural de�nition for e�ciency would be, given n in binary the
n-th element of the sequence is computable by a computation sequence of poly-
logarithmic length. We formalize this notion below.
De�nition 5.7. A sequence (xn) of integers is said to be easy to compute if and
only if there exists a polynomial p such that τ(xn) ≤ p(log n) for all n ≥ 1.
If a sequence is not easy to compute then it is called hard to compute. Exam-
ple 5.2 shows that the sequence (2n) is easy to compute. Similarly, Corollary 5.5
implies that the sequence (22n) is hard to compute. It is not known whether (n!)
is easy to compute but it seems very plausible that (n!) is hard to compute.
The lower bound on τ complexity for integers are reminiscent of Shannon's
lower bound on the circuit size of boolean functions. [MS96] shows that for every
ε > 0, almost all integers satisfy the property:
τ(n) ≥ log n
(log log n)1+ε
[Mor97] shows the current best known lower bound, that is
τ(n) ≥ log n
log log n
which holds again for almost all integers. We can conclude that almost all integers
have a high τ complexity, but proving good lower bounds for speci�c sequences
seems to be quite challenging. In the next section we will explain this behaviour,
to some extent, by showing that for some sequences proving good lower bounds
on τ complexity would either imply a separation of classes in algebraic complexity
theory or lead to lower bounds for the circuit size of the permanent family.
59
Chapter 5. Cost of computing Integers
5.2 Connection to Valiant's Theory
In this section we will explore some e�ect of hypotheses about Valiant's Classes
on the cost of computing integers.
Valiant's complexity classes are de�ned relative to a given �eld F. The input
gates of the arithmetic circuit are labelled by variables from the set {x1, x2, . . . , xn, . . .}or by the constants from F. Now if we restrict the circuit to receive constants only
from the set {−1, 0, 1}, then the circuit is said to be constant-free.
De�nition 5.8. A sequence (fn) of polynomials belongs to the class VP0 if and only
if there exists a sequence (Cn) of constant-free arithmetic circuits, of polynomially
bounded size and degree, such that Cn computes fn.
The non constant-free-class VP (de�ned in Section 3.1) is easily de�nable in
terms of VP0.
Proposition 5.9. A sequence (gn) of polynomials is in VP if and only if there
exists a sequence (fn) in VP0 such that gn is obtained from fn by replacing some
of the variables by constants from F.
Proof. (⇒ direction) (gn) ∈ VP implies there exists a sequence (Cgn) of circuits of
polynomial size and degree such that Cgn computes gn. Obtain a circuit C
fn from Cg
n
as follows: If an input gate is labelled by a constant from F\{−1, 0, 1} then relabel
this input gate as a new variable yi. Clearly, Cfn ∈ VP0. Let fn be the polynomial
computed by Cfn . It is easy to see how to obtain gn from fn by replacing some of
the variables by constants from F.(⇐ direction) Let (fn) in VP0 via a sequence of circuits (Cf
n). Replacing vari-
ables in Cfn by constants in F exactly as done to obtain gn from fn gives a circuit C
gn
computing gn. Clearly the circuit Cgn is of polynomially bounded size and degree.
Hence, (gn) belongs to VP.
De�nition 5.10. A sequence (fn(x1, x2, . . . , xu(n))) belongs to VNP0 if and only if
there exists a sequence (gn(x1, . . . , xu(n), y1, . . . , yv(n))) ∈ VP0 such that
fn(x1, . . . , xu(n)) =∑
y∈{0,1}v(n)
gn(x1, . . . , xu(n), y)
60
Chapter 5. Cost of computing Integers
Let us now discuss a criterion that is useful in recognizing VNP0 families of
polynomials.
Theorem 5.11 (Valiant's criterion, [Val79, Bür00, Koi05]). Let n 7→ p(n) be a
polynomially bounded function, and f : N×N be such that the map 1n0j 7→ f(j, n)
is in ]P/poly. Then the family (fn) of polynomials de�ned below is in VNP0.
fn(X1, X2, . . . , Xp(n)) =∑
j∈{0,1}p(n)
f(j, n)Xj11 X
j22 · · ·X
jp(n)
p(n)
Observe that in the above theorem j has been used to denote a binary string
as well as the natural number that the binary string represents. We will continue
to overuse j but it should be clear from the context.
We will defer the proof of the theorem for a while. Meanwhile, we will see
some consequences of the theorem and discuss a few sequences that have their τ
complexity polynomially bounded under the hypothesis VP0 = VNP0.
Lemma 5.12 ([Koi05]). Let (an) be an integer sequence such that for some integer
b and some polynomially bounded function p(n),
an =2p(n)−1∑j=0
f(j, n)bj
where the map 1n0j 7→ f(j, n) is in ]P/poly. If VP0 = VNP0 then τ(an) is polyno-
mially bounded.
Proof. De�ne
gn(X1, . . . , Xp(n)) =∑
j∈{0,1}p(n)
f(j, n)Xj11 · · ·X
jp(n)
p(n)
By Theorem 5.11, (gn) ∈ VNP0. By the assumption VP0 = VNP0, (gn) ∈ VP0.
Setting Xi = b2i−1in gn, we get an. Therefore, τ(an) is polynomially bounded.
Corollary 5.13 ([Koi05]). Let bn =∑2n
k=1 2k2−1. If VP0 = VNP0 then τ(bn) is
polynomially bounded.
Proof. In Lemma 5.12 set b = 2, p(n) = 2n and f(j, n) = 1 if j ≤ 22n − 1 and j
is of the form k2 − 1, otherwise f(j, n) = 0. Clearly, bn = an. We claim that the
61
Chapter 5. Cost of computing Integers
map 1n0j 7→ f(j, n) is polynomial time computable. Since j is given in binary,
j ≤ 22n − 1 can be checked by just counting the number of bits of j and to check
if j is of the form k2 − 1 we perform binary search in [2n] looking for a k such
that j + 1 = k2. Thus, the map 1n0j 7→ f(j, n) is in ]P. The result follows from
Lemma 5.12.
Theorem 5.14 ([Koi05]). Let `n = b22n ln 2c. If VP0 = VNP0, then τ(`n) is
polynomially bounded.
Proof. We know ln 11−x =
∑∞k=1
xk
k, for |x| < 1. Now setting x = 1/2, we get
ln 2 =∑∞
k=11k2k
. This implies,
2n∑k=1
22n−k
k≤ 22n ln 2 ≤
(2n∑k=1
22n−k
k
)+ 1
2n∑k=1
⌊22n−k
k
⌋≤
⌊2n∑k=1
22n−k
k
⌋≤ b22n ln 2c ≤
⌊2n∑k=1
22n−k
k
⌋+1 ≤ 1+
2n∑k=1
(⌊22n−k
k
⌋+ 1
)Let an =
∑2n
k=1b22n−k
kc. Therefore, we have
an ≤ `n ≤ an + 2n + 1
Proposition 5.6 suggests that it is su�cient to show τ(an) is polynomially bounded.
We will therefore show a polynomial bound for τ(an).
Let f(j, n) be the number of indices k ∈ {1, 2, . . . , 2n} such that the bit of weight2j in the binary expansion of b22n−k/kc is 1. Consider the map 1n0j 7→ f(j, n),
where j is in binary. Lemma 5.15 shows that given k, j both in binary and n in
unary one can compute the bit of weight 2j in the binary expansion of b22n−k/kcin deterministic polynomial time. Therefore, the considered map is in ]P. Setting
b = 2 and p(n) = n in Lemma 5.12 we get τ(an) is polynomially bounded.
Lemma 5.15 ([Koi05]). There is a polynomial time algorithm which takes as in-
puts three integers m, s and ` (` ≤ s) and computes the bit of weight 2` in the
binary expansion of b2s/mc.
Proof. We want the bit of weight 2` in 2s/m. This bit is same as the bit of weight
2−1 in 2s−`−1
m. Therefore, this bit is also equal to the bit of weight 2−1 in r/m,
62
Chapter 5. Cost of computing Integers
where r = 2s−`−1 (mod m). To compute r basically we will compute 2s−`−1 and
take (mod m) whenever the intermediate computation becomes larger than m.
Since τ(2s−`−1) ≤ 2 log(s− `− 1), r can be computed in polynomial time. Finally,
the algorithm needs to check whether r/m ≥ 1/2, or r/m < 1/2.
Observe that setting x = 1/3 in the formula ln 11−x =
∑∞k=1
xk
k, we have
ln(3/2) =∑∞
k=11k3k
. Hence, similar results can be obtained for sequence b32n ln(3/2)cand others, like b22n ln(3/4)c, de�ned similarly.
Let us now get back to the proof of Valiant's criterion.
Proof of Theorem 5.11: We will assume that the map 1n0j 7→ f(j, n) is in
]P. The proof is essentially the same for functions in ]P/poly. Let us denote the
map 1n0j 7→ f(j, n), also by f . Since f is in ]P and ]3-CNF-SAT is ]P-complete,
there exists a deterministic polynomial time parsimonious reduction to an instance
φ(y1, y2, . . . , ym(n)) of ]3-SAT, where m(n) is a polynomially bounded function and
φ has polynomially many clauses. This implies f(j, n) = #{y | φ(y) is True}.Therefore, f(j, n) =
∑y φ(y). We will now show how to arithmetize φ(y) as a 0-1
valued polynomial computable in VP0. Recall that a literal is either a variable or
its negation. When working in arithmetic setting, arithmetize a negated literal y
as (1− y). For each clause Ci = li1 ∨ li2 ∨ li3 in φ, where li1 , li2 and li3 are literals
of yi1 , yi2 and yi3 respectively, construct a polynomial gCi in three variables and
degree at most 3 as follows:
gCi(yi1 , yi2 , yi3) =∑
z∈{0,1}3 : z 6=000
lz1i1 · lz2i2· lz3i3 · (1− li1)1−z1 · (1− li2)1−z2 · (1− li3)1−z3
Clearly,
∀(yi1 , yi2 , yi3) ∈ {0, 1}3, gCi(yi1 , yi2 , yi3) =
{1 if Ci True
0 otherwise.
Let Gφ be the product of gCi over all clauses of φ. Thus, we have,
f(j, n) =∑
y∈{0,1}m(n)
Gφ(y)
63
Chapter 5. Cost of computing Integers
Moreover, Gφ(y) belongs to VP0. Now consider the polynomial fn
fn(X1, . . . , Xp(n)) =∑
j∈{0,1}p(n)
f(j, n)Xj11 X
j22 · · ·X
jp(n)
p(n)
=∑
j∈{0,1}p(n)
∑y∈{0,1}m(n)
Gφ(y)
· p(n)∏i=1
(Xiji + 1− ji)
=∑
j∈{0,1}p(n)
∑y∈{0,1}m(n)
Gφ(y) ·p(n)∏i=1
(Xiji + 1− ji)
This shows that fn ∈ VNP0.
5.3 Relaxing the hypothesis VP0 = VNP0
The aim of this section is to discuss how to obtain the same results as in The-
orem 5.14 but under the weaker assumption. The hypothesis VP0 = VNP0 and
the fact PER ∈ VNP0 implies that PER ∈ VP0. But it is not known whether the
converse holds, that is, does PER ∈ VP0 implies VP0 = VNP0? It has been shown
that even the seemingly weaker hypothesis PER ∈ VP0 implies the same results as
in last section.
Theorem 5.16 ([Koi05]). Let `n = b22n ln 2c. If PER ∈ VP0, then τ(`n) is poly-
nomially bounded.
Proof. The proof is the exactly the same as the proof of Theorem 5.14, except the
last line. That is we can not use Lemma 5.12. We need an analogue of Lemma 5.12
and indeed we have one, Lemma 5.17.
Lemma 5.17 ([Koi05]). Let (an) be an integer sequence such that for some integer
b and some polynomially bounded function p(n),
an =2p(n)−1∑j=0
f(j, n)bj
where the map 1n0j 7→ f(j, n) is in ]P/poly. If PER ∈ VP0 then τ(an) is polyno-
mially bounded.
64
Chapter 5. Cost of computing Integers
We shall not deal with the proof of the lemma. However, the proof of this
lemma depends on the following proposition which, also, we state without proof.
Proposition 5.18. If PER ∈ VP0, then for every family (fn) ∈ VNP0, there exists
a polynomially bounded function p(n) such that the family (2p(n)fn) ∈ VP0.
Ultimately easy to compute
For a polynomial f ∈ F[X1, . . . , Xm] over a �eld F, let LF(f) be the minimum
number of arithmetic operations needed to compute f from the variables Xi and
constants in F. Arithmetic operations are from the set {+,−,×,÷}. A sequence
(fn)n∈N of univariate polynomials is called easy to compute if LF(fn) ≤ (log n)O(1),
otherwise it is called hard to compute.
For an integer polynomial f ∈ Z[X1, . . . , Xm], let us de�ne the τ complexity
τ(f) similar to LQ(f), but allowing only the constant 1 and disallowing divisions.
Clearly, LQ(f) ≤ τ(f).
The τ -conjecture made by Shub and Smale [SS95] relates the number of distinct
integer roots of a univariate polynomial f and the τ -complexity of f .
Conjecture 5.19 (τ -conjecture). Let z(f) be the number of distinct integer roots
of a univariate polynomial f ∈ Z[X]. There exists a constant c > 0 such that for
all f ,
z(f) ≤ (1 + τ(f))c
Shub and Smale [SS95] discovered the following connection between the com-
plexity of univariate integer polynomials and the PC 6= NPC hypothesis [BSS89] in
the Blum-Shub-Smale (BSS) model over the complex �eld C. They proved that
the τ -conjecture implies PC 6= NPC. In fact, they showed that if for all nonzero
integers mn , the sequence (mnn!) of multiples of the factorials is hard to compute
then P 6= NP over the complex �eld C, that is PC 6= NPC. Motivated by this
observation let us de�ne a third class of sequences of integers.
De�nition 5.20. A sequence (xn) of integers is said to be �ultimately easy to
compute� if and only if there exists another sequence (an), an ∈ N, such that the
sequence (anxn) is easy to compute.
And therefore, it is natural to conjecture the following.
65
Chapter 5. Cost of computing Integers
Conjecture 5.21. The sequence (n!) is not ultimately easy to compute.
Clearly, if a sequence is easy to compute then it is ultimately easy to compute.
But we do not know whether the converse holds.
Recently a few attempts have been made on this conjecture. Cheng [Che03]
shows a non-trivial upper bound on the cost of computing certain multiples of n!,
but this upper bound falls short of showing that n! is ultimately easy to compute.
We will mention a few more recent results, but without proof.
Theorem 5.22 ([Koi05]). If VP0 = VNP0 and P = PSPACE, then the sequence
(2n!) has polynomially bounded τ complexity, and hence (n!) is ultimately easy to
compute.
Theorem 5.23 ([Koi05]). If PER ∈ VP0 and P = PSPACE, then the sequence (n!)
is easy to compute.
Then, Bürgisser [Bür09] improved on Theorem 5.23.
Theorem 5.24 ([Bür09]). If τ(PERn) is polynomially bounded in n, then the se-
quence (n!) is easy to compute.
66
6Conclusion
In this thesis, we have seen that di�erent algebraic classes can be de�ned via a
hierarchy of circuits of polynomial size, from formulas to weakly skew circuits to
multiplicatively disjoint circuits. We exhibited a characterization of VP and VQP
by MD circuits and weakly skew circuits, respectively. These characterizations
allowed us to obtain simpler proofs of classical results. We studied restrictions
on models of computation like algebraic branching program, skew circuits, weakly
skew circuits and MD circuits. We also showed that they capture the same compu-
tational power when restricted to polynomial size, except multiplicatively disjoint
circuits. This raises important questions about separation of classes VP and VBP,
and the class of polynomials computed by polynomial sized formulas and VP.
We have seen that the determinant family is computable by poly-size algebraic
branching programs. But we do not know whether determinant can be computed
by a formula of polynomial size. Recall the algebraic branching program simulation
of formulas, the directed acyclic graph obtained in Lemma 2.14 is in fact a series-
parallel graph. Hence, the following interesting question is raised. Can a directed
acyclic graph with a source and a sink be transformed into a series-parallel graph
of the same weight but the size remains polynomially bounded?
We saw a very natural de�nition of the class VP and exhibited a sequence of
arithmetic circuits that de�ned a family of polynomials, complete for the class VP
under p-projections. However, there is an irritating aspect about it, the polyno-
mials are de�ned via circuits and hence, are not as natural as the determinant
family or the permanent family. It would be interesting to �nd a natural complete
problem for the class VP.
67
Chapter 6. Conclusion
Towards the end we explored some consequences of the hypothesis VP0 = VNP0
for the cost of computing integers. Several interesting questions are unanswered
here. It would interesting to �nd a proof that the sequences like b2n ln 2c, b22n ln 2cand others de�ned similarly are hard to compute. The hardness proof for some
sequences will imply a separation between constant-free version of Valiant's classes.
68
Bibliography
[BSS89] L. Blum, M. Shub, and S. Smale, On a theory of computation and com-
plexity over the real numbers, Bulletin of the American Mathematical
Society 21 (1989), 1�46.
[Bür00] Peter Bürgisser, Completeness and reduction in algebraic complexity
theory, Algorithms and Computation in Mathematics, vol. 7, Springer,
2000.
[Bür09] , On de�ning integers and proving arithmetic circuit lower
bounds, Computational Complexity 18 (2009), 81�103.
[Che03] Q. Cheng, On the ultimate complexity of factorials, Proceedings of the
20th Annual Symposium on Theoretical Aspects of Computer Science,
LNCS 2607, Springer, 2003, pp. 157�166.
[GKKP11] Bruno Grenet, Erich L. Kaltofen, Pascal Koiran, and Natacha Portier,
Symmetric Determinantal Representation of Formulas and Weakly
Skew Circuits, Randomization, Relaxation, and Complexity in Poly-
nomial Equation Solving (Leonid Gurvits, Philippe Pébay, J. Maurice
Rojas, and David C. Thompson, eds.), Contemporary Mathematics,
no. 556, Amer. Math. Soc., Providence, RI, 2011, pp. 61�96.
[Koi05] Pascal Koiran, Valiant's model and the cost of computing integers,
Computational Complexity 13 (2005), no. 3-4, 131�146.
[Men11] Stefan Mengel, Characterizing arithmetic circuit classes by constraint
satisfaction problems, Proceedings of the 38th International colloquim
Conference on Automata, Languages and Programming - Volume Part
I, ICALP'11, Springer-Verlag, 2011, pp. 700�711.
[Mor97] C. Moreira, On asymptotic estimates for arithmetic cost functions, Pro-
ceedings of the American Mathematical Society 125 (1997), 347�353.
[MP08] Guillaume Malod and Natacha Portier, Characterizing Valiant's alge-
braic complexity classes, Journal of Complexity 24 (2008), no. 1, 16�38.
69
Bibliography
[MS96] W. De Melo and B. F. Svaiter, The cost of computing integers, Pro-
ceedings of the American Mathematical Society 124 (1996), no. 5,
1377�1378.
[MV97] Meena Mahajan and V. Vinay, Determinant: Combinatorics, Algo-
rithms, and Complexity, Chicago Journal of Theoretical Computer Sci-
ence 1997 (1997), no. 5.
[SS95] M. Shub and S. Smale, On the intractability of hilbert's nullstellensatz
and an algebraic version of "NP 6= P?", Duke Math. J. 81 (1995),
47�54.
[Str73] V. Strassen, Vermeidung von divisionen, J. Reine Angew. Math. 264
(1973), 182�202.
[Val79] Leslie G. Valiant, Completeness classes in algebra, Proceedings of the
11th annual ACM symposium on Theory of computing, STOC'79,
1979, pp. 249�261.
[Val82] , Reducibility by algebraic projections, Logic and Algorithmic:
An International sysmposium held in honor of Ernst Specker, 1982,
Monographie No. 30 de L'Enseignement Mathematique, pp. 365�380.
[Val92] , Why is boolean complexity theory di�cult?, Proceedings of the
London Mathematical Society Symposium on Boolean function com-
plexity, Cambridge University Press, 1992, pp. 84�94.
[Vol99] Heribert Vollmer, Introduction to circuit complexity: A unifrom ap-
proach, Springer, 1999.
[VSBR83] L. G. Valiant, S. Skyum, S. Berkowitz, and C. Racko�, Fast parallel
computation of polynomials using few processors, SIAM Journal on
Computing 12 (1983), no. 4, 641�644.
70