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9. Fault Modeling
Reliable System Design 2011by: Amir M. Rahmani
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matlab1.ir Amir M. Rahmani
Fault Modeling
Why fault modeling? Stuck-at 0/1 fault model The single fault assumption Bridging and delay faults MOS transistors and CMOS Switch-level fault model
• – Stuck-on/open
Functional Faults State Transition Fault Model
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matlab1.ir Amir M. Rahmani
Fault Modeling
Fault Model:• a set of assumed faults in a system such that testing for
them will test for most faults of a specific class. Used for:
• Designing error detection mechanisms• Designing test procedure• Fault simulation• Quality evaluation
Hide complexities of actual defects. Infinitely many defects possible.
Based on past knowledge of defect modes and modeling experience.
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matlab1.ir Amir M. Rahmani
Common Fault Models
No model: test exhaustively Hardware fault models:
• – Gate level:• stuck-at 0/1• bridging• delay faults
• – Transistor level:• stuck on/open • bridging
• – Functional fault models Software fault model
• – Is there one?
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matlab1.ir Amir M. Rahmani
Fault mechanisms in hardware
Temporary Permanent
• – Opens: broken connection, also near-opens• – Shorts: unwanted connection, also near shorts• – Can be seen
Imperfect devices
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matlab1.ir Amir M. Rahmani
Stuck-at 0/1 Model
Model: any one or more of these may be stuck at 0 or 1: a gate input, a gate output
Assumptions: • • Only one line is faulty.• • Faulty line permanently set to 0 or 1.• • Fault can be at an input or output of a gate.
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matlab1.ir Amir M. Rahmani
Stuck-at 0/1 Example
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Why Use Single Stuck-At Fault Model?
Complexity is greatly reduced. Many different physical defects may be
modeled by the same logical stuck-at fault. Single stuck-at Fault is technology
independent. it been successfully used on TTL, ECL, CMOS, etc.
Single stuck-at tests cover a large percentage of multiple stuck-at faults.
Single stuck-at tests cover a large percentage of un-modeled physical defects.
matlab1.ir Amir M. Rahmani
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matlab1.ir Amir M. Rahmani
Bridging (Short) Fault Model
Common assumption: only nearby lines can be bridged
Model: Two lines x and y bridged can cause both to take the value
• – x AND y AND-bridging (0-dominance)• – x OR y OR-bridging (1-dominance)• – Depends on technology, transistor
dimensions etc.
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matlab1.ir Amir M. Rahmani
Bridging Fault Example
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Delay Fault Model
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matlab1.ir Amir M. Rahmani
MOS Transistors
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matlab1.ir Amir M. Rahmani
CMOS NOR Gate
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matlab1.ir Amir M. Rahmani
Switch-level Fault Model (1)
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matlab1.ir Amir M. Rahmani
Switch-level Fault Model (2): Stuck-ON
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Functional Faults
Fault effects modeled at a higher level than logic for function modules, such as
• Decoders• Multiplexers• Adders• Counters• RAMs• ROMs
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Functional Faults of Decoder
matlab1.ir Amir M. Rahmani
Instead of line Li, Line Lj is selected In addition to Li, Lj (or Lk) is selected None of the lines are selected
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State Transition Fault Model
matlab1.ir Amir M. Rahmani
A fault causes a single state transition to a wrong destination state