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CORPORATE INSTITUTE OF SCIENCE & TECHNOLOGY , BHOPALDEPARTMENT OF ELECTRONICS & COMMUNICATIONS
MICRO CODED CONTROLLER
- PROF. RAKESH K. JHA
ALTERNATIVES FOR CONTROL UNIT (CU)
Hard-wired (hardware) Random logic, programmable logic array (PLA), or ROM Fast Inflexible
Firmware Microprogrammed or microcoded CU Control implemented like a computer (microcomputer)
Microinstructions Microprogramming
Flexible Changes to instruction set possible Completely different instruction sets can be emulated
Speed limited by microcomputer memory 2
HARDWIRED CU: SINGLE-CYCLE Implemented by combinational logic.
3
Control logicopcode
Datapath
ALU control
3
2
To ALU
ALUOp
Control signals
funct. code
6
6
4
Instr. mem.PC
Add
Reg
. File
Datamem.1
mux
0
1 m
ux 0
0 m
ux 1
4
1 m
ux 0
Sign ext.
Shift left 2
ALUCont.
CO
NTR
OL
opcode
MemWriteMemRead
ALU
Branch
zero
0-15
0-5
11-15
16-20
21-25
26-31
ALU 0
mux
1
Shift left 2
0-25 Jump
Single-cycleDatapath
MemtoReg
ALUOp
ALUSrc
RegDst
RegWrite
SINGLE-CYCLE CONTROL LOGICInputsInputs OutputsOutputs
Instr.Instr.typetype
RR 00 00 00 00 00 00 11 00 00 11 00 00 00 11 00 00
lwlw 11 00 00 00 11 11 00 11 11 11 11 00 00 00 00 00
swsw 11 00 11 00 11 11 XX 11 XX 00 00 11 00 00 00 00
beqbeq 00 00 00 11 00 00 XX 00 XX 00 00 00 11 00 11 00JJ 00 00 00 00 11 00 XX XX XX 00 XX 00 XX XX XX 115
ALU
Op0
ALU
Op1
Reg
Dst
ALU
Src
Mem
toR
eg
Reg
Writ
e
Mem
Rea
d
Mem
Writ
e
Bra
nch
Op5
Op4
Op3
Op2
Op1
Op0
Jum
p
SINGLE-CYCLE CONTROL CIRCUIT
6
lw sw beq JR
RegDstALUSrcMemtoRegRegWriteMemReadMemWriteBranchALUOp1ALUOp0Jump
Op5Op4Op3Op2Op1Op0
ALU CONTROL LOGICInputsInputs Outputs to ALUOutputs to ALU
Instr.Instr.typetype
From CUFrom CU Funct. Code from IR Funct. Code from IR (bits 0-5)(bits 0-5)
3-bit 3-bit codecode
Opera-Opera-tiontion
ALUOp1ALUOp1 ALUOp0ALUOp0 F5F5 F4F4 F3F3 F2F2 F1F1 F0F0
lw, swlw, sw 00 00 XX XX XX XX XX XX 010010 AddAdd
BB 00 11 XX XX XX XX XX XX 110110 SubtractSubtract
RR
11 XX XX XX 00 00 00 00 010010 AddAdd
11 XX XX XX 00 00 11 00 110110 SubtractSubtract
11 XX XX XX 00 11 00 00 000000 ANDAND
11 XX XX XX 00 11 00 11 001001 OROR
11 XX XX XX 11 00 11 00 111111 sltslt 7
ALU CONTROL
8
ALU
3zero
result
overflow
Operation select
from control
Operation select ALU function
000 AND 001 OR 010 Add 110 Subtract 111 Set on less than
F3
F2
F1
F0
ALUOp1 ALUOp0From Control Circuit
Func
tion
code
MULTICYCLE CONTROL FSM
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Instr. decode/reg.
fetch/branch
addr.
ALU operation
Write PC on branch condition
Write memory
data
Write jump addr.
to PC
Write register
Read memory
data
Instr. fetch/
adv. PC
Compute memory
addr.
Write register
lw or sw
lw
sw
RB
J
StartState 0 1
23
4 5
6
7
8 9
Inputs: 6 opcode bitsOutputs: 16 control signals
STATES AND OUTPUTS Suppose 10 states are encoded 0000 through 1001. State code completely determines 16 control
signals (Moore machine). States 0 (0000), 3 (0011) and 6 (0110)
Next state ← present state + 1 State 1 (0001) – opcode must decide next state
State 2 (0010) for lw or sw State 6 (0110) for R-type of instruction State 8 (1000) for branch instruction State 9 (1001) for jump instruction
State 2 (0010) – opcode must decide next state State 3 (0011) for lw State 5 (0101) for sw
States 4 (0100), 5 (0101), 7 (0111), 8 (1000) and 9 (1001) – next state is unconditionally 0 (0000) 10
A PROGRAM-LIKE IMPLEMENTATION
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Instr. decode/reg.
fetch/branch
addr.
ALU operation
Read memory
data
Instr. fetch/
adv. PC
lw or sw
lw
sw
RB
J
StartState 0000 0001
00100011
0100 0101
0110
01111000 1001
Inputs: 6 opcode bitsOutputs: 16 control signals
Compute memory
addr.
Write jump addr.
to PC
Write register
Write memory
dataWrite
register
Write PC on branch condition
IMPLEMENTING WITH ROM
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ControlPLA or ROM
16 words
Four flip-flops
16 control signals
PLA input orROM address
6-bit opcode
State sequencer
Select one of 4 ways
16
2
4
6
ROM AND STATE SEQUENCER
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Control ROMSixteen
18-bit words4-bit address
4-bit state flip-flops
16
2
Controlsignals to datapath
4 4
0001
MUX11 10 01 00
0000
AddrCtl go to00 st. 011 st. + 101 st.
2,6,8,910 st. 3,5
Dispatch ROM 2 Dispatch ROM 1
Adder
6
6-bitOpcode from IR
Address
Advance state4
ROM Address sw, lw, R, B or J
sw or lw
DISPATCH ROM CONTENTS
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Dispatch ROM 1Dispatch ROM 1
InstructionInstruction AddressAddress(Opcode)(Opcode)
ContentContent
lwlw 100011100011 00100010
swsw 101011101011 00100010
RR 000000000000 01100110
BB 000100000100 10001000
JJ 000010000010 10011001
Dispatch ROM 2Dispatch ROM 2
InstructionInstruction AddressAddress(Opcode)(Opcode)
ContentContent
lwlw 100011100011 00110011
swsw 101011101011 01010101
Each dispatch ROM has sixty-four 4-bit wordsAddress is 6-bit opcodeContent is next state (4-bits)
CONTROL ROM CONTENTS Control ROM has
sixteen 18-bit words: bits 0-1, AddrCtl to
control mux bits 2-17, sixteen
control signals for datapath
Address is 4-bit state of control machine
Addr.Addr. bits 17-2bits 17-2 bits 1-0bits 1-000000000 10010100000010001001010000001000 1111
00010001 00000000000110000000000000011000 0101
00100010 00000000000101000000000000010100 1010
00110011 00110000000000000011000000000000 1111
01000100 00000010000000100000001000000010 0000
01010101 00101000000000000010100000000000 0000
01100110 00000000010001000000000001000100 1111
01110111 00000000000000110000000000000011 0000
10001000 01000000101001000100000010100100 0000
10011001 10000001000000001000000100000000 000015
MICROPROGRAM: BASIC IDEA The control unit in a computer generates an output
(sequence of control signals) for each instruction. Suppose we break down each instruction into a series
of smaller operations (microinstructions), such as, fetch, decode, etc.
Then, implement the control unit as a small computer (within the computer) that executes a sequence of microinstructions (microprogram) for each instruction.
M. V. Wilkes, “The Best Way to Design an Automatic Calculating Machine,” Report of Manchester University Computer Inaugural Conference, pp. 16-18, 1951.Reprinted in E. E. Swartzlander (editor), Computer Design Development: Principal Papers, pp. 266-270, Rochelle Park, NJ: Hayden, 1976.
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MICROCODED CONTROL UNIT
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Sixteen18-bit words4-bit address
4-bit state flip-flops
16
2
Controlsignals to datapath
4 4
0001
MUX11 10 01 00
0000
AddrCtl
Dispatch ROM 2 Dispatch ROM 1
Adder
6
Opcode from IR
Address
Microcodememory
μPC
Address select logic
Microcode word
Sequencing field
lw or sw sw, lw, R, B or JROM address
IMPLEMENTING THE IDEA Use a memory type implementation for
control unit. Create a software infrastructure to
automatically translate instructions into memory data (microcode):
Microinstructions – define a machine language in which instructions can be described
Microprogram – an instruction described as a sequence of microinstructions
Microassembler – converts microprogram to (binary) microcode
Is there a micro-compiler?18
MICROPROGRAMMING A microinstruction set is defined. To program the control of a computer for an
instruction set, a programmer writes a microprogram for each machine instruction.
Each micrprogram is converted into microcode, specific to the datapath hardware, by a microassembler and the entire microcode is loaded in the microcode memory of the control unit (CU).
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THE END