dmt bit rate maximization with optimal time domain equalizer filter bank architecture

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DMT Bit Rate Maximization DMT Bit Rate Maximization With Optimal Time Domain Equalizer With Optimal Time Domain Equalizer Filter Bank Architecture Filter Bank Architecture *M. Milošević, **L. F. C. Pessoa, *B. L. Evans and *R. Baldick *Electrical and Computer Engineering Department The University of Texas at Austin **Motorola, Inc, NCSG/SPS Austin, TX 36 th Asilomar IEEE Conference on Signals, Systems and Computers Nov 3-6, 2002, Pacific Grove, CA

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36 th Asilomar IEEE Conference on Signals, Systems and Computers Nov 3-6, 2002, Pacific Grove, CA. DMT Bit Rate Maximization With Optimal Time Domain Equalizer Filter Bank Architecture. * M. Milo š evi ć, **L. F. C. Pessoa, *B. L. Evans and *R. Baldick. - PowerPoint PPT Presentation

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Page 1: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

DMT Bit Rate Maximization DMT Bit Rate Maximization With Optimal Time Domain EqualizerWith Optimal Time Domain Equalizer

Filter Bank ArchitectureFilter Bank Architecture

*M. Milošević, **L. F. C. Pessoa, *B. L. Evans and *R. Baldick

*Electrical and Computer Engineering Department

The University of Texas at Austin

**Motorola, Inc, NCSG/SPS

Austin, TX

36th Asilomar IEEE Conference on Signals, Systems and Computers

Nov 3-6, 2002, Pacific Grove, CA

Page 2: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

2MPEB Asilomar’02

P/S QAMdecoder

invert channel

=frequency

domainequalizer

Ser

ial-t

o-P

aral

lel (

S\P

)

QAMencoder

mirrordataand

N-IFFT

add Cyclic Prefix(

CP)

Digital-to-Analog

Converter +transmit

filter

N-FFTand

removemirrored

data

S/Premove

CP

TRANSMITTER

RECEIVER

N/2 subchannels N samples

N samplesN/2 subchannels

TEQtime

domain equalizer

receive filter

+Analog-to-

Digital Converter

channel

Basic Architecture: DMT Transceiver Basic Architecture: DMT Transceiver

Bits

00101

Par

alle

l-to-

Ser

ial (

P\S

)

noise

Page 3: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

3MPEB Asilomar’02

DMT SymbolDMT Symbol

CP: Cyclic Prefix

N samplesv samples

CP CPs y m b o l ( i ) s y m b o l ( i+1)

copy copy

D/A + transmit filter

ADSL downstream upstream

CP 32 4 N 512 64

Inverse FFT

Page 4: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

4MPEB Asilomar’02

ISI and ICI in DMTISI and ICI in DMT

• Channel is longer than cyclic prefix (CP)+1– Adjacent symbols interfere (ISI)

– Subchannel are no longer orthogonal (ICI)

• TEQ mitigates the problem by shortening the channel– No symbol at demodulator contains contributions of other

symbols

– Cyclic prefix converts linear convolution into circular

– Symbol channel FFT(symbol) x FFT(channel)

– Division by the FFT(channel) can undo linear time-invariant frequency distortion in the channel

Page 5: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

5MPEB Asilomar’02

Channel Impairments and TEQ DesignChannel Impairments and TEQ Design

• Conventional ADSL TEQ design– Mitigate inter-symbol interference at the TEQ output

• Proposed ADSL TEQ design - Maximize data rate– Inter-symbol interference at the output of the demodulator (FFT)

– Near-end crosstalk (NEXT)

– Design with respect to digital noise floor (DNF)

– White noise in the channel (colored by TEQ)

• Other impairments present in an ADSL system– Impulse noise

– Near-end echo

– Far-end echo (of concern in voice-band communication)

– Phase and frequency content distortion (compensated by FEQ)

Page 6: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

6MPEB Asilomar’02

Proposed TEQ Design MethodProposed TEQ Design Method

• Maximize bit rate at the demodulator (FFT) output instead of TEQ output

• Incorporate more sources of distortion into design framework

• Expected contributions– Model SNR at output of the FFT demodulator

– Data Rate Optimal Time Domain Per-Tone TEQ Filter Bank Algorithm (TEQFB)

– Data Rate Maximization Single TEQ Design

• Results

Page 7: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

7MPEB Asilomar’02

Model SNR at Output of DemodulatorModel SNR at Output of Demodulator

• Desired signal in kth frequency bin at FFT output is DFT of circular convolution of channel and symbol

– is desired symbol circulant convolution matrix for delay – H is channel convolution matrix

– qk is kth column vector of N DFT matrix

• Received signal in kth frequency bin at FFT output

– is actual convolution matrix (includes contributions from previous, current, and next symbol)

– G(*) is convolution matrix of sources of noise or interference

wGGGGHUqY echofextnextawgnisiHR kk

HwUqY circHDkk

isiU

circU

Page 8: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

8MPEB Asilomar’02

Model SNR at Output of DemodulatorModel SNR at Output of Demodulator

• Proposed SNR model at the demodulator output

• After some algebra, we can rewrite the SNR model as

digDRHDR

DHDModel

)]()E[(

])E[()(SNR

kkkk

kkk YYYY

YYw

wBw

wAww

T

T

k

kk ~

~SNR Model

dig – Digital noise floor (depends on number of bits in DSP)

(*)H – Hermitian (conjugate transpose)

Page 9: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

9MPEB Asilomar’02

• Bits per symbol as a nonlinear function of equalizer taps.

– Multimodal for more than two-tap w.

– Nonlinear due to log and .

– Requires integer maximization.

– Ak and Bk are Hermitian symmetric.

• Unconstrained optimization problem:

Model SNR at Output of DemodulatorModel SNR at Output of Demodulator

k k

k

k

kbwBw

wAwww

T

T

2

Model

2int log

SNR1log

DMT

*

ww

intoptint

DMTDMTmax bb

Page 10: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

10MPEB Asilomar’02

• Per channel maximization: find optimal TEQ for every k subchannel in the set of used subchannels I

• Generalized eigenvalue problem

• Bank of optimal TEQ filters

Data Rate Optimal Time Domain Per-tone TEQ Filter Data Rate Optimal Time Domain Per-tone TEQ Filter Bank (TEQFB) AlgorithmBank (TEQFB) Algorithm

kkk

kkk

kkk

kkkk

kk wBw

wAw

wBw

wAww

wwT

T

T

T

2opt maxarglogmaxarg

kkkkkkkkk for λλfor λ satisfies optoptoptoptopt wBwAw

Ik kkk

kkkboptTopt

optTopt

2

optint logDMT

wBw

wAw

Page 11: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

11MPEB Asilomar’02

Frequency Domain

Equalizer

Goertzel Filter Block

TEQ Filter Bank

TEQ Filter Bank ArchitectureTEQ Filter Bank Architecture

w1

w2

wN/2-1

G1

G2

GN/2-1

Received Signal x={x1,

…xN)

FEQ1

FEQ2

FEQN/2-1

y1

y2

yN/2-1

Y1

Y2

YN/2-1

Page 12: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

12MPEB Asilomar’02

TEQFB Computational ComplexityTEQFB Computational Complexity

• Creating matrices Ak

and Bk ~ NO(M2N)

• Up to N/2 solutions of symmetric-definite problems– Using Rayleigh

quotient iteration

Single TEQ Real MACs Words/Sym

TEQ Mfs 2M

FFT 2Nlog2Nfsym 4N

FEQ 2Nfsym 2N

TEQFB Real MACs Words/Sym

TEQ FB N/2Mfs M(1+N/2)

Goertzel FB N(fs+fsym) 4N

FEQ 2Nfsym 2N

PTE Real MACs Words/Sym

FFT 2Nlog2Nfsym 4N+2Combiner 2NMfsym (M+1)N

MM

Miter

NR 412

322

3

N= 512, =32, M 2, fs= 2.204 MHz, fsym=4 kHz

Initialization Data Transmission

Page 13: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

13MPEB Asilomar’02

• Find a single TEQ that performs as well as the optimal TEQ filter bank.– Solution may not exist, may be unique, or may not be unique.

– Maximizing b (w) more tractable than maximizing bDMTint(w).

– b (w) is still non-linear, multimodal with sharp peaks.

Data Rate Maximization Single TEQ DesignData Rate Maximization Single TEQ Design

k

kbw

wModel

2int

SNR1log

DMT

k

kbw

wModel

2

SNR1log

Page 14: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

14MPEB Asilomar’02

• Find a root of gradient of b (w) corresponding to a local maximum closest to the initial point– Parameterize problem to make it easier to find desired root.

– Use non-linear programming

– Find a good initial guess at the vector of equalizer taps w – one choice is the best performing TEQ FIR in TEQFB.

– No guarantee of optimality

– Simulation results are good compared to methods we looked at

Data Rate Maximization Single TEQ DesignData Rate Maximization Single TEQ Design

Page 15: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

15MPEB Asilomar’02

• Measurement of the SNR in subchannel k– S = 1000 symbols

– Every subchannel in a symbol loaded with a random 2-bit constellation point Xk

i, passed through the channel, TEQ block and FEQ block (where applicable) to obtain Yk

i

• Bit rate reported is then

Simulation ResultsSimulation Results

1

0

21

2log10SNR S

i

ik

ik

k

YXS

256

72

SNR1log

k

kb

Page 16: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

16MPEB Asilomar’02

Effect of TEQ Size on Bit RateEffect of TEQ Size on Bit Rate

Data rates achieved for different number of TEQ taps, MN = 512, = 32, input power = 23.93 dBm, AWGN power = -140 dBm/Hz,

and NEXT modeled as 49 disturbers. Accuracy of bit rate: 60 kbps.

(a) CSA loop 2 (b) CSA loop 7

Page 17: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

17MPEB Asilomar’02

Effect of Transmission Delay on Bit RateEffect of Transmission Delay on Bit Rate

Data rates achieved as a function of for CSA loop 1.N = 512, = 32, input power = 23.93 dBm, AWGN power = -140 dBm/Hz,

and NEXT modeled as 49 disturbers. Accuracy of bit rate: 60 kbps.

Page 18: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

18MPEB Asilomar’02

• We evaluate TEQFB, proposed single TEQ, MBR, Min-ISI, LS PTE, MMSE-UTC and MMSE-UEC for CSA loops 1-8

• Results presented in a table– Each row entry

– Final row entry

Simulation ResultsSimulation Results

%100*),,(

),,(

31

1),(

32

2TEQFB

TEQFB

opt

opt

M

Alg

MCSAb

MCSAbAlgCSARowAvg

8

1

),(8

1)(

CSA

AlgCSARowAvgAlgAvg

Page 19: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

19MPEB Asilomar’02

TEQ Design Methods - ComparisonTEQ Design Methods - Comparison

CSA loop

LS PTENew TEQ

Min-ISI MBR MSSNRMMSE-

UECMMSE-

UTC

1 99.5% 99.6% 97.5% 97.3% 95.0% 86.3% 84.4%

2 99.5% 99.6% 97.3% 97.0% 96.5% 87.2% 85.8%

3 99.6% 99.5% 97.3% 97.8% 97.0% 83.9% 83.0%

4 99.1% 99.3% 98.2% 98.1% 95.4% 81.9% 81.5%

5 99.5% 99.6% 97.2% 97.7% 97.1% 88.6% 88.9%

6 99.4% 99.5% 98.3% 97.7% 96.4% 82.7% 79.8%

7 99.6% 98.8% 96.3% 96.3% 96.7% 75.75% 78.4%

8 99.2% 98.7% 97.5% 97.4% 97.5% 82.6% 83.6%

Avg. 99.4% 99.3% 97.5% 97.4% 96.4% 83.6% 83.2%

CSA – carrier serving area, MBR – Maximum Bit Rate, Min-ISI – Minimum InterSymbol Interference TEQ Design, LS PTE – Least-squares Per-Tone Equalizer, MMSE –

Minimum Mean Square Error, UTC – Unit Tap Constraint, UEC – Unit Energy Constraint

Page 20: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

20MPEB Asilomar’02

TEQFB Data RatesTEQFB Data Rates

Highest data rates in Mbps achieved by TEQFB for TEQ lengths 2-32, input power = 23.93 dBm

CSA loop TEQFB

1 11.417 Mbps

2 12.680 Mbps

3 10.995 Mbps

4 11.288 Mbps

5 11.470 Mbps

6 10.861 Mbps

7 10.752 Mbps

8 9.615 Mbps

Page 21: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

Backup SlidesBackup Slides

Milos Milosevic

Lucio F. C. Pessoa

Brian L. Evans

Ross Baldick

Page 22: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

22MPEB Asilomar’02

Bit/symbol for a 2-tap TEQBit/symbol for a 2-tap TEQ

Page 23: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

23MPEB Asilomar’02

Bit/symbol for a 3-tap TEQBit/symbol for a 3-tap TEQ

Page 24: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

24MPEB Asilomar’02

CSA LoopsCSA Loops

Configuration of eight standard carrier serving loops (CSA). Numbers represent length in feet/ gauge. Vertical lines represent bridge taps. From Guner, Evans and Kiaei, “Equalization For DMT To Maximize bit Rate”.

Page 25: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

25MPEB Asilomar’02

Selected Previous TEQ Design MethodsSelected Previous TEQ Design Methods

• Minimize mean squared error– Minimize mean squared error (MMSE) method [Chow & Cioffi, 1992]

– Geometric SNR method [Al-Dhahir & Cioffi, 1996]

• Minimize energy outside of shortened channel response– Maximum Shortening SNR method [Melsa, Younce & Rohrs, 1996]

– Divide-and-Conquer methods – Equalization achieved via a cascade of two tap filters [Lu, Evans & Clark, 2000]

– Minimum ISI method - Near-maximum bit rate at TEQ output [Arslan, Evans & Kiaei, 2001]

– Maximum Bit Rate (MBR) - Maximize bit rate at TEQ output [Arslan, Evans & Kiaei, 2001]

• Per-tone equalization– Frequency domain per-tone equalizer [Acker, Leus, Moonen, van der Wiel

& Pollet, 2001]

Page 26: DMT Bit Rate Maximization  With Optimal Time Domain Equalizer Filter Bank Architecture

26MPEB Asilomar’02

• Used to calculate single DFT point

• Denote with yk(n) as the signal emanating from TEQ making up TEQFB

• Then, the corresponding single point DFT Yk is:

where Gk (-1) = Gk (-2) = 0 and n={0,1,…,N}

Goertzel FiltersGoertzel Filters

N

kNGj

N

kNGNGY

nGnGN

knynG

kkkk

kkkk

2sin1

2cos1

212

cos2