void Dma_S_Tx_Configuration(void);void Dma_S_Rx_Configuration(void);#define TX_TD_SIZE 40#define RX_TD_SIZE 40/* DMA Configuration for DMA_TX_S */#define DMA_TX_S_BYTES_PER_BURST (1u)#define DMA_TX_S_REQUEST_PER_BURST (1u)#define DMA_TX_S_SRC_BASE (CYDEV_SRAM_BASE)#define DMA_TX_S_DST_BASE (CYDEV_PERIPH_BASE)/* DMA Configuration for DMA_RX_S */#define DMA_RX_S_BYTES_PER_BURST (1u)#define DMA_RX_S_REQUEST_PER_BURST (1u)#define DMA_RX_S_SRC_BASE (CYDEV_PERIPH_BASE)#define DMA_RX_S_DST_BASE (CYDEV_SRAM_BASE)/* Variable declarations for DMA_Tx_S */uint8 S_TxChannel;uint8 S_TxTD;/* Variable declarations for DMA_Rx_S */uint8 S_RxChannel;uint8 S_RxTD[2];uint8 s_txBuffer[TX_TD_SIZE];uint8 s_rxBuffer[RX_TD_SIZE];/******************************************************************************** Function Name: Dma_M_Tx_Configuration********************************************************************************* Summary:* Configures the DMA transfer for TX direction* * Parameters:* None.** Return:* None.********************************************************************************/void Dma_S_Tx_Configuration(){ /* Init DMA, 1 byte bursts, each burst requires a request */ S_TxChannel = DMA_TX_S_DmaInitialize(DMA_TX_S_BYTES_PER_BURST, DMA_TX_S_REQUEST_PER_BURST, HI16(DMA_TX_S_SRC_BASE), HI16(DMA_TX_S_DST_BASE)); S_TxTD = CyDmaTdAllocate(); CyDmaTdSetConfiguration(S_TxTD, 40u, S_TxTD, TD_INC_SRC_ADR); /* From the memory to the SPIS */ #if(CY_PSOC3_ES2 || CY_PSOC5_ES1) CyDmaTdSetAddress(S_TxTD, LO16((uint32)s_txBuffer), LO16((uint32)SPIS_BSPIS_es2_SPISlave_sR8_DpMISO_u0__F0_REG)); #else CyDmaTdSetAddress(S_TxTD, LO16((uint32)s_txBuffer), LO16((uint32)SPIS_BSPIS_es3_SPISlave_sR8_Dp_u0__F0_REG)); #endif /* Associate the TD with the channel */ CyDmaChSetInitialTd(S_TxChannel, S_TxTD);} /******************************************************************************** Function Name: Dma_S_Rx_Configuration********************************************************************************* Summary:* Configures the DMA transfer for RX direction* * Parameters:* None.** Return:* None.********************************************************************************/void Dma_S_Rx_Configuration(){ /* Init DMA, 1 byte bursts, each burst requires a request */ S_RxChannel = DMA_RX_S_DmaInitialize(DMA_RX_S_BYTES_PER_BURST, DMA_RX_S_REQUEST_PER_BURST, HI16(DMA_RX_S_SRC_BASE), HI16(DMA_RX_S_DST_BASE)); S_RxTD[0] = CyDmaTdAllocate(); S_RxTD[1u] = CyDmaTdAllocate(); CyDmaTdSetConfiguration(S_RxTD[0], 40u, S_RxTD[1], TD_INC_DST_ADR); CyDmaTdSetConfiguration(S_RxTD[1u], 1u, S_RxTD[1u], 0u); /* From the SPIS to the memory */ #if(CY_PSOC3_ES2 || CY_PSOC5_ES1) CyDmaTdSetAddress(S_RxTD[0], LO16((uint32)SPIS_BSPIS_es2_SPISlave_sR8_DpMOSI_u0__F0_REG), LO16((uint32)s_rxBuffer)); #else CyDmaTdSetAddress(S_RxTD[0], LO16((uint32)SPIS_BSPIS_es3_SPISlave_sR8_Dp_u0__F1_REG), LO16((uint32)s_rxBuffer)); #endif CyDmaTdSetAddress(S_RxTD[1u], LO16((uint32)s_rxBuffer), LO16((uint32)s_rxBuffer)); /* Associate the TD with the channel */ CyDmaChSetInitialTd(S_RxChannel, S_RxTD[0]);}