Diode-free magnetic random access memory using spin-dependent tunneling effectFrank Z. Wang Citation: Applied Physics Letters 77, 2036 (2000); doi: 10.1063/1.1313345 View online: http://dx.doi.org/10.1063/1.1313345 View Table of Contents: http://scitation.aip.org/content/aip/journal/apl/77/13?ver=pdfcov Published by the AIP Publishing Articles you may be interested in Effects of two in-plane fields on the magnetization reversal mechanism in magnetic tunnel junction elements J. Appl. Phys. 91, 7703 (2002); 10.1063/1.1452264 Magnetic tunnel junction device with perpendicular magnetization films for high-density magnetic random accessmemory J. Appl. Phys. 91, 5246 (2002); 10.1063/1.1459605 Spin dependent tunneling devices fabricated for magnetic random access memory applications using latchingmode J. Appl. Phys. 87, 6385 (2000); 10.1063/1.372714 Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory(invited) J. Appl. Phys. 85, 5828 (1999); 10.1063/1.369932 Picotesla field sensor design using spin-dependent tunneling devices J. Appl. Phys. 83, 6688 (1998); 10.1063/1.367861

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Diode-free magnetic random access memory using spin-dependenttunneling effect

Frank Z. Wanga)

Senior Lecturer, School of Informatics and Multimedia Technology, University of North London,166-220 Holloway Road, London N7 8DB, United Kingdom

~Received 24 April 2000; accepted for publication 1 August 2000!

A diode-free magnetic random access memory comprises two sets of conductive lines, an array ofmagnetic tunnel junctions at each intersection, and a peripheral circuitry. Such a simplifieddiode-free architecture described in this letter overcomes the diode-area constraint in the prior artand achieves a significant breakthrough in storage density. ©2000 American Institute of Physics.@S0003-6951~00!05039-7#

Magnetic random access memories~MRAMs!, unlikethe semiconductor memories, that store information as theorientation of magnetization of a thin ferromagnetic film canhold stored information for long periods of time, and are thusnonvolatile. In some applications they exhibit excellent prop-erties superior to semiconductor memories and/or magneticdisks. In the current MRAMs using the spin-dependent tun-neling~SDT! effect, the most hopeful candidate for magneticnonvolatile memory, diode~or transistor! current rectifica-tion is desirable to reach readout operation.1–3 As shown inFig. 1, the basic array cell is a diode~selective component!connected in series with a magnetic tunnel junction~MTJ,storage node!. In the absence of such a diode all the MTJs ateach intersection of every bit and word line in the cross-pointarray would otherwise be electrically connected to one an-other. However, such a MTJ-diode series puts a severe con-straint on the storage density, although a successful verticalintegration of MTJs with hydrogenated amorphous silicon(a-Si:H) diodes was made.3 The area of the diode must be atleast 103 (mm)2 with 200 nm film in order to operate theintegrated MTJ-diode component at around 0.5–1 V.3 Notethat the value of 103 (mm)2 is much larger than the smallestMTJ of 0.17 (mm)2.4

To realize this demonstration of diode-free SDT-MRAM, reported to date, a 232 bit memory chiplet wasfabricated. Figure 2 is its~SEM! scanning electron micro-scope image and schematic. The MTJ was designed with acircular shape to benefit the formation of single-domainstructure.5 The MTJ dimensions varied between 2 and 50mm. The sandwich MTJ Co~100 nm!/Al 2O3~3–8 nm!/80NiFe~100 nm! was prepared by sputtering with argon.Contact windows were opened in the insulator in order forthe top leads and bottom leads to directly access the junc-tions without any diode~transistor! selective component.

Write operation of independently switching the magneti-cally soft layer~NiFe! with conductor currents is achieved bymaking the other layer magnetically hard~Co!. When suffi-ciently large currents are passed through both a word lineand a bit line, the self-field of the combined currents at theintersection of the energized word and bit lines will rotatethe magnetization of NiFe of the single particular MTJ lo-

cated at the intersection. In an example of Fig. 3, two se-lected Bits 11, 12 are being written. A write voltageVww isapplied, through a load resistorRww , to one end of the cho-sen Word line 1, whose other end is brought to ground. So, awrite currentI ww is imposed along the dotted path shown inthe figure. Note that this write current is determined byVww /Rww and independent of the tunnel resistance. Similarlythe bit line write currentI bw5Vbw /Rbw is produced alongthe chosen bit line 1, 2. The~actual! ground of the energizedlines ensures that all the cells in contact with the energizedword and bit lines have zero voltage drop and do not con-duct, otherwise the leakage currents may damage the junc-tions. That is to say, the write currentsI ww and I bw do notflow vertically through any memory cell. The above opera-tion is based on an assumption that the lead resistance isnegligible. If the lead line resistance is not small compared tothat of the MTJ devices then the voltage distribution alongthe chosen line will appear. Such a voltage distribution willpossibly cause leakage currents through the MTJs. It is foundthat the resistance-area products of MTJs can be varied from109 to 60V mm2 by varying and properly oxidizing the Althickness.4 Because the tunnel resistance is typically severalorders of magnitude larger than the lead resistance, the as-sumption that the lead resistance is negligible is acceptable.

Read operation of measuring the value of any individualMTJ resistance~to determine ‘‘0’’ or ‘‘1’’ ! becomes a very

a!Electronic mail: f.wang@unl.ac.ukFIG. 1. Traditional MRAM architecture by combining magnetic and semi-conductor components.

APPLIED PHYSICS LETTERS VOLUME 77, NUMBER 13 25 SEPTEMBER 2000

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difficult task due to the mutual electrical connection betweenall the MTJs, referring again to Fig. 2. Any direct measure-ment would result in unavoidably introducing the contribu-tion from the rest of the resistors. This difficulty has beenovercome by introducing a concept of ‘‘virtual ground’’ ofoperational amplifier.6 Referring now to Fig. 4, since theinput impedance of an operational amplifier is consideredvery high or even infinite, no current can flow into or out ofthe inverting input terminals, thus this point is at 0 V, com-monly referred to as virtual ground. In an example of readoperation a voltage across the selected Bit 22 under a readcondition is established by setting the selected Word line 2 toan input voltage excitationVin2, which is about 100 mV,near the voltage level at which the magnetoresistance for theMTJ is at its maximum value. The bit line 2 is clamped tovirtual ground 0 V, by setting the~electronic! switch K2

~occupying a very small silicon area! to read mode, to createthe voltage across the selected Bit 22. The bit line 1 isclamped to actual ground 0 V by setting the switchK1 tostandby mode. The unselected Word line 1 remains at thestandby voltage level, 0 V. Although there is a large numberof possible current paths in the cross-point organization, noambient current path, except the dotted pathI s through thechosen Bit 22, exists because all the bit lines are set to virtualor actual ground. Thus the unselected Bits 11, 12 have zerovoltage drop and do not conduct. The unselected cell 21conducts but does not contribute to the read output.

The magnetic state of the memory cell is detected orread by applying a voltage across the selected MTJ and mea-suring the current through the MTJ. Conversely, it is voltagethat is being used to read the memory cell in the prior art.

FIG. 2. SEM micrographs of a 232 bit diode-free SDT-MRAM chipletshowing the test site containing eight contact pads and four circular MTJs, asingle MTJ bit and the schematic cross section. The top leads are visible asbright regions in SEM whereas the orthogonal bottom leads are darker.

FIG. 3. Write operation in a 232 bit diode-free SDT-MRAM.

FIG. 4. Read operation in a 232 bit diode-free SDT-MRAM.

FIG. 5. Reproducible readout waveform.

2037Appl. Phys. Lett., Vol. 77, No. 13, 25 September 2000 Frank Z. Wang

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For example, in Fig. 4, the resistance MR22 of the selectedBit 22 determines the sense currentI s . In the bit line controlcircuitry this current is converted to a voltageVout to read thedatum stored in selected Bit 22. The operational amplifierhas its noninverting input terminal brought to ground. Asmentioned above, no current can flow into or out of the in-verting input terminal. This forcesI s to flow through thefeedback resistorRf to produce a sense voltageVoutj at theoutput terminal. The read signal gain is equal to the ratiobetweenRf and MRi j . The low resistance state and highresistance state of MRi j , at the intersection of thei th wordline and thej th bit line, produce different values of sensecurrentI s in inverse proportion and therefore different valuesof output voltageVoutj . As shown in Fig. 5, the output volt-ageVoutj has two discrete values~the voltage difference is 56mV! corresponding to the two magnetic states. While notshown in Fig. 5, the output voltageVoutj will be compared toa reference voltage level set to a value halfway between theexpected values for the two possible states of the memorycell and the difference will be amplified further to providefull logic levels. After the data are read, the voltage on Wordline 2 is returned to the standby value. The magnetic stateremains unchanged after the read operation.

The demonstration described in this letter is based onmagnetic storage nodes of Co/Al2O3/80NiFe without any~di-ode! selective component per bit: this is the first attempt7,8 ofits kind. Prototypes are out, technology is maturing, and adramatic improvement in storage density would speed up thepace of the application of magnetic random access memo-ries.

The author gratefully acknowledges the collaboration,support, and discussion of Professor Y. Nakamura, TohokuUniversity, and Professor R. Carrasco, Staffordshire Univer-sity.

1J. M. Daughton, J. Appl. Phys.81, 3758~1997!.2J. De Boeve, Science281, 357 ~1998!.3R. C. Sousa, P. P. Freitas, V. Chu, and J. P. Condeet, INTERMAG, HA-03, Korea, 1999.

4S. S. Parkinet al., J. Appl. Phys.85, 5828~1999!.5L. He and F. Z. Wang, IEEE Trans. Magn.35, 3508~1999!.6F. Hughes,Op Amp Handbook~PTR Prentice-Hall, London, 1993!.7F. Z. Wang, U.S. and G.B. Patent Pending~15 September 1999!.8F. Z. Wang,Magnetic Random Access Memories, Encyclopedia of Mate-rial Science and Technology~Elsewise, Netherlands, 2000!.

2038 Appl. Phys. Lett., Vol. 77, No. 13, 25 September 2000 Frank Z. Wang

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