Logic Family

By

AJAL.A.J ( A.P- ECE)- FISATec2reach@gmail.com , Mob : 8907305642

1

Logic Family DefinitionLogic Family Definition• A circuit configuration or approach used to

produce a type of digital integrated circuit.• Consequence: different logic functions, when

fabricated in the form of an IC with the same approach, or in other words belonging to the same logic family, will have identical electrical characteristics.

• the set of digital ICs belonging to the same logic family are electrically compatible with each other

2

•Three major logic families:

•TTL (Transistor-Transistor Logic) based on bipolar junction transistors

•CMOS (Complementary Metal Oxide Semiconductor) based on MOSFETs

•ECL (Emitter-Coupled Logic), based on bipolar junction transistors

•Originally, TTL chips were fast but used lots of power, and CMOS chips used little power but were slow.

•CMOS chips are sensitive to static discharge, and must be handled carefully.

Logic Families

Common Characteristics of Common Characteristics of the Same Logic Familythe Same Logic Family

• Supply voltage range, speed of response, power dissipation, input and output logic levels, current sourcing and sinking capability, fan-out, noise margin, etc.

• Consequence: choosing digital ICs from the same logic family guarantees that these ICs are compatible with respect to each other and that the system as a whole performs the intended logic function.

4

•In Electronic Devices & Circuits (EET 2201) you’ll study two major classes of transistors:

•Bipolar Junction Transistors (BJTs)

•Metal-Oxide Semiconductor Field Effect Transistor (MOSFETs)

Two Kinds of Transistors

DIODE TRANSISTOR LOGICDIODE TRANSISTOR LOGIC

Y

What logic function is this circuit?

11011000

YAA

FILL IN THE TRUTH TABLE

DIODE TRANSISTOR LOGIC

B

A

0V

0V

+V5V

DIODE

DIODE

MMBT39041k

1k

RTL ExampleRTL Example

7

Basic Logic Families• TTL – transistor-transistor logic

based on bipolar transistors.• CMOS – complementary metal-oxide

semiconductor logic based on metal-oxide-semiconductor field effect transistors (MOSFETs).

• ECL – emitter coupled logic based on bipolar transistors.

Basic Logic Families

TTL CMOS ECL

General Characteristics of Basic Logic Families

• CMOS consumes very little power, has excellent noise immunity, and is used with a wide range of voltages.

• TTL can drive more current and uses more power than CMOS.

• ECL is fast, with poor noise immunity and high power consumption.

Introduction

• Uses bipolar technology including NPN transistors, diodes and resistors.

• The NAND gate is the basic building block

• Contains different subfamilies with varying characteristics such as speed and power consumption

11

Example Logic FamiliesExample Logic Families• General comparison or three commonly

available logic families.

the most important to understand

Standard TTL NAND Gate

13

What is a totem pole?

In art and history….

Totem poles are carved and painted vertical logs, constructed by many northwest coast native American Indian people. The poles display mythological images, animal spirits whose significance is their association with the lineage. 14

Totem-Pole Output• Most chips you’ve used up to now

have had totem-pole outputs.

Totem pole in TTL ?

• What is totem pole?– addition of an active pull up circuit in the

output of a gate is called totem pole. Using Q3 and Q4 to achieve this purpose

• Why totem pole?– To increase the switching speed of the

gate which is limited due to the parasitic capacitance at the output.

16

Totem Pole Outputs

• The standard TTL output configuration with a HIGH output and a LOW output transistor, only one of which is active at any time.

• A phase splitter transistor controls which transistor is active.

Totem Pole Outputs

Advantages of Totem Pole Configuration

• Changes state faster than open-collector outputs.

• No external components are required.

Totem Pole Switching Noise

• Caused by one output transistor turning off slower than the other turns on.

• Briefly shorts VCC to ground.

• Prevented with use of decoupling capacitors.

NOT Gate 7404

21

NOR Gate 7402

22

AND Gate 7408

23

OR Gate 7432

24

XOR Gate

25

Transistor-Transistor Logic Transistor-Transistor Logic FamiliesFamilies

• Transistor-Transistor Logic Families:– 74L Low power– 74H High speed– 74S Schottky– 74LS Low power Schottky– 74AS Advanced Schottky– 74ALS Advance Low power Schottky

Standard TTL Transistor Switching Problem

• Trs are driven into deep saturation to fully conduct, or cutoff to switch off.

• The result of deep saturation is that the two junctions are now forward biased.

• The forward biasing of the BC junction forces a large number of minority carriers to the collector region.

• When the Tr switches off, these minority carriers needs to be removed. This takes a finite amount of time called the storage time (major component of the propagation delay) and thus increases the switch off time. 27

MOSFET Types

• Depletion-mode.

• Enhancement-mode: – n-channel– p-channel

• CMOS (complementary) constructed from both n- and p-channel transistors.

MOSFET Types

MOSFETMOSFETMETAL OXIDE SEMICONDUCTORMETAL OXIDE SEMICONDUCTOR

FIELD EFFECT TRANSISTORSFIELD EFFECT TRANSISTORSP-CHANNEL ENHANCEMENTP-CHANNEL ENHANCEMENT N-CHANNEL ENHANCEMENTN-CHANNEL ENHANCEMENT

TO TURN ON GATE MUST BELOWER THAN SOURCE

TO TURN ON GATE MUST BEHIGHER THAN SOURCE

TO TURN ONGATE LOWERTHAN SOURCE

DG

S

P-MOS VoutVin

C-MOS

P-MOS

N-MOS

TO TURN ONGATE HIGHERTHAN SOURCE

G

S

D

N-MOS0V

+V5V

10k

0V

5V

+V5V

+V5V

10k

TO TURN ONGATE LOWERTHAN SOURCE

DG

S

P-MOS VoutVin

C-MOS

P-MOS

N-MOS

TO TURN ONGATE HIGHERTHAN SOURCE

G

S

D

N-MOS0V

+V5V

10k

0V

5V

+V5V

+V5V

10k

MOSFETMOSFETMETAL OXIDE SEMICONDUCTORMETAL OXIDE SEMICONDUCTOR

FIELD EFFECT TRANSISTORSFIELD EFFECT TRANSISTORS

MOSFET BIAS Requirements

• Operates in two modes:• Cutoff – acts as a very high

impedance between the drain and the source.

• Ohmic – equivalent of saturation. Acts like a relatively low resistance between the drain and the source.

CMOSCMOSCOMPLIMENTARYCOMPLIMENTARY

METAL OXIDE SEMICONDUCTORMETAL OXIDE SEMICONDUCTOR

CMOSCMOSCOMPLIMENTARYCOMPLIMENTARY

METAL OXIDE SEMICONDUCTORMETAL OXIDE SEMICONDUCTOR

VoutVin

C-MOS

P-MOS

N-MOS

0V

+V5V

CMOS Quiescent vs. Dynamic Current

• Quiescent current flows when the gate is in a steady state and is usually small.

• Dynamic current flows when the gate is changing state.

• The faster a CMOS gate switches, the more current (and the more power) it requires.

Power Dissipation

• The measure of energy used over time by electronic logic gates.

• The product of the voltage and current required for the operation of the circuit.

Fan-InFan-In• Number of input signals to a gate

– Not an electrical property– Function of the manufacturing process

NAND gate with a Fan-in of 8

Fanout Definitions

• Driving gate is the gate whose output supplies current to the inputs of other gates.

• Load gate is a gate whose input current is supplied by the output of another gate.

• A measure of the ability of the output of one gate to drive the input(s) of subsequent gates

Fanout

• The number of gates that a logic gate is capable of driving without possible logic error.

• Limited by the maximum current a gate can supply in a given logic state versus the current requirements of the load.

Fan out

• Also known as loading factor

• Defined as the maximum number of logic inputs that an output can drive reliably

• A logic circuit that specify to have 10 fan out can drive 10 logic inputs

©2009, CE Department

• How many 74LS00 NAND gate inputs can be driven by a 74LS00 NAND gate outputs ?

Solution:

Refer to data sheet of 74LS00, the maximum values of

IOH = 0.4mA, IOL = 8mA, IIH = 20uA, and IIL = 0.4mA

Hence,

fan-out(high) = IOH(max) / IIH (max)=0.4mA/20uA=20

fan-out(low) = IOL(max) / IIL(max)=8mA/0.4mA=20,

the overall fan-out = fan-out(high) or fan-out(low) whichever is lower.

Hence, overall fan-out = 20

ECL

ECLECLEMITTER COUPLED LOGICEMITTER COUPLED LOGIC

8-14 The ECL Digital IC FamilyBasic ECL circuit – differential amplifier

The ECL Digital IC Family

This circuit produces complementary outputs: VOUT1 , equal to VIN ,

and VOUT2 , equal to VIN.

8-14 The ECL Digital IC FamilyECL OROR/NORNOR Gate

The ECL Digital IC Family

The fundamental ECL gate.The basic ECL circuit can be

used as an INVERTER ifthe output is taken at VOUT1.

8-14 The ECL Digital IC Family• ECL characteristics:– Very fast switching with typical propagation delay

of 360 ps—faster than TTL or CMOS.– The standard ECL logic levels are nominally

-0.8 V and 1.7 V for logical 1 and 0 respectively.– Worst-case noise margins approximately 150 mV.– ECL logic gates usually produce an output and its

complement, eliminating the need for inverters.– Current flow remains constant, eliminating noise

spikes

The ECL Digital IC Family

PLD’S

PLD’sMost of these devices are based on a two level structure (sum of products form). AND

planeOR plane

Inputs

outputs

products

In practice this might be represented as: A B C D

A.C + B.C D + A

•The fusible links are made at the x’s, otherwise blown.

PLD notation

outputs

inputs

Inverted inputs A B

A.B + A.B

= B

A + B

outputs

inputs

PLD’s

– The main types of PLD include:

• PLA’s (programmable logic arrays)

• PAL’s (programmable array logic)

• PROM’s (programmable read only memory)

PLA’s A B

A programmable logic array (PLA) has all links programmable in both AND and OR arrays.

Very flexible.

Many applications don’t require such flexibility

PALs– AND plane programmable

– OR plane fixed

– Not so flexible– Operate faster

because hard-wired OR’s switch quicker than programmed links.

A

B

AABB

F4 F1

F5 F8

P1

2

3

programmable links

PAL’s• P = A.notB + notA.B• Use gate 1 to implement

the 1st product term and gate 2 to implement the second

• First term blow F2 and F3• Second term blow F5 and

F8

A

B

AABB

F4 F1

F5 F8

P1

2

3

PALs Shorthand Notation

A B C D E

P

P = A.C.D