DIGITAL ELECTRONICS MULTIPLE CHOICE QUESTIONS -PART-3

51.RAM can be expanded to aa. increase word sizeb. increase word numberc. increase word size or increase word numberd. none of above

52. Which memory is available in all technologiesa. PROMb. EEPROMc. ROMd. EPROM

53. Which memory does not require programming equipmenta. PROMb. EEPROMc. ROMd. EPROM

54. In CCDa. small charge is deposited for logical 1b. small charge is deposited for logical 0 or 1c. small charge is deposited for logical 0 and large charge for logical 1d. none of above

55. The internal structure of PLA is similar toa. RAMb. ROMc. both RAM or ROMd. neither RAM nor RAM

56.An output of combinational ckt depends ona. present inputsb. previous inputsc. both present and previousd .none of above

57.Which are combinational gatesa. NAND & NORb. NOT & ANDc. X-OR & X-NORd. none of above

58.. As access time is decreased, the cost of memorya. remains the sameb. increasesc. decreasesd. may increase or decrease

59. Which is correct:a. A.A=0b. A+1=Ac. A+A=A’d. A’.A’=0

60.A counter is aa. Sequential cktb. Combinational cktc. both combinational and sequential cktd. none of above

61.The parity bit isa. always 1b. always 0c.1 or 0d.none of above

62.In 2 out of 5 code,decimal number 8 isa.11000b.10100c.1100d.1010

63.In number of information bits is 11,the number of parity Bits in hamming code isa.5b.4c.3d.2

64.For a 4096*8 EPROM ,the number of address lines isa.14b.12c.10d.8

65. 23.6 10=……….2a.11111.10011b.10111.10011

c.00111.101d.10111.1

66.BCD number 0110011=…….10a.66b.67c.68d.69

67.The total number of input states for 4 input or gate isa.20b.16c.12d.8

68.In a 4 input OR gate,the total number of High outputs for the 16 input states area.16b.15c.13d. none of above

69.In a 4 input AND gate,the total number of High outputs for the 16 input states area.16b.8c.4d.1

70.a buffer isa. always non-invertingb.always invertingc. inverting or non-invertingd.none of above

71.An AND gate has two inputs A and B and ine inhibits input S.Output is 1 ifa.A=1,B=1,S=1b. A=1,B=1,S=0c. A=1,B=0,S=1d. A=1,B=0,S=0

72. An AND gate has two inputs A and B and ine inhibits input S.Out of total 8 input states,Output is 1 ina. 1 statesb. 2 statesc. 3 statesd. 4 states

73.In a 3 input NOR gate,the number of states in which output is 1 equalsa. 1b. 2c. 3d. 4

74.Which of these are universal gatesa. only NORb. only NANDc. both NOR and NANDd. NOT,AND,OR

75. In a 3 input NAND gate,the number of gates in which output in 1equalsa.8b.7c.6d..5

76. A XOR gate has inputs A and B and output Y.Then the output equation isa.Y=A+Bb.Y=AB+A’Bc.AB+ AB’d.AB’+A’B’

77.A 14 pin NOT gate IC has………..NOT gatesa.8b.6c.5d.4

78.A 14 pin AND gate IC has………..AND gatesa.8b.6c.4d.2

79.The first contribution to logic was made bya. George Booleb. Copernicusc. Aristotled. Shannon

80.Boolean Alzebra obeysa. commutative lawb. associative law

c. distributive lawd. commutative, associative, distributive law

81. A+(B.C)=a. A.B+Cb. A.B+A.Cc. Ad.(A+B).(A+C)

82.A.0=a. 1b. Ac. 0d. A or 1

83.A+A.B=a. Bb. A.Bc. Ad. A or B

84.Demorgan’s first theorem isa. A.A’=0b. A’’=Ac. (A+B)’=A’.B’d. (AB)’=A’+B’85. Demorgan’s second theorem isa. A.A’=0b. A’’=Ac. (A+B)’=A’.B’d. (AB)’=A’+B’

86. Which of the following is truea. SOP is a two level logicb. POS is a two level logicc. both SOP and POS are two level logicd. Hybrid function is two level logic

87.The problem of logic race occurs ina. SOP functionsb. Hybrod functionsc. POS functionsd. SOP and POS functions

88. In which function is each term known as min terma. SOP

b. POSc. Hybridd. both SOP and POS

89. In which function is each term known as max terma. SOPb. POSc. Hybridd. both SOP and Hybrid

90. In the expression A+BC, the total number of min terms will bea.2b. 3c.4d. 5

91.The min term designation for ABCD isa.m0b. m10c. m14d. m15

92. The function Y=AC+BD+EF isa. POSb. SOPc. Hybridd. none of above

93. The expression Y=∏M(0,1,3,4) isa. POSb. SOPc. Hybridd. none of above

94. AB+AB’=a. Bb. Ac.1d. 0

95. In a four variable Karnaugh map eight adjacent cells give aa. Two variable termb. single variable termc. Three variable termd. four variable term

96.A karnaugh map with 4 variables hasa. 2 cellsb. 4 cellsc. 8 cellsd.16 cells

97.In a karnaugh map for an expression having ‘don’t care terms’ the don’t cares can be treated asa. 0b. 1c. 1 or 0d. none of above

98. The term VLSI generally refers to a digital IC havinga. more than 1000 gatesb. more than 100 gatesc. more than 1000 but less than 9999 gatesd. more than 100 but less than 999 gates

99.Typical size of an IC is abouta.1”*1”b. 2”*2”c. 0.1”*0.1”d. 0.0001”*0.0001”

100.A digital clock uses…………..chipa. SSIb. LSIc. VLSId. MSI