digital cfeb (an update) b. bylsma, emu at cms week, march 16, 2009 1 ben bylsma the ohio state...
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Digital CFEB (an Update)
B. Bylsma, EMU at CMS Week, March 16, 2009 1
Ben Bylsma
The Ohio State University
SLHC Phase 1 Upgrade
2B. Bylsma, EMU at CMS Week, March 16, 2009
Fully Instrument ME4/2 Chambers
August 2009 Install/Instrument ME4/2 Test Chambers
OSU Digital CFEB
3B. Bylsma, EMU at CMS Week, March 16, 2009
Replace SCA with Flash ADCs/Memories• Better rate capability • Similar Cost
Propose 514 new cards ME1/1a Old cards to populate ME4/2 Upgrade
• Handle highest particle flux• Restore ME1/1a triggering and
readou t to range 2.1-2.4
Current CFEB
4B. Bylsma, EMU at CMS Week, March 16, 2009
pre SCA ADC+-ref
16 FPGA12 bits
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mux
21 bitsChan-link
21:3
To DMB over Skewclear
280 Mbps
event LCT Release Caps~20µS
L1A~3.2µS
Analog storage with L1A*LCT coincidenceAnalog storage - no coincidence
Analog storage Digitization and Readout
Basic Block Diagram:
Time Line:
Analog samples are stored until L1A.Then ADC must digitize 8X16 samples one at a time.Limited number of capacitors and single channel ADC impose constraints onLCT and L1A latencies.
6 layers
8 Triad signalspre comp
16
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. 6 layers
24 bitsLVDS
To TMB over Skewclear
80 MHz
2:1
3x8
3x8
New Digital CFEB
5B. Bylsma, EMU at CMS Week, March 16, 2009
Basic Block Diagram:
Time Line:
No Dead Time.All 96 channels continuously digitized (no multiplexing).
event LCT ~20µSL1A~3.2µS
FIFOFIFO
Readout
Pipeline
Digitization Latency
xfer
pre
ADC+-
ref
16 FPGA
8 pairs
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6 layers
SerialOpt. Trnscvr
To DMB over Fiber~1Gbps
MGT ADC+-
8
8
ref
8 pairs
16 pairsPipeline/FIFOs
Serial LVDS
8 Triad signalspre comp
16
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.
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.
. 6 layers
48
To TMB over Skewclear
SerialOpt. Trnscvr
~2Gbps
MGT
First Step – Choose ADC
6B. Bylsma, EMU at CMS Week, March 16, 2009
• ADC choice drives subsequent design considerationsInterface between pre-amp and ADCVoltage/Power requirements
- Could impact LVDB design• ADC choices:(8 ch, 12 bit, 20-65 MSPS, Serial LVDS output)
MAX1437 (Maxim) 1.8V supply, 1.4Vpp range
ADC12EU050 (National) 1.2V supply, 2.1Vpp range
AD9222 (Analog Devices) 1.8V supply, 2Vpp range
ADS5281 (Texas Instr.) 3.3V analog, 1.8V digital, 2Vpp range
Issues with ADCs
7B. Bylsma, EMU at CMS Week, March 16, 2009
• None are suitable drop-in replacements for SCA/ADC- ADC’s
All have differential inputs Limits on common mode Have internal input bias network
- Pre-Amp Single ended output Limited range of baseline level Designed to drive small capacitive load
- Pre-Amp/ADC Interface Mnfr. suggest transformer coupling
(not an option for us) Amplifier to generate differential signal
(requires 96 amplifiers) Direct couple single ended signal
(common mode consequences)(level shifting/scaling)
AC couple single ended signal(common mode consequences)(no level shifting, but still have biasing to consider)
Evaluation Boards
8B. Bylsma, EMU at CMS Week, March 16, 2009
• Purchased Evaluation Boards for ADS5281 and AD9222• Basic Setup:
Input Circuitry
ADC+- DeSer
Logic Analyzer
• Identify constraints/operation limits of ADC Direct Coupling Concerns
- Common ModeData Sheet: Vcm = 1.5±0.05VHow far from nominal?Baseline Level
- RangeDigital output range is 2VBut is linear range of common mode 2V?
AC Coupling Concerns- Same as direct coupling- No worries with pre-amp baseline level- But need to bias positive input
Constraints (ADS5281)
9B. Bylsma, EMU at CMS Week, March 16, 2009
• ADC Constraints: Vcm -600mV < (IN+ + IN-)/2 < Vcm +300mV (1.8Vpp on IN+)
(IN- -1V) < IN+ < (IN-+1V) (ADC output range)
• Pre-Amp Constraints: Baseline Level
- Currently 1.8V- Max ~2.0V- Min ~1.2V (maybe 1.0V)
Drive Capability- Small (few mA at best)
• Scaling: Scale down input Add digital gain on output Resistor divider
Vcm
1.2k
1.2k
Digitize Amplifier Pulses
10B. Bylsma, EMU at CMS Week, March 16, 2009
Connect CFEB to Evaluation Board:
0.5 1 1.5 20.000000
0.500000
1.000000
1.500000
2.000000
2.500000
Series1
Series3
Series5
Series7
Series9
Series11
50ns samples
Current DCFEB R&D Status
11B. Bylsma, EMU at CMS Week, March 16, 2009
Evaluating ADCExploring Options for Interfacing to ADC
Direct CouplingAC CouplingAmplifier CouplingScaling