designing for ultra low power: mechanisms for...

DESIGNING FOR ULTRA LOW POWER: MECHANISMS FOR REDUCING ENERGY

CONSUMPTION Herman Roebbers, Altran Netherlands

February 15, 2018• 040coders.nl meetup

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CONTEXT

040coders meetup, Feb. 15, 2018 © H. W. Roebbers3

I HAVE A DREAM

IoT Edge NodeEnergy

Harvester

IoT Edge Node


WHY LOSE THE BATTERIES?

Think 20 bln IoT devices

• That’s tens of billions of spent batteries/yr!

• A huge environmental burden

- Toxic

- Explosive


HOW TO LOSE THE BATTERIES?

By using no more energy than harvesting can deliver:

Energy-autonomous IoT systems

• ULP is a necessity for Energy-autonomous IoT end nodes

• But there are other reasons ULP may be necessary


WHY ELSE ULTRA LOW POWER?

• Long operating lifetime required• Huge cost of batteries and replacement

- Replacement not always possibleo Sensor poured in concreteo Sensor on dorsal fin of shark

- Employing people to replace them is even more expensive

• Batteries are environmental hazard• Because regulations require it (EnergyStar, ;)

• Even when powered by mains, reduction of energy consumption diminishes pollution by power plants

If we can get by with really little power: Harvest energy from environment (solar/thermo/piezo/vibration/RF,;) ☺

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WHO AM I


INTRODUCTION

Herman Roebbers, Advanced Expert @ Altran Netherlands B.V.


ALTRAN: GLOBAL LEADERIN ENGINEERING AND R&D SERVICES

€ 2.9 bln

2017 Revenues

AMERICAS

EUROPE

ASIA

44.000+

Innovation Makers

9

Industry segments

30+

Countries


INTRODUCTION

Herman Roebbers, Advanced Expert @ Altran NL


INTRODUCTION

Who did I work with or for


INTRODUCTION

ULP related activities

Holst Centre, 2009 – 2011: in ULP group

• Re-architect WBAN radio and base station SW, adding UWB radio.

• Interfaced WBAN base station to Android mobile phone (paper)

• Benchmarked Holst Centre ASIC against EFM32 Gecko for ECG data processing.

Altran/HTI/T2Prof, 2014 –: Creator and teacher of ULP workshop

• Originally for Altran

• Adapted after feedback from T2Prof

• Part of Altran Embedded Academy curriculum

• Given at

• Altran Netherlands times

• Altran Belgium 1 time

• Embedded world Conference 2 times (1-day version)

• High Tech Institute 2 times (December 2015, Nov 2017)

Altran, 2013 - : Thought leader in ULP and embedded matters, 1 day/wk.

EEMBC, 2016 –: Independent external advisor to 3 Working Groups:

• ULPMark (Core Profile and Peripheral Profile)

• IoTMark-BLE

• SecureMark

Created IoTMark-BLE demo suitcase

Ported IoTMark-BLE to Silicon Labs Thunderboard Sense board


INTRODUCTION


Windesheim Zwolle (polytechnic), 2017 –: external lecturer on ULP:

Provided curriculum subject matter (ULP workshop)

Coaching 2 students on ULP investigation project:

Energy-Autonomous (Meeting) Room Display

Fontys Eindhoven (polytechnic), 2017: coaching and grading ULP project:

Energy Consumption Profiling for Embedded Devices


INTRODUCTION


TTW NWO, 2016 –: member of user committee for project ZERO:

Energy-Autonomous Systems for IoT

• Twente University, TUD, TU/e.

• 14 companies

Subprojects:

• P1: Autonomous Parking Systems

• P5: Dependable Autonomous Mobile Computing

Altran, 2017-2018 – Pushing innovation project proposal

Energy-Autonomous (Meeting) Room Display

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ANATOMY LESSON


INTERNET OF THINGS

High level diagram

IoT edge

node

(wired)

Data

Analytics

Back

end

IoT edge

node

(wireless)

internet

Here we want / need

Ultra Low Power

e.g. VueForge


ANATOMY OF AN IOT EDGE NODE

• Where we (mostly) are

IoT edge

node

(wireless)Energy

sourceHardware



• Where we need to be

IoT edge

node

(wireless)

Harvester Hardware



Harvester

Energy

Storage

Energy

Conversion

http://www.npl.co.uk/upload/img/piezoelectric-energy-harvester.jpg



Hardware

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FACTORS INFLUENCING ENERGY CONSUMPTION

Sensor

application



Energy

consumption

Processor

Low

Power

Modes

Printed Circuit

Board

OS

configuration

Application

SW

HW

accelerators

Radio Protocol

(Zigbee / BLE /

Zwave / WiFi /

LoRa, ;)Radio

Technology

Radio

Frequency (2.4

GHz, 868 Mhz,

433 MHz, ;)

Battery

technology

Compiler &

compiler

settings

There are many factors and then some;

Process

Technology

IP blocks

Sensor

application



Energy

consumption

Processor

Low

Power

Modes

Printed Circuit

Board

OS

configuration

Application

SW

HW

accelerators

Radio Protocol

(Zigbee / BLE /

Zwave / WiFi /

LoRa, ;)Radio

Technology

Radio

Frequency (2.4

GHz, 868 Mhz,

433 MHz, ;)

Battery

technology

Compiler &

compiler

settings


Process

Technology

IP blocks

Hardware

Sensor

application



Energy

consumption

Processor

Low

Power

Modes

Printed Circuit

Board

OS

configuration

Application

SW

HW

accelerators

Radio Protocol

(Zigbee / BLE /

Zwave / WiFi /

LoRa, ;)Radio

Technology

Radio

Frequency (2.4

GHz, 868 Mhz,

433 MHz, ;)

Battery

technology

Compiler &

compiler

settings


Process

Technology

IP blocks

Hardware

Software

Sensor

application



Energy

consumption

Processor

Low

Power

Modes

Printed Circuit

Board

OS

configuration

Application

SW

HW

accelerators

Radio Protocol

(Zigbee / BLE /

Zwave / WiFi /

LoRa, ;)Radio

Technology

Radio

Frequency (2.4

GHz, 868 Mhz,

433 MHz, ;)

Battery

technology

Compiler &

compiler

settings


Process

Technology

IP blocks

Hardware

Software

HW+SW


Power

Management

works at all

these levels

Overview of Power Management Mechanisms

Level Mechanism Domain

Application Event driven, uses DMA, HW event

mechanisms, Low Power Modes, ;

SoftwareOperating

system

power API

Operation Performance Points API

Driver Suspend / resume API

Board Dynamic Voltage and Frequency Scaling

Power Gating via I/O pin

Controlling Voltage Regulator via I/O / I2C Hardware /

SoftwareChip Power Gating

(Automatic) Clock Gating

Clock Frequency management

Dynamic Power Switching

Adaptive Voltage Scaling

Static Leakage Management

HardwareIP block / chip Power Gating State Retention

IP block / RTL Automatic power / clock gating

Transistor Body Bias, FinFet, Sub-Threshold

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EFFECT OF COMPILER SETTINGS


REDUCING ENERGY CONSUMPTION: SOFTWARE MECHANISMS

The ones you didn’t think mattered that much

• Compiler

- Can make 10’s of % difference

• Compiler settings

- Can make 100’s of % difference

• Data and code location

Problem:

• You cannot predict what settings give best results

- So measure!


REDUCING ENERGY CONSUMPTION: SOFTWARE MECHANISMS

GCC 4.8.3 Routine Compiler settings Run-time ms Code Size Current mA Energy uJ

mat_mul_simple -O2 16.75 192 2.99 165.45

mat_mul_faster -O2 13.00 224 3.06 129.35

mat_mul_simple -O1 17.50 188 3.08 165.45

mat_mul_faster -O1 15.13 200 3.07 152.14

mat_mul_simple -O3 16.25 192 3.07 165.13

mat_mul_faster -O3 15.25 244 3.05 152.52

mat_mul_simple -Os 25.13 140 3.07 253.15

mat_mul_faster -Os 29.88 168 3.12 307.59?

mat_mul_simple -O0 69.00 264 3.07 695.20

mat_mul_faster -O0 64.75 284 3.11 661.35

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APPROACH TO REDUCING ENERGY CONSUMPTION


REDUCING ENERGY CONSUMPTION: APPROACH

Software architecture

• From super loop to event driven

• Use DMA to allow CPU to sleep while gathering / sending data

• Use low power modes where possible

• Where possible use hardware mechanisms to have peripherals send each other events

without CPU intervention


REDUCING ENERGY CONSUMPTION: APPROACH

When you start, it is good to have a baseline measurement, and compare it to other systems.The Embedded Microprocessor Benchmarking Consortium (EEMBC, http://eembc.org) can help with this.

Keep tracking energy consumption during development

ULP benchmarks*:• ULPMark(Core / Peripheral Profile)• IoTMark-BLE• IoT-Security

*I’m an independent external advisor to these WGs

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SOFTWARE DEVELOPMENT STRATEGY:MATCHING SOFTWARE TO HARDWARE CAPABILITIES


MATCHING SOFTWARE TO HARDWARE CAPABILITIESSOFTWARE DEVELOPMENT STRATEGY

Strategy for the software development:

• Follow the hardware developments.

• Go through a typical use case, where implementation makes quite a difference to energy

consumption.


EARLY DAYS

MCU / SoC

CPU Core

Peripherals

D

a

t

a

D

a

t

a

Bus

Bus Master

Bus slaveMemory

D

a

t

a


POLLING

Standard (naive) behavior when waiting for hardware event:

while (! event_occurred())

{

/* polling, busy waiting */

}

This keeps the CPU active, as well as the code memory.

These are both significant contributors to energy consumption, especially if the code resides

in flash memory (leaving aside possible instruction caching).


DATA MOVED BY DMA. COMPLETION INTERRUPT SIGNALS CPU.

MCU / SoC

CPU Core

Peripherals

D

a

t

aI

n

tD

a

t

a

Bus

Bus Masters

Bus slaves

DMA

D

a

t

a

Compl

Int

Memory

D

a

t

a


DATA MOVED BY DMA. COMPLETION INTERRUPT SIGNALS CPU.

Main program:

volatile bool done = false;

setup_peripherals_and_DMA();

while ( ! done )

{

/* Check periodically, only core internal access *//* Checking periph. registers delays bus access by DMA *//* This can significantly delay peripheral/DMA operation! *//* And consumes much more energy. */__delay_cycles(CHECK_INTERVAL);

}

Interrupt handler:

void ISR_DMA_done( void )

{

/* Clear int. source */

done = true;

}


LET CPU SLEEP UNTIL INTERRUPT

MCU / SoC

CPU Core

Peripherals

D

a

t

aI

n

tD

a

t

a

Bus

Bus Masters

Bus slaves

DMA

D

a

t

a

Compl

Int

Memory

D

a

t

a


LET CPU SLEEP UNTIL INTERRUPT

Using interrupt and CPU with sleep support:

volatile bool done = false;

setup_peripherals_and_DMA();

while (! done)

{

/* special instruction, CPU sleeps */

wait_for_interrupt();

}

Stops the CPU until interrupt occurs, saving energy by

• Stopping CPU clock

• Stopping accesses to code memory

void ISR_event_occurred(void)

{

clear_interrupt_source();

done = true;

}


HW GENERATES EVENTS, COMPLETION EVENT SIGNALS CPU

MCU / SoC

CPU Core

Peripherals

D

a

t

aI

n

tD

a

t

a

Bus

Bus Masters

Bus slaves

DMA

D

a

t

a

Memory

D

a

t

a

HW Event

“handler”

D

a

t

a

e

v

e

n

t

s

eventsevents

© H.W. Roebbers 2016-

09-27


Event “Handler” is like a switch board for signals

Peripheral can be event provider, event consumer or both

DMA

Event matrix: connects producer to consumer(s)

ADCGPIO

GP

IO g

oes h

igh

GP

IO g

oes h

igh

DM

A trig

ger

DM

A trig

ger

Sta

rt convers

ion

Sta

rt convers

ion

Convers

ion d

one

Convers

ion d

one

Memory

SignalsSignals

CPU

DM

A d

one

DM

A d

one

Wakeup

Wakeup


HW GENERATES EVENTS, COMPLETION EVENT SIGNALS CPU

setup_hardware_for_event_generation()

wait_for_event(); /* CPU instruction, CPU sleeps */

Stops the CPU until HW event occurs, saving energy by

• Stopping CPU clock saves energy

• Stopping memory accesses to retrieve CPU code

• No interrupt overhead


ENERGY CONTROL, MANAGING POWER STATE TRANSITIONS

MCU / SoC

CPU Core

Peripherals

D

a

t

a

D

a

t

a

Bus

Bus Masters

Bus slaves

DMA

D

a

t

a

Memory

D

a

t

a

HW Event

“handler”

D

a

t

a

Energy

Control

D

a

t

a


ENERGY CONTROL, MANAGING POWER STATE TRANSITIONS

Using event mechanism, power/energy control unit and CPU with event sleep support:

setup_hardware_for_event_generation();

select_energymode_while_waiting();

wait_for_event(); /* CPU sleeps, lower power mode */

Stops the CPU until HW event occurs, saving energy by

• Stopping CPU clock saves energy

• Stopping memory accesses to retrieve CPU code

• Obviating interrupt overhead

• Allowing system to go into deeper sleep, saving more energy

Attainable sleep mode depends on actual peripheral(s) used

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WHO CONSUMES MY ENERGY


SLIGHTLY DETAILED HARDWARE VIEW OF A TYPICAL SYSTEM.

Component specifics will be examined hereafter

Energy

Power

Mgt

IC(s)

MCU / SoC

I/O

External

Memory /

Devices

VCORE

VIO

VBAT

VB

AT

VMEM

I/O

System


REGULATORS ALSO CONSUME ENERGY.

There are big differences in regulator efficiency.

The fewer output voltages the better!

Efficiency > 97 % is possible for switching regulators (more expensive).

Energy

Power

Mgt

IC(s)

VCORE

VIO

VBAT

VB

AT

VMEM

System


MORE DETAILED HARDWARE VIEW OF THE SYSTEM.

Component specifics will be examined hereafterSystem

Energy

Power

Mgt

IC(s)

MCU / SoC

CPU Core

Flash

Peripherals

RTC

I/O I/O

External

Memory /

Devices

VCORE

VIO

VBAT

EBIVMEM

I/OClocking

SRAM


MEMORY

• Flash- Uses a lot of power compared to SRAM- Requires extra internal power regulator- So requires some startup time from Power On- Sometimes has “sort of” cache HW- May require wait states at higher frequencies- Try to locate often used code in SRAM- Sometimes can be switched off to save power- Typical access time 12,5 – 125 ns (on-chip)

• SRAM- Uses very little energy ( < 1 µA Iretention on MSP430)- Typical access time 2-60 ns. Much faster than flash.

• F(e)RAM. Non-volatile- Read speed 125 ns. Comparable to flash- Write speed 125 ns. Much faster than flash

MCU / SoC

CPU Core

Peripherals

RTC

I/O

EBI

Clocking

Flash SRAM

(C) H. W. Roebbers52

FRAM (INSIDE TI MSP430FRX WOLVERINE SERIES)

Non-volatile RAM (FerroElectric RAM)

Advantages:• Faster than flash (< 50 ns)• Low voltage (1.5 V), no charge pumps necessary like for flash

- Less energy• Byte write, no erase necessary• (Virtually) unlimited nr of writes (1015)• Programmable division between write-protected and read-write part (Flash based MCU does not give

you that option)• Very resilient against radiation, much better than DRAM or SRAM

Disadvantages• Lower amount: Currently max FRAM size = 256 kB• More expensive than flash

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CONCLUSIONS


CONCLUSIONS

• Ultra Low Power is a system issue. It is also multi-disciplinary (hardware / software)

• Many power reduction mechanisms exist at different system levels

• There is a stepwise software approach to attaining Ultra-Low Power / energy consumption.

• It requires thorough understanding of both application and hardware.

• It involves making tradeoffs.

• For best results

- Understand available hardware, software and mechanisms

- Use them wisely


WANT TO KNOW MORE?

Email me: [email protected]

Follow my 2-day hands-on workshop:

http://www.hightechinstitute.nl/en/training/software/ultra_low_power_for_internet_of_things/

It is possible to run the workshop on-site

Altran offers various services related to ULP

Some icons by Freepik from www.flaticon.com

QUESTIONS?

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