dell xps m1210

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet o fLA-3001P 0.4

Cover Sheet

1 73Monday, April 17, 2006

Compal Electronics, Inc.

COMPAL P/N :PCB NO :

COMPAL CONFIDENTIALMODEL NAME : HAL31(Discrete) & HAL30(UMA)

Bali (DIS&UMA) Schematics DocumentuFCPGA Mobile YonahIntel Calistoga + ICH7M

REV : 0.5 (DELL: X03)

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

LA-3001P

PCB P/N: DA800004W0L

BOM NO:

45140031L11 (For Discrete)

@ : Nopop Component

2@ : Bali with descrete Used Only 1@ : UMA Used Only

45140031L01 (For UMA)

45140031L01 (For UMA)45140031L11 (For Discrete)

2006-04-14

Part Number Description

DA800004W0L PCB LA-3001PREV0.4 MB

MB PCB

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title



Block Diagram



Clock Generator

uFCPGA CPU

INTEL

DMI

H_D#(0..63)H_A#(3..31)

Compal confidentialModel : Bali

Pentium-M

Block Diagram

Power On/OffSW & LED

System Bus

INTEL

Memory BUS(DDR2)

FSB 533/667 MHz

+1.5V_RUN 100MHz

+1.8V_SUS 400/533 / 667MHz

ATA100

1466pin BGA

CK410M+

Calistoga

ICH7-M

+1.8V_SUS

+1.5V_RUN

+VCCP (1.05V)

+VCC_CORE

+VCCP (1.05V)

+3V_RUN

BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8DDRII-DIMM X2

+0.9V_DDR_VTT

+1.8V_SUS

478pin

DC/DC Interface

CPU ITP Port+FAN1_VOUT Yonah-2M (Merom Support)

+3V_RUN

+2.5V_RUN

1.5V/1.05V BATT IN

+VDD_CORE

3V/5V/15V

GUARDIAN IIEMC4000

Thermal

+3V_SUS

FAN

+VCCP

Power Sequence


652pin BGA

page 7,8,9

page 16page 16

page6page 7

page 10,11,12,13,14,15

page 21,22,23,24

page 40

page 50

page 38

page 39

page 33

page 35page 37

page 17,18

+3V_SUSST M25P80

Int.KBD

SMSC KBC

+3.3V_ALW+RTC_CELL

MEC5004SPI

LPC BUS+3V_RUN33MHz

SMSC SIO

+3.3V_ALW

ECE5011

page 31

PCI-E 16X

LVDS CONNpage 19

page 44,45,46,47,48,49,50

G72M

Mini Card 2WLAN

Mini Card 1

+3V_RUN

PCI Express BUS

+1.5V_RUN

+3V_RUN/ +1.5V_RUN 100MHz

page 29

WWANpage 29

Bluetooth+3V_RUN

USB[2]

+VCCP

+3V_RUN

+3V_SUS

+1.5V_RUN

page 25

SPI

+INV_PWR_SRC+LCDVDD

+1.22V_GFX_PCIE+VCC_GFX_CORE

+5VRUNTV CONN

page 20

BC BUS

SPDIF

48MHz

+5VRUNVGA CONN

page 20

page 25+5V_SUS

USB[7]USB[6]

Left

USB Ports X2 USB Ports X2+5V_SUS

USB[1]Right

IO/B

IO/B

IO/B

AMP & INT.Speaker

Azalia Codec

MDC

STAC9220

Azalia I/F

HeadPhone &MIC Jack+VDDA

+5V_SUS

+3V_RUN

+3V_SUS

+3V_RUN

IO/B

CD-ROM+5V_MOD

S-HDD+5V_HDD

On I/O daughter Card

IO/B IO/B

ExpressCard CONN+3V_RUN+3V_SUS+1.5V_RUN

USB[3]

IO/B

page 27

S-ATA 0/2

ATA100

VCORE (IMVP-6)

CHARGER

1.8V/0.9Vpage 41

page 42

page 43

PCI Express BUS+3V_RUN/ +1.5V_RUN 100MHz

IDSEL:AD17(PIRQC,D#,GNT#1,REQ#1)

1394 RJ455 in 1 CardReader

+3V_SUS

CONN

BCM4401KQL+3V_LAN

IDSEL:AD16(PIRQC#,GNT#4,REQ#4)

R5C832

PCI BUS+3V_RUN 33MHz

For Integrity UMA Graphic

USB[0]

48MHz

DC INpage 37

page 25

page 30

page 28 page 26

page 30

+3V_RUN+1.5V_RUN

page 28 page 29 page 27

8X32M GDDR3 x2

page 34

Touch Padpage 34

RJ11


+5V_RUNCamera

On LCD Panel

USB[4]

USB[5]

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title



Index and Config.



PIRQ

+1.05V_VCCP

PM TABLE

PCI DEVICE IDSEL

S0

PCI TABLE

S3

+3.3V_SUS

+5V_SUS+5V_ALW

S1

S5 S4/AC don't exist

+1.8V_RUN

+VCC_CORE

REQ#/GNT#

+5V_RUN

ON

powerplane

+3.3V_RUN

S5 S4/AC

+3.3V_ALW

State+1.8V_SUS

OFF

ON

ON

ON

ON

ON

ON ON

ON

OFF

OFF

OFF

OFFOFF

+0.9V_DDR_VTT

LAN



JUSB2 (Ext Back Left Side)

JUSB1 (Ext Back Right Side)

2

3

1

4

USB PORT#

0

DESTINATION

6

5 WWAN

7

EXPRESS CARD

2

3

1

4

0

ICH7-M

SIO ECE5011

MINI CARD-2 WLAN

None

EXPRESS CARD

PCI EXPRESS

Lane 1

DESTINATION

Lane 2

Lane 3

Lane 4

+15V_SUS

+3.3V_SRC

+2.5V_RUN

REQ#3/GNT#3AD16 IRQB

AD17 REQ#2/GNT#2 IRQCMINI CARD-1 WWAN

+1.22V_GFX_PCIE

+VCC_GFX_CORE


None

R5C832

Blue Tooth

CCD Camera

IRQD


+1.5V_RUN

None

None

None

None

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title



Power Rail



+5V_ALW

+5V_SUS

BATTERY +PWR_SRC

ADAPTER

+VCC_CORE

SU

S_O

N

+5V_HDD +5V_MOD +5V_RUN +VDDA

+1.5V_RUN

+15V_SUS



Charger

AUD

IO_A

VD

D_O

N

L57(Option)

+3.3V_SRC+3.3V_SUS

SUS_ON

RUN_ON+3.3V_RUN

SI3456(IO/B)

HD

DC

_EN

#

SI3456(IO/B)

MO

DC

_EN

#

SI4810(Q28)

RU

N_O

N 793475(IO/B) PL8 & PD8

+3.3V_LAN

ADP3207(PU7)

ENAB_3VLAN

ISL6227(PU4)

+1.05V_VCCP

MAX8632(PU5)

+1.8V_SUS +0.9V_DDR_VTT

RU

N_O

N

RU

N_O

N

SU

SP

WR

OK

_5V

ALWON

MAX8632/ISL88550

(PU13)

+VCC_GFX_CORE

+1.8V_RUN

GFX_RUN_ON

+1.22V_GFX_PCIE

SI4800(Q35)

RU

N_O

N

ALWON+3.3V_ALW

+2.5V_RUNGUARDIAN II

RU

N_O

N

AUX_EN

RU

NP

WR

OK

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title



SMBUS TOPOLOGY


Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY


+3.3V_SUS

2N7002

2N7002

+3.3V_RUN

7

8

SMBUS Address [D2]

SMBUS Address [2F]

2.2K 2.2K 2.2K 2.2K

8 7

MINI WWAN Card

3032

SMBUS Address [TBD]

CLK_SCLK

CLK_SDATA

+3.3V_ALW

10K 10K

B22

C22

17

16

CLK GEN.

Macallan IV

ICH7-M

DAT_SMB +3.3V_ALW

CLK_SMB

GUARDIAN II

ICH_SMBDATA +3.3V_SUS

ICH_SMBCLK

10

9

SIO

195

SMBUS Address [A0]

DIMMB

DIMMA

SMBUS Address [A2]

197

197

195

Express Card

SMBUS Address [TBD]

MINI WLAN Card

CHARGER

8

7

+3.3V_ALW

8.2K8.2K

PBAT_SMBCLK

PBAT_SMBDAT +3.3V_ALWBATTERYCONN

100

100

SMBUS Address [16]

SMBUS Address [12]

3

4

9

10

SBAT_SMBDAT111

112

+3.3V_ALW

+3.3V_ALW

SMBUS Address [58]5

6SBAT_SMBCLKInverterLVDS connector

8.2K 8.2K

SMBUS Address [TBD]

32 30

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+CK_VDD_48

+CK_VDD_REF

ICH_SMBDATA

ICH_SMBCLK

CLK_SDATA

CLK_SCLK

+CK_VDD_A

+CK_VDD_A

PCI_ICH

CLK_ICH_14M

CLK_PCI_PCCARD PCI_PCCARD

PCI_LOM

CLK_PCIE_VGA

CLK_PCIE_VGA#

MCH_DREFCLK

+CK_VDD_REF

MCH_DREFCLK#

CLK_XTAL_OUT

CLK_XTAL_IN

CPU_ITP#

CLK_CPU_ITPCPU_ITP

H_STP_CPU#

CLK_MCH_BCLK#MCH_BCLK#

CPU_BCLK

CPU_BCLK#

CLK_CPU_BCLK

CLK_PCIE_EXPCARD

CLK_PCIE_EXPCARD#

CLK_MCH_BCLK

H_STP_PCI#

CPU_MCH_BSEL0FSA

CLK_PCIE_MINI1

CLK_PCIE_MINI1#

CPU_MCH_BSEL1

FSC

CLK_ICH_48M

FSA

DREF_SSCLK

DREF_SSCLK#

DOT96_SSC

DOT96_SSC#

DREF_SSCLK

DREF_SSCLK#

CLKREF

DOT96

CLK_ENABLE#

CLKIREF

CLK_SDATA

CLK_SCLK

CLK_CPU_BCLK#

CLK_CPU_BCLK

CLK_MCH_BCLK

CLK_MCH_BCLK#

CLK_CPU_ITP#

CLK_PCIE_MINI2#

CLK_CPU_ITP

CLK_PCIE_MINI2

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

CLK_PCIE_SATA#

CLK_PCIE_SATA

CLK_PCIE_ICH#

CLK_PCIE_ICH

CLK_CPU_ITP#

MCH_BCLK

CLK_CPU_BCLK#

MCH_DREFCLK#

MCH_DREFCLK

+CK_VDD_48

PCIE_VGA CLK_PCIE_VGA

CLK_PCIE_VGA#PCIE_VGA#

CLK_3GPLLREQ#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

MCH_3GPLL

MCH_3GPLL#

CLK_PCIE_MINI2

CLK_PCIE_MINI2#

PCIE_MINI2

PCIE_MINI2#

MINI2CLK_REQ#

CLK_PCI_ICH

DOT96

DOT96#

XTALIN_CLK_GEN

CLK_PCI_LOM PCI_LOM

PCI_SIOCLK_PCI_5004

DOT96# PCIE_MINI1

PCIE_MINI1#

CLK_PCIE_MINI1

CLK_PCIE_MINI1#

MINI1CLK_REQ#

PCIE_EXPCARD

PCIE_EXPCARD#

CARD_CLK_REQ#

CLK_PCIE_EXPCARD

CLK_PCIE_EXPCARD#

SATA_CLKREQ#

CLK_PCIE_SATA#

CLK_PCIE_SATAPCIE_SATA

PCIE_SATA#

CLK_PCIE_ICH

CLK_PCIE_ICH#

PCIE_ICH

PCIE_ICH#

XTALIN_CLK_GEN

+CK_VDD_MAIN

+CK_VDD_MAIN2

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

H_STP_PCI# <23>

CLK_MCH_BCLK# <10>

CLK_MCH_BCLK <10>

CLK_CPU_BCLK# <7>

CLK_CPU_BCLK <7>

CLK_CPU_ITP <7>

CLK_CPU_ITP# <7>

ICH_SMBCLK<23,29,36>

ICH_SMBDATA<23,29,36> CLK_SDATA <17,18>

CLK_SCLK <17,18>

CLK_ICH_48M<23>

CLK_ICH_14M<23>

CLK_PCI_PCCARD<28>

H_STP_CPU# <23>

DREF_SSCLK <10>

DREF_SSCLK# <10>

MCH_DREFCLK<10>

MCH_DREFCLK#<10>

CPU_MCH_BSEL1<8,10>

CPU_MCH_BSEL2<8,10>

CLK_ENABLE#<42>

CPU_MCH_BSEL0<8,10>

CLK_PCIE_VGA# <44>

CLK_PCIE_VGA <44>

CLK_MCH_3GPLL <10>

CLK_MCH_3GPLL# <10>

CLK_3GPLLREQ# <10>

CLK_PCIE_MINI2# <29>

CLK_PCIE_MINI2 <29>

MINI2CLK_REQ# <29>

CLK_PCI_ICH<21>

XTALIN_CLK_GEN<44>

XTALSSIN_CLK_GEN<44>

CLK_PCI_5004<30>

CLK_PCIE_MINI1 <29>

CLK_PCIE_MINI1# <29>

MINI1CLK_REQ# <29>

CLK_PCIE_EXPCARD <36>

CLK_PCIE_EXPCARD# <36>

CARD_CLK_REQ# <36>

CLK_PCIE_SATA <22>

CLK_PCIE_SATA# <22>

SATA_CLKREQ# <23>

CLK_PCIE_ICH# <23>

CLK_PCIE_ICH <23>

CLK_PCI_LOM<26>

Title



Clock Generator




FCTSEL1(PIN34) PIN44 PIN47 PIN48

0

1

DOT96T DOT96C 96/100M_T 96/100M_C

27M_out 27M SSout SRCT0 SRCC0

CPU_BSEL

0

Reserve

31

G S2N7002

2

D

Table : ICS954305AK

1

*

CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU

MHzSRCMHz

PCIMHz

266

133

200

166

333

100

400

100

100

100

100

100

100

100

33.3

33.3

33.3

33.3

33.3

33.3

33.3

0 0 0

00

0

0

0

00

0

0

1

1

1 1

1

1

1

1 1

1

1

PIN43

CPU_BSEL2(FSC) CPU_BSEL1(FSB)

133

166

0 0

1

Place near each pinW>40 mil

Place near CK410+

Place crystal within500 mils of CK410M

Placec these caps closed to CK410M

UMA

Pop R451 for 27MHzoutput for G72

Pop Ra,Rb,Rc, Rd for 27MHz output for G72spectrum input

Ra

Rb

place Decoupling as closed physically possible to each VDD oins

Routing trace length DOT96/DOT96# <50mil

Swap signals forsmooth routing

Rc

Rd

Discrete

Change to ECJCV50J106M 6.3V10UF 0805 X5R M H:0.85mm, wait CIS symbol.

R459

33_0402_5%~D

2@1 2 R209 33_0402_5%~D

1 2

R146 33_0402_5%~D

1 2

R208 49.9_0402_1%~D

1 2

R125 33_0402_5%~D

12

R154 33_0402_5%~D

1 2

R4551_0603_5%~D 1 2

R456

150_0402_5%~D

2@12

C569

0.047U_0402_16V4Z~D

1

2

R222 49.9_0402_1%~D

1 2

R171 49.9_0402_1%~D

1 2

R207 33_0402_5%~D

1 2

R589

2.2K_0402_5%

~D

12

L48

BLM21PG600SN1D_0805~D

1 2

R472 10K_0402_5%~D

1 2

R45791_0402_5%~D

2@

12

R126 10K_0402_5%~D 1 2

R187 49.9_0402_1%~D2@1 2

C543

0.047U_0402_16V4Z~D

1

2

R213 33_0402_5%~D

1 2

R123 33_0402_5%~D

12

R214 33_0402_5%~D

1 2

R162 33_0402_5%~D

1 2

R161 33_0402_5%~D1@1 2

R224 49.9_0402_1%~D

1 2

R451

10K_0402_5%~D

2@

12

C549

0.047U_0402_16V4Z~D

1

2

R212 33_0402_5%~D

1 2

R225 49.9_0402_1%~D

1 2

R220 49.9_0402_1%~D

1 2

R124 10K_0402_5%~D

1 2

R186 33_0402_5%~D2@1 2

R143 49.9_0402_1%~D1@1 2

C540

0.1U_0402_16V4Z~D

1

2

R128 33_0402_5%~D

12

R464 475_0603_1%~D

1 2

X2

14.31818MHz_20P_1BX14318CC1A~D

12

R575

2.2K_0402_5%

~D

12

R452

10K_0402_5%~D1@

12

G

D S

Q502N7002_SOT23~D

2

1 3

R159 49.9_0402_1%~D

12

R122 33_0402_5%~D

12

R169 49.9_0402_1%~D

12

C17427P_0402_50V8J~D

1 2

R185 49.9_0402_1%~D2@1 2

R173 33_0402_5%~D

1 2

R221 49.9_0402_1%~D

1 2

R217 33_0402_5%~D

1 2

R215 33_0402_5%~D 1 2

C542

10U_0805_10V4Z~D

1

2

C554

0.1U_0402_16V4Z~D

1

2

R216 33_0402_5%~D 1 2

R444

10K_0402_5%~D@

12

R165 33_0402_5%~D 1 2

R144 33_0402_5%~D1@1 2

R210 33_0402_5%~D

1 2

R204 10K_0402_5%~D

1 2

R219 49.9_0402_1%~D

1 2

R142 33_0402_5%~D

12

C573

4.7U_0603_6.3V6M

~D

1

2

U15

ICS954305DKLFT_MLF72~D

VDDSRC1VDDSRC49

VDDSRC65

VDDPCI30VDDPCI36

VDD4840

VDDCPU12

VDDREF18

USB_48MHz/FSLA41

FSLB/TEST_MODE45

XOUT19

XIN20

GNDPCI31

PCICLK232

REF0/FSLC/TEST_SEL23

SMBDAT17

SMBCLK16

ITP_EN/PCICLK_F037

IREF9

CPU_STOP# 24

CPUT1 11

CPUC1 10

CPUT_ITP/SRCT10 6

PCICLK333

PCICLK4/FCTSEL134

CPUC0 13

CPUT0 14

PCI_STOP# 25

GNDA 8

VDDA 7

GNDPCI35

CPUC_ITP/SRCC10 5

GNDREF21

GNDCPU15

GNDSRC4

GND4842

GNDSRC68

DOTT_96MHz/27MHz43

DOTC_96MHz/27MHz44

Vtt_PwrGd#/PD39

REF122 SRCT7 66

SRCC7 67

SRCT8 70

SRCC8 69

SRCT9 3

SRCC9 2

SRCC1 51

LCD100/96/SRC0_T 47

SRCT2 52

SRCT4 58

SRCT1 50

CLKREQ4# 57

SRCC2 53

SRCC5 61

SRCC4 59

SRCT5 60

LCD100/96/SRC0_C 48

SRCC3 56

SRCT3 55

SRCT6 63

SRCC6 64

CLKREQ6# 62

CLKREQ8# 71

CLKREQ9# 72

CLKREQ1# 46

CLKREQ5# 29

CLKREQ3# 28

CLKREQ2# 26

CLKREQ7# 38

VDDSRC54

PCICLK127

THRM_PAD73

THRM_PAD76

THRM_PAD74THRM_PAD75

R158 33_0402_5%~D

1 2

R174 49.9_0402_1%~D

12

R1322.2_0603_5%~D

1 2

C575

0.1U_0402_16V4Z~D

1

2

R211 33_0402_5%~D

1 2

R147 49.9_0402_1%~D

12

R127 8.2K_0402_5%~D 12 R184 33_0402_5%~D2@

1 2

C200

0.1U_0402_16V4Z~D

1

2

C570

0.1U_0402_16V4Z~D

1

2

C541

0.1U_0402_16V4Z~D

1

2

R168 33_0402_5%~D

1 2

R4702.2_0603_5%~D 1 2

R226 49.9_0402_1%~D

1 2

C579

10U_0805_10V4Z~D

1

2

C530

0.1U_0402_16V4Z~D

1

2

C552

4.7U_0603_6.3V6M

~D

1

2

R223 49.9_0402_1%~D

1 2

R172 33_0402_5%~D 1 2

R473 10K_0402_5%~D 1 2

C166

27P_0402_50V8J~D

1 2

R152 33_0402_5%~D1@1 2

R163 49.9_0402_1%~D

12

R160 49.9_0402_1%~D1@1 2

R155 49.9_0402_1%~D

12

R119390_0402_5%~D

1 2

R156 49.9_0402_1%~D1@1 2

R151 49.9_0402_1%~D1@1 2

R453

10K_0402_5%~D

12

R121 33_0402_5%~D1 2

R218 49.9_0402_1%~D

1 2

C574

0.1U_0402_16V4Z~D

1

2G

D S

Q512N7002_SOT23~D

2

1 3

R157 33_0402_5%~D1@1 2

L44


1 2

R120 10K_0402_5%~D

1 2

R141 8.2K_0402_5%~D

1 2

R164 49.9_0402_1%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ITP_TDO

ITP_TMS

ITP_TDI

ITP_TRST#

ITP_TCK

ITP_DBRESET#

H_THERMTRIP#

H_RESET#

H_IGNNE#

H_DSTBP#1

H_D#63

H_D#37

H_D#17

H_PWRGOOD

H_RS#1

H_A#19

H_A#16

H_STPCLK#

H_FERR#

H_D#61

H_D#59

H_D#49

H_D#43

H_D#40

H_D#8

H_D#4

H_D#2

ITP_BPM#3

H_IERR#

H_DRDY#

H_BR0#

H_A#7

H_A#4

H_DINV#3

H_D#58

H_D#13

H_INIT#

H_DSTBN#3

H_D#30

H_D#20

CPU_PROCHOT#

H_RESET#

H_ADS#

H_REQ#2

H_A#30

H_A#24

H_A#18H_A#17

H_DSTBP#2

H_DSTBN#2

H_DINV#0

H_D#57

H_D#28

H_D#19H_A#21

H_DINV#1

H_D#60

H_D#52

H_D#50

H_D#23

H_D#18

H_D#15

H_D#10

ITP_TRST#

H_DPWR#

H_DPSLP#

H_TRDY#

H_A#29

H_A#11

H_DSTBP#0

H_DSTBN#1

H_D#22

H_D#6

ITP_DBRESET#

ITP_BPM#2

H_RS#0

H_HITM#

H_A#15

H_DPRSTP#

TEST2

H_RS#2

H_HIT#

CLK_CPU_BCLK#

H_D#51

H_D#41

H_D#34

H_D#24

ITP_BPM#5

H_A#27

H_A#20

H_SMI#

H_INTR

H_D#54

H_D#38

H_D#29

H_D#21

H_D#7

H_DBSY#

H_REQ#3

H_REQ#1

H_A#9

H_THERMTRIP#

H_NMI

H_D#56

H_D#42

H_D#26

H_D#5

H_D#3

ITP_BPM#4

H_A#22

H_D#53

H_D#32

H_D#14

H_CPUSLP#

ITP_BPM#1ITP_BPM#0

H_A#5

H_D#48

H_D#45

ITP_TDO

H_BNR#

H_A#26H_A#25

H_A#10

H_DINV#2

H_D#62

H_D#44

H_D#31

H_D#25

H_D#12

H_ADSTB#1

H_REQ#4

H_A#28

H_A#14

H_A#6

H_DSTBN#0

H_D#47

H_D#39

H_D#35

H_D#33

H_D#16

H_D#11

H_D#1H_D#0

ITP_TMS

ITP_TCK

H_DEFER#

CLK_CPU_BCLK

H_ADSTB#0

H_A#31

H_D#36

ITP_TDI H_A20M#

H_DSTBP#3

H_D#55

H_D#46

H_D#27

H_D#9

TEST1

H_LOCK#

H_BPRI#

H_REQ#0

H_A#23

H_A#13H_A#12

H_A#8

H_A#3

ITP_TDIITP_TMS

ITP_TCK

ITP_TRST#

ITP_TDO

ITP_BPM#0

ITP_BPM#1

ITP_BPM#2

ITP_BPM#4

ITP_BPM#5

ITP_DBRESET#

ITP_TCK

ITP_BPM#3

CLK_CPU_ITP#CLK_CPU_ITP

H_RESET#

H_THERMDAH_THERMDC

ITP_BPM#5

TEST1

CPU_PROCHOT#

+1.05V_VCCP

+1.05V_VCCP

+3.3V_SUS

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

H_THERMTRIP#<16>

H_ADS#<10>

H_REQ#0<10>

H_A#[3..31]<10>

H_BPRI#<10>H_BNR#<10>

CLK_CPU_BCLK#<6>

H_DEFER#<10>

H_HITM#<10>

H_BR0#<10>

CLK_CPU_BCLK<6>

H_HIT#<10>

H_D#[0..63] <10>

H_DPSLP#<22>

H_RESET#<10>

H_DRDY#<10>

H_TRDY#<10>

H_RS#0<10>

H_ADSTB#0<10>

H_DSTBN#1 <10>

H_ADSTB#1<10>

H_DSTBN#0 <10>

H_DINV#0 <10>

H_DINV#2 <10>

H_DBSY#<10>

H_DINV#1 <10>

H_LOCK#<10>

H_DINV#3 <10>

ITP_DBRESET#<23,30>

H_PWRGOOD<22>H_CPUSLP#<10,22>

H_DPWR#<10>H_DPRSTP#<22,42>

CPU_PROCHOT#<31>

H_RS#1<10>H_RS#2<10>

H_DSTBN#3 <10>H_DSTBN#2 <10>

H_DSTBP#1 <10>H_DSTBP#0 <10>

H_DSTBP#2 <10>

H_REQ#1<10>H_REQ#2<10>H_REQ#3<10>H_REQ#4<10>

H_IGNNE# <22>

H_A20M# <22>

H_NMI <22>

H_SMI# <22>

H_DSTBP#3 <10>

H_INTR <22>

H_FERR# <22>

H_INIT# <22>

H_STPCLK# <22>

CLK_CPU_ITP#<6>CLK_CPU_ITP<6>

H_THERMDA<16>

H_THERMDC<16>

Title



Yonah Processor(1/2)



This shall place near CPU

Place near JITP



H_THERMDA, H_THERMDC routing together with guard trace,Trace width / Spacing = 10 / 10 mil

Stuff R427 for Yonah B0 andforward.

Notes: Can be nopop on X00 board.

No-stuff R253 & R258 for bits issue list: WI52082

R431

1K_0402_5%~D@1 2

R24554.9_0402_1%~D

@

1 2

R282150_0402_5%~D

1 2

JITP1

MOLEX_52435-2891_28P~D@

TDI1 TMS2 TRST#3 NC14 TCK5 NC26 TDO7 BCLKN8 BCLKP9 GND010 FBO11 RESET#12 BPM5#13

BPM4#15

BPM3#17

BPM2#19

BPM1#21

BPM0#23 DBA#24 DBR#25 VTAP26 VTT027 VTT128

GND114

GND216

GND318

GND420

GND522

GN

D6

29G

ND

730

R25751_0402_5%~D1 2

R25322.6_0402_1%~D

@

1 2

R42751_0402_5%~D

1 2

R246150_0402_1%~D1 2

R26456_0402_5%~D 1 2

R419

56_0402_5%~D

1 2

R25822.6_0402_1%~D@

1 2

R262680_0402_5%~D

1 2

ADDR GROUP

CONTROL

HOST CLK

MISC

DATA GROUP

THERMALDIODE

LEGACY CPU

YONAHJCPU1A

TYCO_1-1674770-2_Yonah~D

A3#J4A4#L4A5#M3A6#K5A7#M1A8#N2A9#J1A10#N3A11#P5A12#P2A13#L1A14#P4A15#P1A16#R1A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5A23#U2A24#R4A25#T5A26#T3A27#W3A28#W5A29#Y4A30#W2A31#Y1

REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L5

ADSTB0#L2ADSTB1#V4

BCLK0A22BCLK1A21

ADS#H1BNR#E2BPRI#G5BR0#F1DEFER#H5DRDY#F21HIT#G6HITM#E4IERR#D20LOCK#H4RESET#B1

RS0#F3RS1#F4RS2#G3TRDY#G2

BPM0#AD4BPM1#AD3BPM2#AD1BPM3#AC4

DBR#C20DBSY#E1DPSLP#B5

DPWR#D24PRDY#AC2PREQ#AC1PROCHOT#D21

PWRGOODD6SLP#D7TCKAC5TDIAA6TDOAB3TEST1C26TEST2D25TMSAB5TRST#AB6

THERMDAA24THERMDCA25THERMTRIP#C7

D0# E22D1# F24D2# E26D3# H22D4# F23D5# G25D6# E25D7# E23D8# K24D9# G24

D10# J24D11# J23D12# H26D13# F26D14# K22D15# H25D16# N22D17# K25D18# P26D19# R23D20# L25D21# L22D22# L23D23# M23D24# P25D25# P22D26# P23D27# T24D28# R24D29# L26D30# T25D31# N24D32# AA23D33# AB24D34# V24D35# V26D36# W25D37# U23D38# U25D39# U22D40# AB25D41# W22D42# Y23D43# AA26D44# Y26D45# Y22D46# AC26D47# AA24D48# AC22D49# AC23D50# AB22D51# AA21D52# AB21D53# AC25D54# AD20D55# AE22D56# AF23D57# AD24D58# AE21D59# AD21D60# AE25D61# AF25D62# AF22D63# AF26

DINV0# J26DINV1# M26DINV2# V23DINV3# AC20

DSTBN0# H23DSTBN1# M24DSTBN2# W24DSTBN3# AD23DSTBP0# G22DSTBP1# N25DSTBP2# Y25DSTBP3# AE24

A20M# A6FERR# A5

IGNNE# C4INIT# B3

LINT0 C6LINT1 B4

STPCLK# D5SMI# A3

DPRSTP#E5

R261 27.4_0402_1%~D1 2

C264

0.1U_0402_16V4Z~D

1

2

R25251_0402_5%~D

C164

2200P_0402_50V7K~D@

1

2

C263

0.1U_0402_16V4Z~D

1

2

R3575_0402_5%~D

12

R281 39_0402_5%~D1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

COMP0

COMP3

COMP1COMP2

VSSSENSEVCCSENSE

CPU_MCH_BSEL2CPU_MCH_BSEL1

H_PSI#

VID0VID1VID2VID3VID4VID5VID6

CPU_MCH_BSEL0

VSSSENSE

VCCSENSE

+1.05V_VCCP

+VCC_CORE

+1.05V_VCCP

V_CPU_GTLREF

+1.5V_RUN

+VCC_CORE

V_CPU_GTLREF

+VCC_CORE

H_PSI#<42>

VID0<42>VID1<42>VID2<42>VID3<42>VID4<42>VID5<42>VID6<42>

VCCSENSE<42>VSSSENSE<42>

CPU_MCH_BSEL0<6,10>CPU_MCH_BSEL1<6,10>CPU_MCH_BSEL2<6,10>

Title



Yonah Processor(2/2)



Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.



Layout close CPU within 1"

Length match within 25 mils

CPU_BSEL CPU_BSEL2 CPU_BSEL1

133

166

0 0

0 1

CPU_BSEL0

1

1

Layout close CPU PIN AD260.5 inch (max)

Layout Note:COMP0,2 connect with Z0=27.4 ohm, make trace length shorter than 0.5".COMP1,3 connect with Z0=55.5 ohm, make trace length shorter than 0.5".

Trace width/space=18mils/7milsspace with other is 50mil

POWER, GROUND

YONAH

JCPU1C


VCCAE18VCCAE17VCCAB15VCCAA15VCCAD15VCCAC15VCCAF15VCCAE15VCCAB14VCCAA13VCCAD14VCCAC13VCCAF14VCCAE13VCCAB12VCCAA12VCCAD12VCCAC12VCCAF12VCCAE12VCCAB10VCCAB9VCCAA10VCCAA9VCCAD10VCCAD9VCCAC10VCCAC9VCCAF10VCCAF9VCCAE10VCCAE9VCCAB7VCCAA7VCCAD7VCCAC7VCCB20VCCA20VCCF20VCCE20VCCB18VCCB17VCCA18VCCA17VCCD18VCCD17VCCC18VCCC17VCCF18VCCF17VCCE18VCCE17VCCB15VCCA15VCCD15VCCC15VCCF15VCCE15

VSS K1VSS J2VSS M2VSS N1VSS T1VSS R2VSS V2VSS W1VSS A26VSS D26VSS C25VSS F25VSS B24VSS A23VSS D23VSS E24VSS B21VSS C22VSS F22VSS E21VSS B19VSS A19VSS D19VSS C19VSS F19VSS E19VSS B16VSS A16VSS D16VSS C16VSS F16VSS E16VSS B13VSS A14VSS D13VSS C14VSS F13VSS E14VSS B11VSS A11VSS D11VSS C11VSS F11VSS E11VSS B8VSS A8VSS D8VSS C8VSS F8VSS E8VSS G26VSS K26VSS J25VSS M25VSS N26VSS T26VSS R25VSS V25VSS W26VSS H24VSS G23VSS K23VSS L24VSS P24VSS N23VSS T23VSS U24VSS Y24VSS W23VSS H21VSS J22VSS M22VSS L21VSS P21VSS R22VSS V22VSS U21VSS Y21

VCCB14VCCA13VCCD14VCCC13VCCF14VCCE13VCCB12VCCA12VCCD12VCCC12VCCF12VCCE12VCCB10VCCB9VCCA10VCCA9VCCD10VCCD9VCCC10VCCC9VCCF10VCCF9VCCE10VCCE9VCCB7

VCCF7 VCCA7

R328

54.9_0402_1%~D

12

R283

100_0402_1%~D

1 2

R429

2K_0402_1%~D

12

C167

0.01U_0402_16V7K~D

1

2

POWER, GROUNG, RESERVED SIGNALS AND NC

YONAH

JCPU1B


PSI#AE6

GTLREFAD26

VCCSENSEAF7

VCCAB26

VCCAB20VCCAA20VCCAF20VCCAE20VCCAB18VCCAB17VCCAA18VCCAA17VCCAD18VCCAD17VCCAC18VCCAC17VCCAF18VCCAF17

RSVDT22

RSVDV3RSVDB2RSVDC3

VSS AB26VSS AA25VSS AD25VSS AE26VSS AB23VSS AC24VSS AF24VSS AE23VSS AA22VSS AD22VSS AC21VSS AF21VSS AB19VSS AA19VSS AD19VSS AC19VSS AF19VSS AE19VSS AB16VSS AA16VSS AD16VSS AC16VSS AF16VSS AE16VSS AB13VSS AA14VSS AD13VSS AC14VSS AF13VSS AE14VSS AB11VSS AA11VSS AD11VSS AC11VSS AF11VSS AE11VSS AB8VSS AA8VSS AD8VSS AC8VSS AF8VSS AE8VSS AA5VSS AD5VSS AC6VSS AF6VSS AB4VSS AC3VSS AF3VSS AE4VSS AB1VSS AA2VSS AD2VSS AE1VSS B6VSS C5VSS F5VSS E6VSS H6VSS J5VSS M5VSS L6VSS P6VSS R5VSS V5VSS U6VSS Y6VSS A4VSS D4VSS E3VSS H3VSS G4VSS K4VSS L3VSS P3VSS N4VSS T4VSS U3VSS Y3VSS W4VSS D1VSS C2VSS F2VSS G1RSVDB25

VSSSENSEAE7

VCCPK6VCCPJ6VCCPM6VCCPN6VCCPT6VCCPR6VCCPK21VCCPJ21VCCPM21VCCPN21VCCPT21VCCPR21VCCPV21VCCPW21VCCPV6VCCPG21

VID0AD6VID1AF5VID2AE5VID3AF4VID4AE3VID5AF2VID6AE2

BSEL0B22BSEL1B23BSEL2C21

COMP0R26COMP1U26COMP2U1COMP3V1

RSVDC23RSVDC24RSVDAA1RSVDAA4RSVDAB2RSVDAA3RSVDM4RSVDN5RSVDT2

RSVDD2RSVDF6RSVDD3RSVDC1RSVDAF1RSVDD22

VCCE7

R435

54.9_0402_1%~D

12

R434

27.4_0402_1%~D

12

R293

100_0402_1%~D

1 2

C173

10U_0805_4VAM

~D

1

2

R327

27.4_0402_1%~D

12

R428

1K_0402_1%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.05V_VCCP

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

Title



CPU Bypass




Place these insidesocket cavity on L8(North sideSecondary)

10uF 0805 X6S -> 105 degree C

ESR <= 1.5m ohmCapacitor > 1980uF

High Frequence Decoupling

North Side Secondary

Near VCORE regulator


South Side Secondary




6mOhmPS CAP

Intel CRB schematic suggest to use X5R or better

6mOhmPS CAP

6mOhmPS CAP

6mOhmPS CAP

6mOhmPS CAP

6mOhmPS CAP

C11010U_0805_4VAM~D

1

2

C310

0.1U_0402_10V7K~D

1

2

C11710U_0805_4VAM~D

1

2

+

C98

330U

_D_2

VM

_R6~

D @

1

2

C33310U_0805_4VAM~D

1

2

C47510U_0805_4VAM~D

1

2

C309

0.1U_0402_10V7K~D

1

2

C12610U_0805_4VAM~D

1

2

C486

0.1U_0402_10V7K~D

1

2

C44310U_0805_4VAM~D

1

2

C44410U_0805_4VAM~D

1

2

C10110U_0805_4VAM~D

1

2

C8210U_0805_4VAM~D

1

2

C32910U_0805_4VAM~D

1

2

C10310U_0805_4VAM~D

1

2

C8110U_0805_4VAM~D

1

2

C11110U_0805_4VAM~D

1

2

+

C12

533

0U_D

_2V

M_R

6~D

1

2

C37410U_0805_4VAM~D

1

2

C12710U_0805_4VAM~D

1

2

C33410U_0805_4VAM~D

1

2

+C432

330U_D2E_2.5VM_R9~D@

1

2

C485

0.1U_0402_10V7K~D

1

2

C32110U_0805_4VAM~D

1

2

C39510U_0805_4VAM~D

1

2

C9210U_0805_4VAM~D

1

2

C44610U_0805_4VAM~D

1

2

C42310U_0805_4VAM~D

1

2

C32010U_0805_4VAM~D

1

2

C312

0.1U_0402_10V7K~D

1

2

C37510U_0805_4VAM~D

1

2

C9310U_0805_4VAM~D

1

2

C39410U_0805_4VAM~D

1

2

C35410U_0805_4VAM~D

1

2

C11910U_0805_4VAM~D

1

2

C42210U_0805_4VAM~D

1

2

C484

0.1U_0402_10V7K~D

1

2

+

C10

833

0U_D

_2V

M_R

6~D @

1

2

+

C88

330U

_D_2

VM

_R6~

D 1

2

+

C32

433

0U_D

_2V

M_R

6~D

1

2

C48110U_0805_4VAM~D

1

2

+

C13

033

0U_D

_2V

M_R

6~D

1

2

C47610U_0805_4VAM~D

1

2

C31610U_0805_4VAM~D

1

2

C35310U_0805_4VAM~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DMI_MTX_IRX_N0

H_D#11

DMI_MTX_IRX_P0

H_D#23

H_D#31

H_D#2

H_D#37

H_D#58

H_D#50

H_D#5

H_D#35

H_D#39

H_D#52

H_D#27

H_D#60

H_D#10

H_D#44

H_D#51

H_D#8

H_D#59

H_D#43

H_D#56

H_D#4

H_D#18

H_D#3

H_D#14

H_D#48

H_D#28

H_D#34

H_D#36

H_D#55

H_D#62

H_D#13

H_D#24

H_D#22

H_D#29

H_D#16

H_D#57

H_D#20

H_D#9

H_D#0

H_D#17

H_D#1

H_D#53

H_D#26

H_D#7

H_D#45

H_D#40

H_D#54

H_D#41

H_D#15

H_D#38

H_D#25

H_D#42

H_D#61

H_D#32

H_D#6

H_D#12

H_D#63

H_D#19

DREF_SSCLKDREF_SSCLK#

MCH_DREFCLK#MCH_DREFCLK

CLK_3GPLLREQ#

MCH_ICH_SYNC#

CFG8

CFG10

CFG14CFG15

CFG17

DMI_MTX_IRX_P1DMI_MTX_IRX_P2

PM_EXTTS#1_R

CFG3CFG4

DREF_SSCLK#

MCH_DREFCLK#

CFG11

MCH_DREFCLK

DREF_SSCLK

DPRSLPVR

H_VREF H_SWNG0 H_SWNG1

PM_EXTTS#0V_DDR_MCH_REF

PM_EXTTS#1_R

H_ADSTB#1

H_A#28

H_A#15

H_SWNG1

H_XRCOMP

H_RS#0

CPU_MCH_BSEL1

H_REQ#0

H_A#16

CFG7

CFG5

H_HIT#

H_DSTBP#0

M_CLK_DDR3

DDR_CKE0_DIMMAH_REQ#4

H_A#20

H_A#17

H_A#13

H_SWNG0

H_REQ#2

H_BNR#

M_OCDOCMP0

DMI_MRX_ITX_N0

DDR_CKE1_DIMMA

H_A#8

M_ODT1

H_DSTBP#2

H_A#26

H_A#19

H_D#46

CFG13

H_REQ#3

CFG9

H_DINV#2

CLK_MCH_BCLK#

H_REQ#1

H_A#7

H_YSCOMP

M_CLK_DDR#0

ICH_PWRGD

CPU_MCH_BSEL0

H_BPRI#

H_DINV#0

H_A#22

DDR_CKE3_DIMMB

H_D#21

CFG18

H_CPUSLP#

H_DPWR#

H_ADS#

H_DSTBP#3

H_DSTBN#3

H_A#27

H_A#6

H_A#3

M_CLK_DDR#1H_D#30

H_D#33

CFG16

CLK_MCH_BCLK

PLTRST_MCH_R#

CFG19

CFG12

SMRCOMPN

V_DDR_MCH_REF

DDR_CS1_DIMMA#

H_DSTBP#1

H_DINV#3

H_RS#2

H_ADSTB#0

H_A#25

CFG6

H_LOCK#

DDR_CKE2_DIMMB

H_RESET#

H_A#12H_A#11

M_ODT3

H_DBSY#

H_DSTBN#0H_DSTBN#1

H_BR0#

M_CLK_DDR#2

M_OCDOCMP1

H_A#18

H_A#10

H_DSTBN#2

H_RS#1

H_A#14

H_XSCOMP

CPU_MCH_BSEL2

H_A#21

PM_BMBUSY#

H_DRDY#

H_HITM#

M_CLK_DDR#3

DDR_CS0_DIMMA#

DDR_CS3_DIMMB#

H_D#47

H_A#31H_A#30H_A#29

H_A#24H_A#23

PM_EXTTS#1_RPM_EXTTS#0

M_ODT2

M_ODT0

DDR_CS2_DIMMB#

H_D#49

H_TRDY#

H_DINV#1

H_A#9

H_A#5H_A#4

THERMTRIP_MCH#

H_DEFER#

M_CLK_DDR2

M_CLK_DDR0M_CLK_DDR1

H_YRCOMP

DMI_MRX_ITX_P1

DMI_MRX_ITX_N2

DMI_MRX_ITX_P0

DMI_MTX_IRX_N3

DMI_MTX_IRX_P3

DMI_MTX_IRX_N2DMI_MTX_IRX_N1

CLK_MCH_3GPLLCLK_MCH_3GPLL#

CFG20

THERMTRIP_MCH#

DMI_MRX_ITX_N1

DMI_MRX_ITX_N3

SMRCOMPP

H_VREF

DMI_MRX_ITX_P2DMI_MRX_ITX_P3

+1.05V_VCCP

+1.05V_VCCP+1.05V_VCCP+1.05V_VCCP

+3.3V_RUN

+1.8V_SUS

+1.05V_VCCP

+1.5V_RUN

H_A#[3..31] <7>

H_ADSTB#1 <7>H_ADSTB#0 <7>

H_TRDY# <7>

H_HIT# <7>H_LOCK# <7>

H_DEFER# <7>

H_BPRI# <7>

H_BR0# <7>

H_RESET# <7>

H_DPWR# <7>H_DRDY# <7>

H_DBSY# <7>

CLK_MCH_BCLK# <6>CLK_MCH_BCLK <6>

H_BNR# <7>

H_ADS# <7>

H_DINV#1 <7>H_DINV#0 <7>

H_DINV#2 <7>H_DINV#3 <7>

H_CPUSLP# <7,22>

CFG12 <12>

CPU_MCH_BSEL1 <6,8>

CLK_MCH_3GPLL# <6>

M_ODT0<17>

CFG7 <12>

PLTRST_MCH#<21>

CLK_MCH_3GPLL <6>

M_ODT3<18>

CFG9 <12>

CFG19 <12>

MCH_ICH_SYNC#<21>

M_ODT2<18>

CPU_MCH_BSEL0 <6,8>

CFG16 <12>

THERMTRIP_MCH#<16>

CFG5 <12>

CPU_MCH_BSEL2 <6,8>

CFG20 <12>

CFG13 <12>

V_DDR_MCH_REF<17,18,41>

M_ODT1<17>

CFG18 <12>

H_HITM# <7>

CFG11 <12>

DMI_MTX_IRX_P1<23>

DMI_MRX_ITX_P0<23>

M_CLK_DDR#3<18>

DMI_MTX_IRX_N1<23>

DMI_MRX_ITX_N3<23>

DMI_MTX_IRX_P0<23>

DDR_CS2_DIMMB#<18>

M_CLK_DDR#0<17>

DMI_MTX_IRX_N0<23>

DMI_MRX_ITX_N2<23>

DDR_CS1_DIMMA#<17>

DMI_MTX_IRX_N3<23>

M_CLK_DDR1<17>

M_CLK_DDR3<18>

DMI_MRX_ITX_P3<23>

DMI_MRX_ITX_N1<23>

DMI_MRX_ITX_P2<23>

DDR_CS0_DIMMA#<17>

DMI_MRX_ITX_N0<23>

DDR_CKE1_DIMMA<17>

DMI_MTX_IRX_P3<23>

DDR_CKE2_DIMMB<18>

DDR_CS3_DIMMB#<18>

DMI_MTX_IRX_P2<23>

DMI_MRX_ITX_P1<23>

M_CLK_DDR#2<18>

DDR_CKE3_DIMMB<18>

M_CLK_DDR0<17>

DDR_CKE0_DIMMA<17>

DMI_MTX_IRX_N2<23>

M_CLK_DDR#1<17>

M_CLK_DDR2<18>

PM_BMBUSY#<23>

H_D#[0..63]<7>

H_RS#1 <7>H_RS#2 <7>

H_RS#0 <7>





H_REQ#0 <7>H_REQ#1 <7>H_REQ#2 <7>H_REQ#3 <7>H_REQ#4 <7>

PM_EXTTS#0<17>

DREF_SSCLK# <6>

MCH_DREFCLK <6>MCH_DREFCLK# <6>

DREF_SSCLK <6>

CLK_3GPLLREQ# <6>

ICH_PWRGD<23,33>

CFG6 <12>

CFG10 <12>

DPRSLPVR<23,42>

Title



Calistoga(1 of 6)


Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.


Layout Note:H_XRCOMP & H_YRCOMP / H_SWNG0 &H_SWNG1 trace width and spacing is 10/20

Description at page12UMA use 945GM A2 ( P/N: SA00000592L )Discrete use 945PM A2 ( P/N: SA00000KD1L)

Note : CFG3:17 hasinternal pullup,CFG18:19 hasinternal pulldown

For Discrete Only

Place closed to U9 pinAK1,pinAK41

R300

10K_0402_5%~D

12

C509

0.1U_0402_16V4Z~D

1

2

R50 0_0402_5%~D2@1 2

R318

221_0402_1%~D

12

R354

200_0402_1%~D

12

R49 0_0402_5%~D2@1 2

C398

0.1U_0402_16V4Z~D

1

2

C326

0.1U_0402_16V4Z~D

1

2

R365

100_0402_1%~D

12

HOST

U9A

CALISTOGA A0_FCBGA1466~D

HD0#F1HD1#J1HD2#H1HD3#J6HD4#H3HD5#K2HD6#G1HD7#G2HD8#K9HD9#K1HD10#K7HD11#J8HD12#H4HD13#J3HD14#K11HD15#G4HD16#T10HD17#W11HD18#T3HD19#U7HD20#U9HD21#U11HD22#T11HD23#W9HD24#T1HD25#T8HD26#T4HD27#W7HD28#U5HD29#T9HD30#W6HD31#T5HD32#AB7HD33#AA9HD34#W4HD35#W3HD36#Y3HD37#Y7HD38#W5HD39#Y10HD40#AB8HD41#W2HD42#AA4HD43#AA7HD44#AA2HD45#AA6HD46#AA10HD47#Y8HD48#AA1HD49#AB4HD50#AC9HD51#AB11HD52#AC11HD53#AB3HD54#AC2HD55#AD1HD56#AD9HD57#AC1HD58#AD7HD59#AC6HD60#AB5HD61#AD10HD62#AD4HD63#AC8

HVREF1K13HXRCOMPE1HXSCOMPE2HYRCOMPY1HYSCOMPU1HXSWINGE4HYSWINGW1

HA3# H9HA4# C9HA5# E11HA6# G11HA7# F11HA8# G12HA9# F9

HA10# H11HA11# J12HA12# G14HA13# D9HA14# J14HA15# H13HA16# J15HA17# F14HA18# D12HA19# A11HA20# C11HA21# A12HA22# A13HA23# E13HA24# G13HA25# F12HA26# B12HA27# B14HA28# C12HA29# A14HA30# C14HA31# D14

HREQ#0 D8HREQ#1 G8HREQ#2 B8HREQ#3 F8HREQ#4 A8

HADSTB#0 B9HADSTB#1 C13

HRS0# B4HRS1# E6HRS2# D6

HCLKN AG1HCLKP AG2

HDINV#0 J7HDINV#1 W8HDINV#2 U3HDINV#3 AB10

HDSTBN#0 K4HDSTBN#1 T7HDSTBN#2 Y5HDSTBN#3 AC4HDSTBP#0 K3HDSTBP#1 T6HDSTBP#2 AA5HDSTBP#3 AC5

HCPURST# B7HADS# E8

HTRDY# E7HDPWR# J9HDRDY# H8

HDEFER# C3HHITM# D4

HHIT# D3HLOCK# B3

HBREQ0# C7HBNR# C6HBPRI# F6

HDBSY# A7HCPUSLP# E3

HVREF0J13 R425 100_0402_1%~D 12

R436 80.6_0402_1%~D

1 2

R432 80.6_0402_1%~D 1 2

DM

ID

DR

MU

XING

CFG

PM

CLK

NC

RES

ERVE

D

U9B


DMIRXN0AE35DMIRXN1AF39DMIRXN2AG35DMIRXN3AH39

DMIRXP0AC35DMIRXP1AE39DMIRXP2AF35DMIRXP3AG39

DMITXN0AE37DMITXN1AF41DMITXN2AG37DMITXN3AH41

DMITXP0AC37DMITXP1AE41DMITXP2AF37DMITXP3AG41

SM_CK0AY35SM_CK1AR1SM_CK2AW7SM_CK3AW40

SM_CK0#AW35SM_CK1#AT1SM_CK2#AY7SM_CK3#AY40

SM_OCDCOMP0AL20SM_OCDCOMP1AF10

SM_ODT0BA13SM_ODT1BA12SM_ODT2AY20SM_ODT3AU21

SM_RCOMPNAV9SM_RCOMPPAT9

SM_VREF0AK1SM_VREF1AK41

SM_CKE0AU20SM_CKE1AT20SM_CKE2BA29SM_CKE3AY29

SM_CS0#AW13SM_CS1#AW12SM_CS2#AY21SM_CS3#AW21

CFG16 G18

CFG1 K18CFG2 J18CFG3 F18CFG4 E15CFG5 F15CFG6 E18CFG7 D19CFG8 D16CFG9 G16

CFG10 E16CFG11 D15CFG12 G15CFG13 K15CFG14 C15CFG15 H16

CFG0 K16

CFG17 H15CFG18 J25CFG19 K27CFG20 J26

G_CLKP AG33G_CLKN AF33

D_REF_CLKN A27D_REF_CLKP A26

D_REF_SSCLKN C40D_REF_SSCLKP D41

NC0 A3NC1 A39NC2 A4NC3 A40NC4 AW1NC5 AW41NC6 AY1NC7 BA1NC8 BA2NC9 BA3

NC10 BA39NC11 BA40NC12 BA41NC13 C1NC14 AY41NC15 B2NC16 B41NC17 C41NC18 D1

PM_BMBUSY#G28PM_EXTTS0#F25PM_EXTTS1#H26PM_THERMTRIP#G6PWROKAH33RSTIN#AH34

RESERVED1 T32RESERVED2 R32RESERVED3 F3RESERVED4 F7RESERVED5 AG11RESERVED6 AF11RESERVED7 H7RESERVED8 J19RESERVED9 A41

RESERVED10 A34RESERVED11 D28RESERVED12 D27RESERVED13 A35

ICH_SYNC#K28

CLK_REQ# H32

R297

10K_0402_5%~D

@12

R330

100_0402_1%~D

12

C300

0.1U_0402_16V4Z~D

1

2

R397

221_0402_1%~D

12

R79

54.9_0402_1%~D

12

R396

100_0402_1%~D

12

R326 0_0402_5%~D2@1 2

R337 0_0402_5%~D2@1 2

R2960_0402_5%~D

R383

54.9_0402_1%~D

12

C704

0.1U_0402_16V4Z~D

1

2

R313

75_0402_5%~D

1 2

R81

24.9_0402_1%~D

12

R395

24.9_0402_1%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_D11

DDR_B_D57

DDR_B_D46

DDR_B_D7

DDR_B_D0

DDR_B_D44

DDR_B_D40

DDR_B_D30

DDR_B_D27

DDR_B_D15

DDR_B_D3

DDR_B_D35

DDR_B_D25

DDR_B_D23

DDR_B_D49

DDR_B_D37

DDR_B_D19

DDR_B_D48DDR_B_D47

DDR_B_D36

DDR_B_D18

DDR_B_D8

DDR_B_D62

DDR_B_D60

DDR_B_D9

DDR_B_D2

DDR_B_D52

DDR_B_D50

DDR_B_D22

DDR_B_D56

DDR_B_D51

DDR_B_D39

DDR_B_D28

DDR_B_D17

DDR_B_D45

DDR_B_D6

DDR_B_D61

DDR_B_D58

DDR_B_D1

DDR_B_D54

DDR_B_D41

DDR_B_D31

DDR_B_D12

DDR_B_D5

DDR_B_D38

DDR_B_D32

DDR_B_D20

DDR_B_D16

DDR_B_D14

DDR_B_D33

DDR_B_D63

DDR_B_D59

DDR_B_D42

DDR_B_D55

DDR_B_D53

DDR_B_D43

DDR_B_D29

DDR_B_D26

DDR_B_D13

DDR_B_D4

DDR_B_BS2

DDR_B_D34

DDR_B_D24

DDR_B_D21

DDR_B_D10

DDR_B_CAS#

DDR_B_WE#DDR_B_RAS#

SB_RCVENIN#

DDR_B_DQS7

DDR_B_MA9

DDR_B_MA0

DDR_B_MA7

DDR_B_DQS0

DDR_B_DM3

DDR_B_DQS1

DDR_B_DM1

DDR_B_DQS5

DDR_B_DM0

DDR_B_MA2

DDR_B_MA13

DDR_B_DM5

DDR_B_BS1

DDR_B_MA4

DDR_B_DM6

DDR_B_DQS4

DDR_B_MA5

DDR_B_MA3

DDR_B_MA11

DDR_B_BS0

DDR_B_MA6

DDR_B_DQS3

DDR_B_MA8

DDR_B_MA10

DDR_B_DM7

DDR_B_MA12

DDR_B_DM4

DDR_B_MA1

DDR_B_DQS2

DDR_B_DQS6

DDR_B_DM2

DDR_B_DQS#1

DDR_B_DQS#3

DDR_B_DQS#0

DDR_B_DQS#7

DDR_B_DQS#5DDR_B_DQS#4

DDR_B_DQS#6

DDR_B_DQS#2

SB_RCVENOUT#

DDR_A_D48

DDR_A_D43

DDR_A_D3

DDR_A_DM6

DDR_A_MA1

DDR_A_MA9

DDR_A_D51

DDR_A_D18

DDR_A_D0

DDR_A_D40

SA_RCVENOUT#

DDR_A_DQS5

DDR_A_DM3

DDR_A_MA10

DDR_A_D52

DDR_A_D33

DDR_A_D23

DDR_A_D16

DDR_A_D9

DDR_A_DQS2

DDR_A_DQS4

DDR_A_MA5

DDR_A_MA2

DDR_A_D35

DDR_A_D39

DDR_A_DQS#3DDR_A_DQS#2

DDR_A_D46

DDR_A_RAS#

DDR_A_D50

DDR_A_DM1

DDR_A_D45

DDR_A_D32

DDR_A_D20

DDR_A_D53

DDR_A_DQS#6

DDR_A_D58

DDR_A_D54

DDR_A_DQS#7

DDR_A_DM7

DDR_A_D31

DDR_A_DQS3

DDR_A_DQS#1

DDR_A_DM4

DDR_A_D57

DDR_A_D25

DDR_A_MA7

DDR_A_D44

DDR_A_D41

DDR_A_D2

DDR_A_D4

DDR_A_MA8

DDR_A_D13

DDR_A_D26

DDR_A_BS0

DDR_A_D11

DDR_A_D47

DDR_A_CAS#

DDR_A_D22

DDR_A_D7

DDR_A_D5

DDR_A_DM2

DDR_A_MA0

DDR_A_D56

DDR_A_BS1

DDR_A_D42

DDR_A_D8

DDR_A_DQS1

DDR_A_D27

DDR_A_D19

DDR_A_DQS#0

DDR_A_MA11

DDR_A_DQS#5

DDR_A_D30DDR_A_D29

DDR_A_D49

DDR_A_D21

DDR_A_DQS7

DDR_A_MA4

DDR_A_D28

DDR_A_D55

DDR_A_D34

DDR_A_BS2

DDR_A_D24

DDR_A_D15

DDR_A_D10

DDR_A_MA13

DDR_A_D17

DDR_A_DM0

DDR_A_D1

DDR_A_D36

DDR_A_D38

DDR_A_DQS6

DDR_A_MA6

DDR_A_DM5

DDR_A_MA3

DDR_A_D14

DDR_A_DQS0

DDR_A_D12

DDR_A_DQS#4

DDR_A_D37

DDR_A_D59

DDR_A_MA12

DDR_A_D62

DDR_A_D6

DDR_A_D60DDR_A_D61

DDR_A_D63

DDR_A_WE#SA_RCVENIN#

DDR_B_D[0..63] <18>DDR_A_D[0..63] <17>

DDR_B_BS2<18>

DDR_B_DQS[0..7]<18>

DDR_B_CAS#<18>DDR_B_RAS#<18>

DDR_B_MA[0..13]<18>

DDR_B_DQS#[0..7]<18>

DDR_B_WE#<18>

DDR_B_DM[0..7]<18>

DDR_B_BS0<18>DDR_B_BS1<18>

DDR_A_WE#<17>

DDR_A_BS0<17>

DDR_A_DQS#[0..7]<17>

DDR_A_BS1<17>

DDR_A_MA[0..13]<17>

DDR_A_BS2<17>

DDR_A_RAS#<17>

DDR_A_DQS[0..7]<17>

DDR_A_CAS#<17>

DDR_A_DM[0..7]<17>

Title



Calistogo(2 of 6)




Add a test point Add a test pointT4 PAD~D T5 PAD~D

DDR SYS MEMORY B

U9E


SB_DQ0 AK39SB_DQ1 AJ37SB_DQ2 AP39SB_DQ3 AR41SB_DQ4 AJ38SB_DQ5 AK38SB_DQ6 AN41SB_DQ7 AP41SB_DQ8 AT40SB_DQ9 AV41

SB_DQ10 AU38SB_DQ11 AV38SB_DQ12 AP38SB_DQ13 AR40SB_DQ14 AW38SB_DQ15 AY38SB_DQ16 BA38SB_DQ17 AV36SB_DQ18 AR36SB_DQ19 AP36SB_DQ20 BA36SB_DQ21 AU36SB_DQ22 AP35SB_DQ23 AP34SB_DQ24 AY33SB_DQ25 BA33SB_DQ26 AT31SB_DQ27 AU29SB_DQ28 AU31SB_DQ29 AW31SB_DQ30 AV29SB_DQ31 AW29SB_DQ32 AM19SB_DQ33 AL19SB_DQ34 AP14SB_DQ35 AN14SB_DQ36 AN17SB_DQ37 AM16SB_DQ38 AP15SB_DQ39 AL15SB_DQ40 AJ11SB_DQ41 AH10SB_DQ42 AJ9SB_DQ43 AN10SB_DQ44 AK13SB_DQ45 AH11SB_DQ46 AK10SB_DQ47 AJ8SB_DQ48 BA10SB_DQ49 AW10SB_DQ50 BA4SB_DQ51 AW4SB_DQ52 AY10SB_DQ53 AY9SB_DQ54 AW5SB_DQ55 AY5SB_DQ56 AV4SB_DQ57 AR5SB_DQ58 AK4SB_DQ59 AK3SB_DQ60 AT4SB_DQ61 AK5SB_DQ62 AJ5SB_DQ63 AJ3

SB_BS0AT24SB_BS1AV23SB_BS2AY28

SB_CAS#AR24SB_RAS#AU23SB_WE#AR27SB_RCVENIN#AK16SB_RCVENOUT#AK18

SB_DM0AK36SB_DM1AR38SB_DM2AT36SB_DM3BA31SB_DM4AL17SB_DM5AH8SB_DM6BA5SB_DM7AN4

SB_DQS0AM39SB_DQS1AT39SB_DQS2AU35SB_DQS3AR29SB_DQS4AR16SB_DQS5AR10SB_DQS6AR7SB_DQS7AN5

SB_DQS0#AM40SB_DQS1#AU39SB_DQS2#AT35SB_DQS3#AP29SB_DQS4#AP16SB_DQS5#AT10SB_DQS6#AT7SB_DQS7#AP5

SB_MA0AY23SB_MA1AW24SB_MA2AY24SB_MA3AR28SB_MA4AT27SB_MA5AT28SB_MA6AU27SB_MA7AV28SB_MA8AV27SB_MA9AW27SB_MA10AV24SB_MA11BA27SB_MA12AY27SB_MA13AR23

DDR SYS MEMORY A

U9D


SA_DQ0 AJ35SA_DQ1 AJ34SA_DQ2 AM31SA_DQ3 AM33SA_DQ4 AJ36SA_DQ5 AK35SA_DQ6 AJ32SA_DQ7 AH31SA_DQ8 AN35SA_DQ9 AP33

SA_DQ10 AR31SA_DQ11 AP31SA_DQ12 AN38SA_DQ13 AM36SA_DQ14 AM34SA_DQ15 AN33SA_DQ16 AK26SA_DQ17 AL27SA_DQ18 AM26SA_DQ19 AN24SA_DQ20 AK28SA_DQ21 AL28SA_DQ22 AM24SA_DQ23 AP26SA_DQ24 AP23SA_DQ25 AL22SA_DQ26 AP21SA_DQ27 AN20SA_DQ28 AL23SA_DQ29 AP24SA_DQ30 AP20SA_DQ31 AT21SA_DQ32 AR12SA_DQ33 AR14SA_DQ34 AP13SA_DQ35 AP12SA_DQ36 AT13SA_DQ37 AT12SA_DQ38 AL14SA_DQ39 AL12SA_DQ40 AK9SA_DQ41 AN7SA_DQ42 AK8SA_DQ43 AK7SA_DQ44 AP9SA_DQ45 AN9SA_DQ46 AT5SA_DQ47 AL5SA_DQ48 AY2SA_DQ49 AW2SA_DQ50 AP1SA_DQ51 AN2SA_DQ52 AV2SA_DQ53 AT3SA_DQ54 AN1SA_DQ55 AL2SA_DQ56 AG7SA_DQ57 AF9SA_DQ58 AG4SA_DQ59 AF6SA_DQ60 AG9SA_DQ61 AH6SA_DQ62 AF4SA_DQ63 AF8

SA_BS0AU12SA_BS1AV14SA_BS2BA20

SA_CAS#AY13SA_RAS#AW14SA_WE#AY14SA_RCVENIN#AK23SA_RCVENOUT#AK24

SA_DM0AJ33SA_DM1AM35SA_DM2AL26SA_DM3AN22SA_DM4AM14SA_DM5AL9SA_DM6AR3SA_DM7AH4

SA_DQS0AK33SA_DQS1AT33SA_DQS2AN28SA_DQS3AM22SA_DQS4AN12SA_DQS5AN8SA_DQS6AP3SA_DQS7AG5

SA_DQS0#AK32SA_DQS1#AU33SA_DQS2#AN27SA_DQS3#AM21SA_DQS4#AM12SA_DQS5#AL8SA_DQS6#AN3SA_DQS7#AH5

SA_MA0AY16SA_MA1AU14SA_MA2AW16SA_MA3BA16SA_MA4BA17SA_MA5AU16SA_MA6AV17SA_MA7AU17SA_MA8AW17SA_MA9AT16SA_MA10AU13SA_MA11AT17SA_MA12AV20SA_MA13AV12

T3 PAD~DT2 PAD~D

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

G_CLK_DDC2

PEG_MRX_GTX_N0

PEG_MRX_GTX_P0

VGA_VSYNC

VGA_HSYNC

PEG_MTX_GRX_C_N0

PEG_MRX_GTX_N2PEG_MRX_GTX_N1

PEG_MRX_GTX_P7

PEG_MRX_GTX_P4

PEG_MRX_GTX_P6

PEG_MRX_GTX_P3PEG_MRX_GTX_P2

PEG_MRX_GTX_P8

PEG_MRX_GTX_P5

PEG_MRX_GTX_P10


PEG_MRX_GTX_P9


PEG_MTX_GRX_C_N6

PEG_MTX_GRX_C_N2PEG_MTX_GRX_C_N1



PEG_MTX_GRX_C_N5

PEG_MRX_GTX_P13

PEG_MTX_GRX_C_N15



PEG_MTX_GRX_C_P1

PEG_MTX_GRX_C_P3

PEG_MTX_GRX_C_P0

PEG_MTX_GRX_C_P2

PEG_MTX_GRX_C_P9

PEG_MTX_GRX_C_P13

PEG_MTX_GRX_C_P11

PEG_MTX_GRX_C_P8

PEG_MTX_GRX_C_P10

PEG_MTX_GRX_C_P6PEG_MTX_GRX_C_P7

PEG_MTX_GRX_C_P12

PEG_MTX_GRX_C_P5

PEG_MTX_GRX_C_P14PEG_MTX_GRX_C_P15

PEG_MTX_GRX_C_P4

PEGCOMP

VGA_BLU

CRT_RGB#

CRT_RGB#

LCD_ACLK+_NB

L_IBGENVDD

LCTLA_CLKLCTLB_DATA

LDDC_DATALDDC_CLK

LCD_A0+_NBLCD_A1+_NB

LCD_ACLK-_NB

LCD_A2+_NB

LCD_A2-_NBLCD_A1-_NBLCD_A0-_NB

PEG_MTX_GRX_C_N7

PEG_MTX_GRX_C_N14

VGA_GRN

VGA_RED

CRT_IREF

PEG_MTX_GRX_N0PEG_MTX_GRX_P0PEG_MTX_GRX_C_P0

PEG_MTX_GRX_C_N0

PEG_MTX_GRX_C_P1PEG_MTX_GRX_C_N1


PEG_MTX_GRX_C_N3PEG_MTX_GRX_C_P3




TV_C_NB

TV_CVBS_NB

TVIREF

TV_Y_NB










PEG_MTX_GRX_P1PEG_MTX_GRX_N1

PEG_MTX_GRX_N2PEG_MTX_GRX_P2

PEG_MTX_GRX_P3PEG_MTX_GRX_N3



PEG_MTX_GRX_P6

PEG_MTX_GRX_P7

PEG_MTX_GRX_N6

PEG_MTX_GRX_N7

PEG_MTX_GRX_P8

PEG_MTX_GRX_P9

PEG_MTX_GRX_N8

PEG_MTX_GRX_P10

PEG_MTX_GRX_N9

PEG_MTX_GRX_N10




PEG_MTX_GRX_P14

PEG_MTX_GRX_P15

PEG_MTX_GRX_N14

PEG_MTX_GRX_N15

PEG_MTX_GRX_P[0:15]

PEG_MTX_GRX_N[0:15]

PEG_MRX_GTX_P[0:15]

PEG_MRX_GTX_N[0:15]

BIA_PWM

LVREF

PEG_MRX_GTX_N3PEG_MRX_GTX_N4PEG_MRX_GTX_N5

CLK_DDC2

PEG_MRX_GTX_N6PEG_MRX_GTX_N7

G_CLK_DDC2G_DAT_DDC2

VGA_RED

VGA_BLU

VGA_GRN

CRT_IREF

VGA_HSYNCVGA_VSYNC

PEG_MRX_GTX_N8PEG_MRX_GTX_N9PEG_MRX_GTX_N10

LCTLA_CLK

LCTLB_DATA

PEG_MRX_GTX_N11PEG_MRX_GTX_N12PEG_MRX_GTX_N13PEG_MRX_GTX_N14PEG_MRX_GTX_N15

TV_IRTN

TV_IRTN

LVREF

PEG_MRX_GTX_P1

VGA_RED

VGA_BLU

VGA_GRN

DAT_DDC2G_DAT_DDC2

TV_CVBS_NB

TV_Y_NB

TV_C_NB

TVIREF

PANEL_BKEN

+3.3V_RUN

+1.5V_RUN_PCIE

+3.3V_RUN

+1.5V_RUN

+1.5V_RUN +1.05V_VCCP+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

LCD_A2-_NB<19>LCD_A1-_NB<19>LCD_A0-_NB<19>

LCD_A2+_NB<19>LCD_A1+_NB<19>LCD_A0+_NB<19>

LCD_ACLK-_NB<19>LCD_ACLK+_NB<19>

PEG_MRX_GTX_P[0:15] <44>

PEG_MRX_GTX_N[0:15] <44>

PEG_MTX_GRX_N[0:15] <44>

PEG_MTX_GRX_P[0:15] <44>

CFG5<10>

CFG7<10>

CFG18<10>

CFG19<10>

CFG9<10>

CFG20<10>

CFG12<10>

CFG13<10>

CFG16<10>

CFG11<10>

PANEL_BKEN<19>

ENVDD<19>

TV_C_NB<20>TV_Y_NB<20>

TV_CVBS_NB<20>

VGA_BLU<20>

VGA_GRN<20>

VGA_RED<20>

VGA_HSYNC<20>VGA_VSYNC<20>

LDDC_DATA <19>

LDDC_CLK <19>

BIA_PWM<19>

DAT_DDC2 <20>

CLK_DDC2 <20>

CFG6<10>

CFG10<10>

Title



Calistoga(3 of 6)




CFG5

CFG10Low = ReservedHigh = Mobility *

01 = XOR Mode Enabled10 = All Z Mode Enabled11 = Normal Operation

High = Reverse Lane

LVREF for Alviso N.C for Calistoga to GND

(DMI Lane Reversal)

SDVO_CTRLDATALow = No SDVO Device Present

High = SDVO Device Present

(Default)

(Default) *

(FSB Dynamic ODT)CFG16

CFG18

CFG19

*High = CalistogaLow = Moby Dick

Low = Calistoga *High = Reserved

Close to U9.J20

CFG[18:19] have internal pulldown

*

*

*

(VCC Select)

*

**

CFG7

CFG6

Low = DT/Transportable CPUHigh = Mobile CPU

CFG[13:12]

CFG[3:17] have internal pullup

Strap Pin Table

CFG20(PCIE/SDVO select) High = PCIE/SDVO are

operating simu.

Low = Only PCIE or SDVO isoperational. *

Close to U9.J22

(Default)

CFG11

Low = NormalOperation (Default):Lane number in Order

00 = Reserved

Low = 1.05V (Default)High = 1.5V

High = EnabledLow = Disabled

Low = Reverse LaneCFG9

High = Normal Operation *

Trace CRT_IREF should be atleast 25 mils away from anyother toggling signal.

High = DMI x 4Low = DMI x 2

SDVO_CTRLDATA have internal pull down

Resistors Stuff Table

UMA

Discrete

R290,R305,R307,R308,R360,R366,R301,R302,R303,R294,R295,R292,R306,R304,R38,R39,298,R299,

R271,R272,R273,R270,R53,R358,R345,R266,R267,R268,R371,R269

Stuff AC Caps For Discrete

NOTE: 1@ is for UMA Implemetation. 2@ is for Discrete Implementation.

R267 0_0402_5%~D2@12

R271 0_0402_5%~D2@12

C107 0.1U_0402_16V4Z~D 2@ 1 2

C123 0.1U_0402_16V4Z~D 2@1 2

R276 2.2K_0402_5%~D@

C106 0.1U_0402_16V4Z~D 2@1 2

R56 1K_0402_5%~D@1 2

C61 0.1U_0402_16V4Z~D 2@ 1 2

R266 0_0402_5%~D2@12

R301 150_0402_1%~D1@1 2

R304 0_0402_5%~D1@ 12

C124 0.1U_0402_16V4Z~D 2@ 1 2

R269 0_0402_5%~D2@12

C105 0.1U_0402_16V4Z~D 2@ 1 2

C91 0.1U_0402_16V4Z~D 2@1 2

R358 0_0402_5%~D2@12

R268 0_0402_5%~D2@12

C74 0.1U_0402_16V4Z~D 2@1 2

R299

2.2K_0402_5%~D1@

12

C112 0.1U_0402_16V4Z~D 2@1 2

C140 0.1U_0402_16V4Z~D 2@ 1 2

R57 1K_0402_5%~D@ 1 2

C134 0.1U_0402_16V4Z~D 2@1 2

R295 10K_0402_5%~D1@1 2

C94 0.1U_0402_16V4Z~D 2@ 1 2

R277 2.2K_0402_5%~D@1 2

R307150_0402_1%

~D1@

12

R294 10K_0402_5%~D1@1 2

R329 2.2K_0402_5%~D@1 2

C79 0.1U_0402_16V4Z~D 2@ 1 2

R308150_0402_1%

~D1@

12

C147 0.1U_0402_16V4Z~D 2@ 1 2

R273 0_0402_5%~D2@12

G

DS

Q18

BSS138_SOT23~D1@2

13

C120 0.1U_0402_16V4Z~D 2@1 2

R310 2.2K_0402_5%~D@1 2

C63 0.1U_0402_16V4Z~D 2@1 2

R306 0_0402_5%~D1@ 12

R274 2.2K_0402_5%~D@1 2

C87 0.1U_0402_16V4Z~D 2@1 2

R302 150_0402_1%~D1@1 2

R292 0_0402_5%~D1@ 12

C116 0.1U_0402_16V4Z~D 2@ 1 2

LVDS

TV

CR

T

PCI-EXPRESS GRAPHICS

U9C


SDVOCTRL_CLKH28 SDVOCTRL_DATAH27

LA_DATA0B37LA_DATA1B34LA_DATA2A36

LVREFHC33LVREFLC32

TVDAC_AA16TVDAC_BC18TVDAC_CA19

TV_IREFJ20

TV_IRTNAB16TV_IRTNBB18TV_IRTNCB19

DDCCLKC26DDCDATAC25

LA_DATA#0C37LA_DATA#1B35LA_DATA#2A37

LB_DATA0F30LB_DATA1D29LB_DATA2F28

LB_DATA#0G30LB_DATA#1D30LB_DATA#2F29

LA_CLKA32LA_CLK#A33LB_CLKE26LB_CLK#E27

LBKLT_CTLD32LBKLT_ENJ30LCTLA_CLKH30LCTLB_DATAH29LDDC_CLKG26LDDC_DATAG25LVDD_ENF32LIBGB38LVBGC35

VSYNCH23HSYNCG23BLUEE23BLUE#D23GREENC22GREEN#B22REDA21RED#B21

CRT_IREFJ22

EXP_COMPI D40EXP_COMPO D38

EXP_RXN0 F34EXP_RXN1 G38EXP_RXN2 H34EXP_RXN3 J38EXP_RXN4 L34EXP_RXN5 M38EXP_RXN6 N34EXP_RXN7 P38EXP_RXN8 R34EXP_RXN9 T38

EXP_RXN10 V34EXP_RXN11 W38EXP_RXN12 Y34EXP_RXN13 AA38EXP_RXN14 AB34EXP_RXN15 AC38

EXP_RXP0 D34EXP_RXP1 F38EXP_RXP2 G34EXP_RXP3 H38EXP_RXP4 J34EXP_RXP5 L38EXP_RXP6 M34EXP_RXP7 N38EXP_RXP8 P34EXP_RXP9 R38

EXP_RXP10 T34EXP_RXP11 V38EXP_RXP12 W34EXP_RXP13 Y38EXP_RXP14 AA34EXP_RXP15 AB38

EXP_TXN0 F36EXP_TXN1 G40EXP_TXN2 H36EXP_TXN3 J40EXP_TXN4 L36EXP_TXN5 M40EXP_TXN6 N36EXP_TXN7 P40EXP_TXN8 R36EXP_TXN9 T40

EXP_TXN10 V36EXP_TXN11 W40EXP_TXN12 Y36EXP_TXN13 AA40EXP_TXN14 AB36EXP_TXN15 AC40

EXP_TXP0 D36EXP_TXP1 F40EXP_TXP2 G36EXP_TXP3 H40EXP_TXP4 J36EXP_TXP5 L40EXP_TXP6 M36EXP_TXP7 N40EXP_TXP8 P36EXP_TXP9 R40

EXP_TXP10 T36EXP_TXP11 V40EXP_TXP12 W36EXP_TXP13 Y40EXP_TXP14 AA36EXP_TXP15 AB40

TV_DCONSEL1J29TV_DCONSEL0K30

C58 0.1U_0402_16V4Z~D 2@1 2

R272 0_0402_5%~D2@12 G

DS

Q19

BSS138_SOT23~D1@

2

13

C129 0.1U_0402_16V4Z~D 2@ 1 2

C68 0.1U_0402_16V4Z~D 2@1 2C71 0.1U_0402_16V4Z~D 2@ 1 2

C80 0.1U_0402_16V4Z~D 2@1 2

C137 0.1U_0402_16V4Z~D 2@ 1 2

R371 0_0402_5%~D2@12

R53 0_0402_5%~D2@12

R275 2.2K_0402_5%~D@1 2

C65 0.1U_0402_16V4Z~D 2@ 1 2

R290 1.5K_0402_1%~D1@12

R366

255_0402_1%~D1@

12

R303 150_0402_1%~D1@1 2

R38

2.2K_0402_5%

~D1@

12

R309 2.2K_0402_5%~D@

C113 0.1U_0402_16V4Z~D 2@ 1 2

C136 0.1U_0402_16V4Z~D 2@1 2

C109 0.1U_0402_16V4Z~D 2@1 2

R312 2.2K_0402_5%~D@1 2

R360

4.99K_0402_1%~D

1@

12

R270 0_0402_5%~D2@12

C84 0.1U_0402_16V4Z~D 2@ 1 2

R55 1K_0402_5%~D@1 2

R311 2.2K_0402_5%~D@ 1 2

C96 0.1U_0402_16V4Z~D 2@1 2 R298

2.2K_0402_5%~D1@

12

C90 0.1U_0402_16V4Z~D 2@ 1 2

R345 0_0402_5%~D2@12

R305150_0402_1%

~D1@

12

C142 0.1U_0402_16V4Z~D 2@1 2

R35324.9_0402_1%~D

1 2

R39

2.2K_0402_5%

~D1@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCA_TVBG

+3VR

UN

_ATV

VCCA_TVDACA

VCCA_TVDACB

VCCA_TVDACC

+2.5V_CRTDAC

VCCTX_LVDS

+2.5V_CRT_DAC+2.5V_CRTDAC

VCCD_TVDAC

MCH_A6

MCH_AB1

VCCA_TVBG

VCCA_TVDACA

VCCA_TVDACB

VCCA_TVDACC

VCCTX_LVDS

+2.5V_CRT_DAC

VCCD_TVDAC

VCCD_LVDS

+3.3V_TV_DAC

+3GPLL_R

VCCA_LVDS

VCCA_LVDS

VSSA_TVBG

VCC_SYNC

+1.5VRUN_QTVDAC

+3V_GPLL

+1.5VRUN_PCIE

VCCD_TV_DAC

VCCD_LVDS

MCH_D2 +1.5V_RUN_HPLL

+1.5V_RUN_DPLLB

+1.5V_RUN

+1.5V_RUN_DPLLA

+1.5V_RUN

+1.5V_RUN+1.5V_RUN

+1.5V_RUN_MPLL

+1.05V_VCCP

+1.5V_RUN

+1.5V_RUN

+1.5V_RUN_DPLLB+1.5V_RUN_DPLLA

+1.5V_RUN

+1.5V_RUN_MPLL

+3.3V_RUN

+1.5V_RUN_3GPLL

+1.5V_RUN_HPLL

+1.5V_RUN

+2.5V_RUN

+3.3V_RUN

+1.5V_RUN_QTVDAC

+3VRUN_TVDACA

+3VRUN_TVDACB

+3V_TVDAC

+3VRUN_TVDACC

+3VRUN_ATVBG

+3.3V_RUN

+1.5V_RUN

VCCTX_LVDS VCCA_LVDS

+1.5V_RUN_QTVDAC

+2.5V_RUN

+1.05V_VCCP

+2.5V_RUN

+1.5V_RUN

+3VRUN_ATVBG

+3VRUN_TVDACA

+1.5V_RUN

+3VRUN_TVDACB

+3VRUN_TVDACC

+1.5V_RUN

+1.5V_RUN

+1.5V_RUN_QTVDAC

+1.5V_RUN_PCIE

+1.5V_RUN

+2.5V_RUN

+2.5V_RUN

+2.5V_RUN

+1.5V_RUN+1.05V_VCCP

+1.5V_RUN_3GPLL +1.5V_RUN

+2.5V_RUN

+1.5V_RUN

Title



Calistoga(4 of 6)





W=30 mils

La, Lb use 0_0805_5% resistorfor Int. VGA as Travis.

close pin A38

Note : Ca~Cd No stuff for Ext. VGA. Stuff for Int. VGA.

+3V_TVDAC

close pin B30/C30/A30

Ce, Cf, Cg, Ch, Cj, Ck,Cl replace by 0 ohm0805 resistor

close pin D21

Should be placed in cavity

TV DAC Voltge Follower Circuit - 700mVCRT DAC Voltge Follower Circuit - 700mV

Route +2.5V_RUN from GMCH pinG41 todecoupling cap (C314)<200mil to the edge.

CRB 270uF

40mA Max.

45mA Max. 45mA Max.

40mA Max.

Should be placed on top

CRTDAC: Route caps within250mil of Alviso. Route FBwithin 3" of Calistoga

Route VSSACRTDAC gnd from GMCH todecoupling cap ground lead and thenconnect to the gnd plane.

Connect the GND plane of pin G20with decoupling cap of C296 pin2GND via.

200mA

100mA

Ca Cb

Cc Cd

La Lb

Ce

Cf

Cg ChPlace Bottom

Cj

Note : C15,C311 stuff for UMA No Stuff for Ext. VGA.

CkCl

Place the capsclose to pins

Place the C348close to M3

For Power measurement.No need for RTS board

For Power measurement.No need for RTS board

R30 0_0402_5%~D2@12

C25

0.022U_0402_16V7K~D

1@

1

2

L10 BLM18PG181SN1_0603~D1@1 2

R23 0_0402_5%~D2@12

R48 0_0402_5%~D2@12

C41

0.1U_0402_16V4Z~D

1@

1

2

R46 0_0402_5%~D2@12

R421

0_0805_5%~D

1 2

R344 0_0402_5%~D12

C514

0.1U_0402_16V4Z~D

1

2

+

C83

220U_D

2_4VM_R

45~D

1

2

R3610_0402_5%~D1@

12

R36 0_0402_5%~D2@12

C131

10U_0805_4VAM

~D

1

2

C278

0.47U_0402_10V4Z~D

1

2

C32

0.1U_0402_16V4Z~D

1

2

L13


12

C21

22n_0805_25V1@

1 2

3

R52 0_0402_5%~D1@12

R546

10_0603_5%~D1@

1 2

C289

0.22U_0402_10V4Z~D

1

2

D12

MMBD4148_SOT23~D1@

1

3

2

R25 0_0402_5%~D1@12

C434

0.47U_0402_10V4Z~D

1

2

C274

4.7U_0603_6.3V6M

~D1@

1

2

C348

0.22U_0402_10V4Z~D

1

2

L7BLM18PG181SN1_0603~D

1 2

C438

4.7U_0603_6.3V6M

~D

1

2

C460

0.1U_0402_16V4Z~D

1

2

C33

10U_0805_4VAM

~D1@

1

2

C332

2.2U_0603_6.3V6K~D

1

2

R41 0_0402_5%~D1@12

D17

MMBD4148_SOT23~D1@

1

3

2

C31

22n_0805_25V

1 2

3

C43

0.01U_0402_16V7K~D

1@

1

2

C18

22n_0805_25V1@

1 2

3

C314

0.1U_0402_16V4Z~D

1

2

R51 0_0402_5%~D2@12

C42

0.1U_0402_16V4Z~D

1

2

R378

10_0603_5%~D1@

1 2

C14

0.022U_0402_16V7K~D

1@

1

2

C8

0.1U_0402_16V4Z~D

1@

1

2 R28

0_0603_5%~D 1@

12

C115

10U_0805_4VAM

~D

1

2

R409

0.5_0805_1%~D 1 2

C51

0.022U_0402_16V7K~D

1@

1

2

L38

BLM11A121S_0603~D 12

C7

0.1U_0402_16V4Z~D1@

1

2

C271

22n_0805_25V

1@

12

3

C307

0.022U_0402_16V7K~D

1

2

P O W E R

U9H


VCC_SYNC H22

VCCTX_LVDS0 B30VCCTX_LVDS1 C30

VCC3G0 AB41VCC3G1 AJ41VCC3G2 L41VCC3G3 N41VCC3G4 R41VCC3G5 V41VCC3G6 Y41

VCCA_3GBG G41VSSA_3GBG H41

VCCA_3GPLL AC33

VCCTX_LVDS2 A30

VCCA_LVDS A38VSSA_LVDS B39

VCCA_MPLL AF2

VCCA_TVBG H20VSSA_TVBG G20

VCCA_TVDACA0 E19VCCA_TVDACA1 F19VCCA_TVDACB0 C20VCCA_TVDACB1 D20VCCA_TVDACC0 E20VCCA_TVDACC1 F20

VCCAUX1 AF31VCCAUX2 AE31VCCAUX3 AC31VCCAUX4 AL30VCCAUX5 AK30VCCAUX6 AJ30VCCAUX7 AH30VCCAUX8 AG30VCCAUX9 AF30

VCCAUX10 AE30VCCAUX11 AD30VCCAUX12 AC30VCCAUX13 AG29VCCAUX14 AF29VCCAUX15 AE29VCCAUX16 AD29VCCAUX17 AC29VCCAUX18 AG28VCCAUX19 AF28VCCAUX20 AE28

VTT0AC14VTT1AB14VTT2W14VTT3V14VTT4T14VTT5R14VTT6P14VTT7N14VTT8M14VTT9L14VTT10AD13VTT11AC13VTT12AB13VTT13AA13VTT14Y13VTT15W13VTT16V13VTT17U13VTT18T13VTT19R13VTT20N13VTT21M13VTT22L13VTT23AB12VTT24AA12VTT25Y12VTT26W12VTT27V12VTT28U12VTT29T12VTT30R12VTT31P12VTT32N12VTT33M12VTT34L12VTT35R11VTT36P11VTT37N11VTT38M11VTT39R10VTT40P10VTT41N10VTT42M10VTT43P9VTT44N9VTT45M9VTT46R8VTT47P8VTT48N8VTT49M8VTT50P7VTT51N7VTT52M7VTT53R6VTT54P6VTT55M6VTT56A6VTT57R5

VTT59N5VTT60M5VTT61P4VTT62N4VTT63M4VTT64R3VTT65P3VTT66N3VTT67M3VTT68R2VTT69P2VTT70M2VTT71D2VTT72AB1VTT73R1VTT74P1VTT75N1VTT76M1

VCCA_CRTDAC0 E21VCCA_CRTDAC1 F21VSSA_CRTDAC2 G21

VCCA_DPLLA B26VCCA_DPLLB C39

VCCA_HPLL AF1

VCCD_HMPLL0 AH1VCCD_HMPLL1 AH2

VCCD_LVDS0 A28VCCD_LVDS1 B28VCCD_LVDS2 C28

VCCD_TVDAC D21VCCDQ_TVDAC H19

VCCHV0 A23VCCHV1 B23 VCCHV2 B25

VCCAUX21 AH22VCCAUX22 AJ21VCCAUX23 AH21VCCAUX24 AJ20VCCAUX25 AH20VCCAUX26 AH19VCCAUX27 P19VCCAUX28 P16VCCAUX29 AH15VCCAUX30 P15VCCAUX31 AH14

VCCAUX32AG14VCCAUX33AF14VCCAUX34AE14VCCAUX35Y14VCCAUX36AF13VCCAUX37AE13VCCAUX38AF12VCCAUX39AE12VCCAUX40AD12

VCCAUX0 AK31

VTT58P5

C290

0.1U_0402_16V4Z~D

1@

1

2

C447

0.1U_0402_16V4Z~D

1

2

C40

0.01U_0402_16V7K~D

1@1

2

C296

0.022U_0402_16V7K~D

1@

1

2

+

C367

220U_D

2_4VM_R

45~D

1

2

C45022U_0805_6.3VAM~D

1

2

C285

0.1U_0402_16V4Z~D

1

2

C279

0.1U_0402_16V4Z~D

1

2

C273

0.1U_0402_16V4Z~D

1@

1

2

R20 0_0402_5%~D1@12

C448

10U_0805_4VAM

~D

1

2

C270

0.022U_0402_16V7K~D

1@

1

2

C304

0.1U_0402_16V4Z~D1@

1

2

C48822U_0805_6.3VAM~D

1

2

R47 0_0402_5%~D1@12

C47

22n_0805_25V1@

1 2

3

R37 0_0402_5%~D1@12

C19

22n_0805_25V1@

1 2

3

C23

0.1U_0402_16V4Z~D

1@

1

2

C474

0.1U_0402_16V4Z~D

1

2

C39

0.022U_0402_16V7K~D

1@

1

2

C36

22n_0805_25V1@

1 2

3

R54 0_0402_5%~D2@12

L6

10U_CK2125 100M-T_20%_0805~D

12

R3230_0402_5%~D

1@

12

C59

0.1U_0402_16V4Z~D

1@

1

2

C9

0.1U_0402_16V4Z~D

1@

1

2

+ C15470U_D2_2.5VM_R15~D1@

1

2

L26

10U_CK2125 100M-T_20%_0805~D

12

C483

0.1U_0402_16V4Z~D

1

2

L5BLM18PG181SN1_0603~D1@

1 2

R60 0_0402_5%~D2@12

L39

BLM21PG600SN1D_0805~D 12

R29 0_0402_5%~D1@12

R24 0_0402_5%~D2@12

C30

10U_0805_4VAM

~D

1

2

+ C311470U_D2_2.5VM_R15~D1@

1

2

R3740_0402_5%~D2@

12

L40

BLM11A121S_0603~D 12

C10

10U_0805_4VAM

~D1@

1

2

R99

0_0805_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSM_LF2VCCSM_LF1

VCCSM_LF5VCCSM_LF4

+1.05V_VCCP

+1.5V_RUN+1.05V_VCCP

+1.8V_SUS+1.05V_VCCP

+1.8V_SUS

Title



Calistoga(5 of 6)




Place near U9.AT41 & AM41

Place near U9.AV1 & AJ1

Place near U9.BA23

Place near U9.BA15

CRB 270uF

C338

0.22U_0402_10V4Z~D

1

2

C496

0.1U_0402_16V4Z~D

1

2

C515

0.47U_0402_10V4Z~D

1

2

C526

0.47U_0402_10V4Z~D

1

2

+

C568

220U_D

2_4VM_R

45~D

1

2

C528

0.47U_0402_10V4Z~D

1

2

C405

10U_0805_4VAM

~D

1

2

C500

0.1U_0402_16V4Z~D

1

2

C413

0.22U_0402_10V4Z~D

1

2

C185

10U_0805_4VAM

~D

1

2

C345

10U_0805_4VAM

~D

1

2

C490

0.1U_0402_16V4Z~D

1

2

+

C548

220U_D

2_4VM_R

45~D

1

2

C525

0.47U_0402_10V4Z~D

1

2

C184

0.1U_0402_16V4Z~D

1

2

C533

0.47U_0402_10V4Z~D

1

2

C337

1U_0603_10V4Z~D

1

2

C186

10U_0805_4VAM

~D

1

2

C531

0.47U_0402_10V4Z~D

1

2

C489

0.47U_0402_10V4Z~D

1

2

C497

0.47U_0402_10V4Z~D

1

2

P O W E R

U9G


VCC0AA33VCC1W33VCC2P33VCC3N33VCC4L33VCC5J33VCC6AA32VCC7Y32VCC8W32VCC9V32VCC10P32VCC11N32VCC12M32VCC13L32VCC14J32VCC15AA31VCC16W31VCC17V31VCC18T31VCC19R31VCC20P31VCC21N31VCC22M31VCC23AA30VCC24Y30VCC25W30VCC26V30VCC27U30VCC28T30VCC29R30VCC30P30VCC31N30VCC32M30VCC33L30VCC34AA29VCC35Y29VCC36W29VCC37V29VCC38U29VCC39R29VCC40P29VCC41M29VCC42L29VCC43AB28VCC44AA28VCC45Y28

VCC_SM5 AY34VCC_SM6 AW34VCC_SM7 AV34VCC_SM8 AU34VCC_SM9 AT34

VCC_SM10 AR34VCC_SM11 BA30VCC_SM12 AY30VCC_SM13 AW30VCC_SM14 AV30VCC_SM15 AU30VCC_SM16 AT30VCC_SM17 AR30VCC_SM18 AP30VCC_SM19 AN30VCC_SM20 AM30VCC_SM21 AM29VCC_SM22 AL29VCC_SM23 AK29VCC_SM24 AJ29VCC_SM25 AH29VCC_SM26 AJ28VCC_SM27 AH28VCC_SM28 AJ27VCC_SM29 AH27VCC_SM30 BA26VCC_SM31 AY26VCC_SM32 AW26VCC_SM33 AV26VCC_SM34 AU26VCC_SM35 AT26VCC_SM36 AR26VCC_SM37 AJ26VCC_SM38 AH26VCC_SM39 AJ25VCC_SM40 AH25VCC_SM41 AJ24VCC_SM42 AH24VCC_SM43 BA23VCC_SM44 AJ23VCC_SM45 BA22VCC_SM46 AY22VCC_SM47 AW22VCC_SM48 AV22VCC_SM49 AU22VCC_SM50 AT22VCC_SM51 AR22VCC_SM52 AP22VCC_SM53 AK22VCC_SM54 AJ22VCC_SM55 AK21VCC_SM56 AK20VCC_SM57 BA19VCC_SM58 AY19VCC_SM59 AW19VCC_SM60 AV19VCC_SM61 AU19VCC_SM62 AT19VCC_SM63 AR19VCC_SM64 AP19VCC_SM65 AK19VCC_SM66 AJ19VCC_SM67 AJ18VCC_SM68 AJ17VCC_SM69 AH17VCC_SM70 AJ16VCC_SM71 AH16VCC_SM72 BA15

VCC_SM3 AU40VCC_SM4 BA34

VCC_SM73 AY15VCC_SM74 AW15VCC_SM75 AV15VCC_SM76 AU15VCC_SM77 AT15VCC_SM78 AR15VCC_SM79 AJ15VCC_SM80 AJ14VCC_SM81 AJ13VCC_SM82 AH13VCC_SM83 AK12VCC_SM84 AJ12VCC_SM85 AH12VCC_SM86 AG12VCC_SM87 AK11VCC_SM88 BA8VCC_SM89 AY8VCC_SM90 AW8VCC_SM91 AV8VCC_SM92 AT8VCC_SM93 AR8VCC_SM94 AP8VCC_SM95 BA6VCC_SM96 AY6VCC_SM97 AW6VCC_SM98 AV6VCC_SM99 AT6

VCC_SM1 AT41VCC_SM0 AU41

VCC_SM2 AM41

VCC46V28VCC47U28VCC48T28VCC49R28VCC50P28VCC51N28VCC52M28VCC53L28VCC54P27VCC55N27VCC56M27VCC57L27VCC58P26VCC59N26VCC60L26VCC61N25VCC62M25VCC63L25VCC64P24VCC65N24VCC66M24VCC67AB23VCC68AA23VCC69Y23VCC70P23VCC71N23VCC72M23VCC73L23VCC74AC22VCC75AB22VCC76Y22VCC77W22VCC78P22VCC79N22VCC80M22VCC81L22VCC82AC21VCC83AA21VCC84W21VCC85N21VCC86M21VCC87L21VCC88AC20VCC89AB20VCC90Y20VCC91W20VCC92P20VCC93N20VCC94M20VCC95L20VCC96AB19VCC97AA19VCC98Y19VCC99N19

P O

W E

R

U9F


VCC_NCTF1AC27VCC_NCTF2AB27VCC_NCTF3AA27VCC_NCTF4Y27VCC_NCTF5W27VCC_NCTF6V27VCC_NCTF7U27

VCCAUX_NCTF52 Y15

VCC_NCTF9R27VCC_NCTF10AD26VCC_NCTF11AC26VCC_NCTF12AB26VCC_NCTF13AA26VCC_NCTF14Y26VCC_NCTF15W26VCC_NCTF16V26VCC_NCTF17U26VCC_NCTF18T26VCC_NCTF19R26VCC_NCTF20AD25VCC_NCTF21AC25VCC_NCTF22AB25VCC_NCTF23AA25VCC_NCTF24Y25VCC_NCTF25W25

VCCAUX_NCTF53 W15

VCC_NCTF27U25VCC_NCTF28T25VCC_NCTF29R25VCC_NCTF30AD24VCC_NCTF31AC24VCC_NCTF32AB24VCC_NCTF33AA24VCC_NCTF34Y24VCC_NCTF35W24VCC_NCTF36V24

VCCAUX_NCTF54 V15

VCC_NCTF38T24VCC_NCTF39R24VCC_NCTF40AD23VCC_NCTF41V23VCC_NCTF42U23VCC_NCTF43T23VCC_NCTF44R23VCC_NCTF45AD22VCC_NCTF46V22VCC_NCTF47U22VCC_NCTF48T22VCC_NCTF49R22VCC_NCTF50AD21VCC_NCTF51V21VCC_NCTF52U21VCC_NCTF53T21VCC_NCTF54R21VCC_NCTF55AD20VCC_NCTF56V20VCC_NCTF57U20VCC_NCTF58T20

VCCAUX_NCTF55 U15

VCC_NCTF60AD19VCC_NCTF61V19VCC_NCTF62U19VCC_NCTF63T19VCC_NCTF64AD18VCC_NCTF65AC18VCC_NCTF66AB18VCC_NCTF67AA18VCC_NCTF68Y18VCC_NCTF69W18VCC_NCTF70V18VCC_NCTF71U18VCC_NCTF72T18

VCC_NCTF0AD27 VCCAUX_NCTF0 AG27VCCAUX_NCTF1 AF27VCCAUX_NCTF2 AG26VCCAUX_NCTF3 AF26VCCAUX_NCTF4 AG25VCCAUX_NCTF5 AF25VCCAUX_NCTF6 AG24VCCAUX_NCTF7 AF24VCCAUX_NCTF8 AG23VCCAUX_NCTF9 AF23

VCCAUX_NCTF10 AG22VCCAUX_NCTF11 AF22VCCAUX_NCTF12 AG21VCCAUX_NCTF13 AF21VCCAUX_NCTF14 AG20VCCAUX_NCTF15 AF20VCCAUX_NCTF16 AG19VCCAUX_NCTF17 AF19VCCAUX_NCTF18 R19VCCAUX_NCTF19 AG18VCCAUX_NCTF20 AF18VCCAUX_NCTF21 R18VCCAUX_NCTF22 AG17VCCAUX_NCTF23 AF17VCCAUX_NCTF24 AE17VCCAUX_NCTF25 AD17VCCAUX_NCTF26 AB17VCCAUX_NCTF27 AA17VCCAUX_NCTF28 W17VCCAUX_NCTF29 V17VCCAUX_NCTF30 T17VCCAUX_NCTF31 R17VCCAUX_NCTF32 AG16VCCAUX_NCTF33 AF16VCCAUX_NCTF34 AE16VCCAUX_NCTF35 AD16VCCAUX_NCTF36 AC16VCCAUX_NCTF37 AB16VCCAUX_NCTF38 AA16VCCAUX_NCTF39 Y16VCCAUX_NCTF40 W16VCCAUX_NCTF41 V16VCCAUX_NCTF42 U16VCCAUX_NCTF43 T16VCCAUX_NCTF44 R16VCCAUX_NCTF45 AG15VCCAUX_NCTF46 AF15VCCAUX_NCTF47 AE15VCCAUX_NCTF48 AD15VCCAUX_NCTF49 AC15VCCAUX_NCTF50 AB15

VSS_NCTF0 AE27

VCCAUX_NCTF51 AA15

VSS_NCTF1 AE26

VCC_NCTF59R20

VCCAUX_NCTF56 T15

VSS_NCTF2 AE25VSS_NCTF3 AE24VSS_NCTF4 AE23VSS_NCTF5 AE22VSS_NCTF6 AE21VSS_NCTF7 AE20VSS_NCTF8 AE19VSS_NCTF9 AE18

VSS_NCTF10 AC17VSS_NCTF11 Y17VSS_NCTF12 U17

VCC_NCTF26V25

VCCAUX_NCTF57 R15

VCC_NCTF37U24

VCC_NCTF8T27

VCC100M19VCC101L19VCC102N18VCC103M18VCC104L18VCC105P17VCC106N17VCC107M17VCC108N16VCC109M16VCC110L16

VCC_SM100 AR6VCC_SM101 AP6VCC_SM102 AN6VCC_SM103 AL6VCC_SM104 AK6VCC_SM105 AJ6VCC_SM106 AV1VCC_SM107 AJ1

C440

0.22U_0402_10V4Z~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet o fLA-3001 0.4

Calistoga(6 of 6)




P O W E R

U9J


VSS200AN21VSS201AL21VSS202AB21VSS203Y21VSS204P21VSS205K21VSS206J21VSS207H21VSS208C21VSS209AW20VSS210AR20VSS211AM20VSS212AA20VSS213K20VSS214B20VSS215A20VSS216AN19VSS217AC19VSS218W19VSS219K19VSS220G19VSS221C19VSS222AH18VSS223P18VSS224H18VSS225D18VSS226A18VSS227AY17VSS228AR17VSS229AP17VSS230AM17VSS231AK17VSS232AV16VSS233AN16VSS234AL16VSS235J16VSS236F16VSS237C16VSS238AN15VSS239AM15VSS240AK15VSS241N15VSS242M15VSS243L15VSS244B15VSS245A15VSS246BA14VSS247AT14VSS248AK14VSS249AD14VSS250AA14VSS251U14VSS252K14VSS253H14VSS254E14VSS255AV13VSS256AR13VSS257AN13VSS258AM13VSS259AL13VSS260AG13VSS261P13VSS262F13

VSS266AC12VSS267K12VSS268H12VSS269E12VSS270AD11VSS271AA11VSS272Y11VSS273J11VSS274D11VSS275B11VSS276AV10VSS277AP10VSS278AL10VSS279AJ10

VSS265D13VSS264B13VSS263AY12

VSS285 AW9VSS286 AR9VSS287 AH9VSS288 AB9VSS289 Y9VSS290 R9VSS292 G9VSS291 E9VSS293 A9VSS294 AG8VSS295 AD8VSS296 AA8VSS297 U8VSS298 K8VSS299 C8VSS300 BA7VSS301 AV7VSS302 AP7VSS303 AL7VSS304 AJ7VSS305 AH7VSS306 AF7VSS307 AC7VSS308 R7VSS309 G7VSS310 D7VSS311 AG6VSS312 AD6VSS313 AB6VSS314 Y6

VSS317 K6VSS318 H6VSS319 B6VSS320 AV5VSS321 AF5VSS322 AD5VSS323 AY4VSS324 AR4VSS325 AP4VSS326 AL4VSS327 AJ4VSS328 Y4VSS329 U4VSS330 R4VSS331 J4VSS332 F4VSS333 C4VSS334 AY3VSS335 AW3VSS336 AV3VSS337 AL3

VSS341 AD3

VSS345 AT2VSS346 AR2VSS347 AP2VSS348 AK2

VSS351 AB2VSS352 Y2VSS353 U2VSS354 T2VSS355 N2VSS356 J2VSS357 H2

VSS359 C2VSS360 AL1

VSS358 F2

VSS349 AJ2VSS350 AD2

VSS344 G3VSS343 AA3VSS342 AC3

VSS340 AF3

VSS338 AH3

VSS280 AG10VSS281 AC10VSS282 W10VSS283 U10VSS284 BA9

VSS315 U6VSS316 N6

VSS339 AG3

P O W E R

U9I


VSS0AC41VSS1AA41VSS2W41VSS3T41VSS4P41VSS5M41VSS6J41VSS7F41VSS8AV40VSS9AP40VSS10AN40VSS11AK40

VSS13AH40VSS14AG40VSS15AF40VSS16AE40VSS17B40VSS18AY39VSS19AW39

VSS21AR39VSS22AN39

VSS24AC39VSS25AB39VSS26AA39VSS27Y39VSS28W39VSS29V39VSS30T39VSS31R39VSS32P39VSS33N39VSS34M39VSS35L39VSS36J39VSS37H39

VSS20AV39

VSS23AJ39

VSS12AJ40

VSS38G39

VSS40D39VSS41AT38VSS42AM38VSS43AH38VSS44AG38VSS45AF38VSS46AE38VSS47C38VSS48AK37VSS49AH37VSS50AB37VSS51AA37VSS52Y37VSS53W37VSS54V37VSS55T37VSS56R37VSS57P37VSS58N37VSS59M37VSS60L37VSS61J37VSS62H37VSS63G37VSS64F37VSS65D37VSS66AY36VSS67AW36VSS68AN36VSS69AH36VSS70AG36VSS71AF36VSS72AE36VSS73AC36VSS74C36VSS75B36VSS76BA35VSS77AV35VSS78AR35VSS79AH35VSS80AB35VSS81AA35VSS82Y35VSS83W35VSS84V35VSS85T35VSS86R35VSS87P35VSS88N35VSS89M35VSS90L35VSS91J35VSS92H35VSS93G35VSS94F35VSS95D35VSS96AN34VSS97AK34VSS98AG34VSS99AF34

VSS39F39

VSS100 AE34VSS101 AC34VSS102 C34VSS103 AW33VSS104 AV33VSS105 AR33VSS106 AE33VSS107 AB33VSS108 Y33VSS109 V33VSS110 T33VSS111 R33VSS112 M33VSS113 H33VSS114 G33VSS115 F33VSS116 D33VSS117 B33VSS118 AH32VSS119 AG32VSS120 AF32VSS121 AE32VSS122 AC32VSS123 AB32VSS124 G32VSS125 B32VSS126 AY31VSS127 AV31VSS128 AN31VSS129 AJ31VSS130 AG31VSS131 AB31VSS132 Y31VSS133 AB30VSS134 E30VSS135 AT29VSS136 AN29VSS137 AB29VSS138 T29VSS139 N29VSS140 K29VSS141 G29VSS142 E29VSS143 C29VSS144 B29VSS145 A29VSS146 BA28VSS147 AW28VSS148 AU28VSS149 AP28VSS150 AM28VSS151 AD28VSS152 AC28VSS153 W28VSS154 J28VSS155 E28VSS156 AP27VSS157 AM27VSS158 AK27VSS159 J27VSS160 G27VSS161 F27VSS162 C27VSS163 B27VSS164 AN26VSS165 M26VSS166 K26VSS167 F26VSS168 D26VSS169 AK25VSS170 P25VSS171 K25VSS172 H25VSS173 E25VSS174 D25VSS175 A25VSS176 BA24VSS177 AU24VSS178 AL24VSS179 AW23VSS180 AT23VSS181 AN23VSS182 AM23VSS183 AH23VSS184 AC23VSS185 W23VSS186 K23VSS187 J23VSS188 F23VSS189 C23VSS190 AA22VSS191 K22VSS192 G22VSS193 F22VSS194 E22VSS195 D22VSS196 A22VSS197 BA21VSS198 AV21VSS199 AR21

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+FAN1_VOUT

REM_DIODE1_PREM_DIODE1_N

THERMATRIP2#

+3VSUS_THRM

DAT_SMBCLK_SMB

THERMATRIP1#

LDO_SET

+3V_LD

OIN

+FAN1_VOUT

THERMTRIP_VGA#

ATF_INT#

VCP1

VGA_THERMDP_R

VCP2

LDO_SET

VCP1

THERMATRIP2#

THERMATRIP1#

VGA_THERMDN_R

VGA_THERMDP_R

VGA_THERMDN_R

+3.3V_RUN

+3.3V_ALW

+3.3V_SUS

+RTC_CELL

+3.3V_SUS

+3.3V_SUS

+2.5V_RUN

+3.3V_RUN

+RTC_CELL

+5V_SUS+5V_SUS

+5V_RUN

+5V_SUS+5V_SUS

+2.5V_RUN

+3.3V_SUS

+3.3V_SUS

+1.05V_VCCP

+1.05V_VCCP

FAN1_TACH <30>

ATF_INT# <30>

THERMTRIP_SIO <31>

DAT_SMB<30>CLK_SMB<30>

H_THERMDA<7>

H_THERMDC<7>

SUSPWROK<23,33>

POWER_SW#<30,35>

ICH_PWRGD#<33>

ACAV_IN <30,43>

THERM_STP# <39>

2.5V_RUN_PWRGD <33>

5V_CAL_SIO2# <31>

SNIFFER_GREEN#<35>SNIFFER_YELLOW#<35>

VGA_THERMDP<45>

5V_CAL_SIO# <31>

H_THERMTRIP#<7>

VGA_THERMDN<45>

THERMTRIP_MCH#<10>

THERMTRIP_VGA#<44>

Title



Thermal sensor and Fan




1

E 3

2222 SYMBOL(SOT23-NEW)

2

C

B

Place under CPU

FAN1 Control and Tachometer

VGA_THERMDN_R/VGA_THERMDN,VGA_THERMDP_R/VGA_THERMDP routingtogether. Trace width / Spacing = 10 / 10 mil

Place near the bottom SODIMM For UMA design

SMBUS ADDRESS : 2F

Place C251 as close to theGuardian pins as possible


REM_DIODE1_N, REM_DIODE1_P routing together.Trace width / Spacing = 10 / 10 mil

H_THERMDA/H_THERMDCrouting together. Tracewidth / Spacing = 10 / 10 mil


For Discrete: Stuff R259,R249 and no stuff Q13,C253

For UMA: Stuff Q13 and no stuff R259,R249

Place thermal resistor near the SODIMM For discrete design

May need to place thermal resistor underneath WWAN Mini Card stuffthis thermistor circuit for additional sensor in Discrete Down Designs

Dell COE schematic suggest populatefor discrete down design

Voltage margining circuit for LDO output.ForVmargin, stuff R280=31.6K and R279=1K for production

Vset=(Tp-70/21)

To cut the stub tracefor discrete M/B

C257

10U_0805_10V4Z~D

1

2

C260

0.1U_0402_16V4Z~D

@ 1

2R609 0_0402_5%~D1@

12

EB

C

Q14PMBT3904_SOT23~D

2

31

G

D

SQ72N7002_SOT23~D

2@

2

13

R285 10K_0402_5%~D@12

C234

1000P_0402_50V7K~D@

1

2 C267

0.1U_0402_16V4Z~D

1

2

R249

0_0402_5%~D

2@

12

C251

2200P_0402_50V7K~D

1

2

R1810K_0402_5%~D

2@

R32049.9_0603_1%~D

1 2

R2552.2K_0402_5%~D

1 2

R279

1K_0603_5%~D

12

C162200P_0402_50V7K~D

1

2

C252

2200P_0402_50V7K~D

1

2

R284 7.5K_0402_5%~D 1 2

R316 1K_0402_5%~D

1 2

EB

C

Q3PMBT3904_SOT23~D

2

31

C268

0.1U_0402_16V4Z~D

1

2

C250

2200P_0402_50V7K~D

1

2

R260

8.2K_0402_5%~D

12

C100

2200P_0402_50V7K~D@

1

2

D10

RB751V_SOD323~D@

21

R13310KB_0603_1%_TSM1A103F34D3R~D

2@

1 2

C253

2200P_0402_50V7K~D

@1

2

U16

EMC4000_C_QFN40~D

SMDATA7SMBCLK8

LDO_SHDN#_ADDR23

DP235DN234

+3V_SUS12VSUS_PWRGD21

+RTC_PWR3V18

+3V_PWROK#13

POWER_SW#38

THERMTRIP1#14

THERMTRIP2#15

THERMTRIP3#16

VSET39HW_LOCK#29VSS9

ATF_INT# 17

VCP 3

LDO_POK 31

DN1 36DP1 37

THERMTRIP_SIO 30THERM_STP# 4

INTRUDER# 22

DP31DN32

VDD_5V 5

FAN_OUT6

GPIO110GPIO211GPIO319GPIO420

LDO_SET 24

LDO_OUT 25

LDO_IN 26

LDO_OUT 27

LDO_IN 28

GPIO532

FAN_DAC33

VCP 40

Thermal41

C262

0.1U_0402_16V4Z~D

1

2

R250

10K_0402_5%~D

12

R247118K_0402_1%~D

12

R2782.2K_0402_5%~D

1 2

R2210K_0402_5%~D

C122200P_0402_50V7K~D

2@1

2

R256

1K_0402_5%~D

1

2

JFAN1

MOLEX_53398-0371~D

112233

C233

1000P_0402_50V7K~D@

1

2

R315 1K_0402_5%~D

1 2

C2552200P_0402_50V7K~D

1

2

R251

0.27_1210_5%~D

1 2

R321 8.2K_0402_5%~D 1 2

R259

0_0402_5%~D

2@12

C259

1U_0603_10V4Z~D

1

2

EB

C

Q13PMBT3904_SOT23~D

1@

2

31

R44010KB_0603_1%_TSM1A103F34D3R~D

1 2

R192.21K_0603_1%~D

2@

C17

0.1U_0402_16V4Z~D

@1

2

R212.21K_0603_1%~D

C235

22U_1206_10V4Z~D

1

2

EB

C

Q20PMBT3904_SOT23~D

2

31

C247

0.1U_0402_16V4Z~D

1

2

R113

10K_0402_5%~D

12

G

D

SQ24

2N7002_SOT23~D

2

13

C11

10U_0805_10V4Z~D

1

2

C269

0.1U_0402_16V4Z~D

1

2

R3178.2K_0402_5%~D

12

C261

0.1U_0402_16V4Z~D

1

2

R242

332K_0402_1%~D

12

R608 0_0402_5%~D1@12

R28031.6K_0402_1%~D

@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_CKE1_DIMMADDR_A_MA1

DDR_A_CAS#

DDR_A_MA3

M_ODT1DDR_CS1_DIMMA#

DDR_A_WE#

DDR_A_MA5

DDR_A_BS0

DDR_A_MA8

DDR_A_MA10

DDR_A_RAS#DDR_CS0_DIMMA#DDR_A_MA9

DDR_A_MA12

DDR_A_BS2

DDR_CKE0_DIMMA

DDR_A_MA6DDR_A_MA7DDR_A_MA11

DDR_A_MA2DDR_A_MA4

M_ODT0DDR_A_MA13

DDR_A_BS1DDR_A_MA0

DDR_A_D58

DDR_A_D40

DDR_A_DM0

DDR_A_DQS7

DDR_A_DQS#5

DDR_A_DM4

M_ODT0

DDR_A_MA2

DDR_A_D4

DDR_A_D38

DDR_A_DM5

DDR_A_WE#

DDR_A_MA1

DDR_A_D52

DDR_A_BS1

DDR_A_D28

DDR_A_D21

CLK_SDATA

DDR_A_MA10

DDR_A_DM3

DDR_CS0_DIMMA#

DDR_A_D29

DDR_A_D22

DDR_A_D59

M_CLK_DDR0

DDR_A_DQS#7

DDR_A_DM6

DDR_A_MA11

DDR_A_D30

DDR_A_DQS#4

DDR_A_D26

DDR_A_D1DDR_A_D0

M_CLK_DDR#1M_CLK_DDR1

DDR_A_D53

DDR_A_D23

DDR_A_MA5

DDR_A_DQS0

DDR_A_D47

DDR_A_DQS3DDR_A_DQS#3

DDR_A_CAS#

DDR_A_D18

DDR_A_DQS2

DDR_A_D14

DDR_A_D63

DDR_A_D50

DDR_A_D41

DDR_A_D33

DDR_CS1_DIMMA#

DDR_A_D16

DDR_A_D13

DDR_A_D5

DDR_A_D2

DDR_A_D55

DDR_A_DQS5

DDR_A_MA7

CLK_SCLK

DDR_A_D56

DDR_A_DQS6

DDR_A_D34

DDR_A_D3

DDR_A_D54

DDR_A_D36

DDR_A_D43

DDR_A_MA12

DDR_A_D27

DDR_A_D15

M_CLK_DDR#0

DDR_A_D37

DDR_A_MA6

DDR_CKE1_DIMMA

DDR_A_D20

DDR_A_D51

DDR_A_D35

DDR_A_DQS#2

DDR_A_D62

DDR_A_D60

DDR_A_D46

DDR_A_DM2

DDR_A_D48

DDR_A_D42

DDR_A_MA8

DDR_A_D25

DDR_A_D12

DDR_A_D6

DDR_A_MA13

DDR_A_D57

DDR_A_DQS4

DDR_A_D32

DDR_A_MA9

DDR_A_D17

DDR_A_D44

DDR_A_MA0

DDR_A_DQS#6

M_ODT1

DDR_A_D19

DDR_A_D7

DDR_A_DQS#0

V_DDR_MCH_REF

DDR_A_MA4

DDR_A_D31

DDR_A_DM7

DDR_A_D49

DDR_A_BS2

DDR_A_D61

DDR_A_D45

DDR_A_D39

DDR_A_RAS#DDR_A_BS0

DDR_A_MA3

DDR_CKE0_DIMMA

DDR_A_D24

DDR_A_DM1

DDR_A_D11

DDR_A_D9

DDR_A_DQS1DDR_A_DQS#1

DDR_A_D8

DDR_A_D10

+1.8V_SUS

+0.9V_DDR_VTT

+3.3V_RUN

+0.9V_DDR_VTT

+1.8V_SUS

+1.8V_SUS

DDR_A_D[0..63]<11>

DDR_A_DQS[0..7]<11>

DDR_A_MA[0..13]<11>

DDR_A_DM[0..7]<11>

M_CLK_DDR0 <10>M_CLK_DDR#0 <10>

CLK_SDATA<6,18>

DDR_CKE1_DIMMA <10>

DDR_CS0_DIMMA# <10>

CLK_SCLK<6,18>

DDR_CKE0_DIMMA<10>

DDR_CS1_DIMMA#<10>

DDR_A_DQS#[0..7]<11>

M_ODT0 <10>

M_ODT1<10>

DDR_A_WE#<11>

DDR_A_CAS#<11>

DDR_A_BS0<11>

DDR_A_BS2<11>

V_DDR_MCH_REF <10,18,41>

DDR_A_RAS# <11>DDR_A_BS1 <11>

M_CLK_DDR#1 <10>M_CLK_DDR1 <10>

PM_EXTTS#0 <10>

PM_EXTTS#0_R <18>

Title



DDRII-SODIMM SLOT-A



Layout Note:Place these resistorclosely JDIMA1,alltrace lengthMax=1.3"

Layout Note:Place near JDIMA1

Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

Layout Note:Place these resistorclosely JDIMA1,alltrace length<750 mil



DIMMAREVERSE

Place DIMM-A on Top(MH=6.5mm)

C217

2.2U_0603_6.3V6K~D

1

2

RP5

56_1206_8P4R_5%~D

1 82 73 64 5

C209

0.1U_0402_16V4Z~D

1

2

C221

0.1U_0402_16V4Z~D

1

2

JDIMA1

FOX_AS0A426-MARL-7F~D

VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39

VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18

DQ12 20DQ13 22

VSS 24DM1 26VSS 28CK0 30

CK0# 32VSS 34

DQ14 36DQ15 38

VSS 40

VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199

VSS 42DQ20 44DQ21 46

VSS 48NC 50

DM2 52VSS 54

DQ22 56DQ23 58

VSS 60DQ28 62DQ29 64

VSS 66DQS3# 68

DQS3 70VSS 72

DQ30 74DQ31 76

VSS 78NC/CKE1 80

VDD 82NC/A15 84NC/A14 86

VDD 88A11 90

A7 92A6 94

VDD 96A4 98A2 100A0 102

VDD 104BA1 106

RAS# 108S0# 110

VDD 112ODT0 114

NC/A13 116VDD 118

NC 120VSS 122

DQ36 124DQ37 126

VSS 128DM4 130VSS 132

DQ38 134DQ39 136

VSS 138DQ44 140DQ45 142

VSS 144DQS5# 146

DQS5 148VSS 150

DQ46 152DQ47 154

VSS 156DQ52 158DQ53 160

VSS 162CK1 164

CK1# 166VSS 168DM6 170VSS 172

DQ54 174DQ55 176

VSS 178DQ60 180DQ61 182

VSS 184DQS7# 186

DQS7 188VSS 190

DQ62 192DQ63 194

VSS 196SAO 198SA1 200

RP10

56_1206_8P4R_5%~D

1 82 73 64 5

C216

0.1U_0402_16V4Z~D

1

2

C214

2.2U_0603_6.3V6K~D

1

2

C205

0.1U_0402_16V4Z~D

1

2

RP9

56_1206_8P4R_5%~D

1 82 73 64 5

C229

0.1U_0402_16V4Z~D

1

2

C206

0.1U_0402_16V4Z~D

1

2

C228

0.1U_0402_16V4Z~D

1

2

R229

10K_0402_5%~D

12

C220

0.1U_0402_16V4Z~D

1

2

RP6

56_1206_8P4R_5%~D

1 82 73 64 5

C215

2.2U_0603_6.3V6K~D

1

2

C231

0.1U_0402_16V4Z~D

1

2

C226

0.1U_0402_16V4Z~D

1

2

C210

0.1U_0402_16V4Z~D

1

2

C211

0.1U_0402_16V4Z~D

1

2

C224

2.2U_0603_6.3V6K~D

1

2

R231

0_0402_5%~D

1 2

R228 56_0402_5%~D 1 2

RP7

56_1206_8P4R_5%~D

1 82 73 64 5

R230

10K_0402_5%~D

12

C213

0.1U_0402_16V4Z~D

1

2

C222

0.1U_0402_16V4Z~D

1

2

C218

0.1U_0402_16V4Z~D

1

2

C227

0.1U_0402_16V4Z~D

1

2

R227 56_0402_5%~D 1 2

C219

2.2U_0603_6.3V6K~D

1

2

C208

0.1U_0402_16V4Z~D

1

2

C207

0.1U_0402_16V4Z~D

1

2

C223

2.2U_0603_6.3V6K~D

1

2

C212

2.2U_0603_6.3V6K~D

1

2

C230

0.1U_0402_16V4Z~D

1

2

RP8

56_1206_8P4R_5%~D

1 82 73 64 5

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_BS2

DDR_CKE2_DIMMB

DDR_B_BS0DDR_B_MA10

DDR_B_D63

DDR_B_D54

DDR_B_MA7

DDR_B_D49

DDR_B_WE#

DDR_B_MA1

DDR_B_DM6

DDR_B_D39

DDR_B_D36

DDR_CS2_DIMMB#

DDR_B_MA6

DDR_CKE3_DIMMB

DDR_B_D29

DDR_B_D59

DDR_B_DM7

DDR_B_D26

DDR_B_DM3

DDR_B_D15

DDR_B_DM1

DDR_B_DQS1

M_CLK_DDR2

DDR_B_DQS5DDR_B_DQS#5

DDR_B_D37

DDR_B_D20

DDR_B_MA10

DDR_B_MA8

DDR_B_D25

DDR_B_D16

DDR_B_D14

DDR_B_D45

DDR_B_D21

CLK_SCLK

DDR_B_D32

DDR_B_D6

DDR_B_DQS#7

DDR_B_D53

DDR_B_D50

DDR_B_MA5

DDR_B_D19

DDR_B_DM0

DDR_B_D55

DDR_B_MA4

DDR_B_D41

DDR_B_DQS#1

DDR_B_D9

DDR_B_MA13

DDR_B_DQS#3

DDR_B_D23

DDR_B_DQS6

DDR_B_D13

DDR_B_D10

DDR_B_D52

DDR_B_D34

DDR_B_MA12

DDR_B_D24

DDR_B_DQS#2

DDR_B_D42

DDR_B_DQS#0

V_DDR_MCH_REF

DDR_B_D62

M_CLK_DDR#2

DDR_B_MA0

DDR_B_D48

DDR_B_CAS#

DDR_B_DQS7

DDR_B_D38

DDR_B_D31

DDR_B_DQS3

DDR_B_DQS#6

DDR_B_DM5

DDR_B_DQS4

DDR_B_D33

DDR_B_DQS2

DDR_B_D47

DDR_B_RAS#

DDR_B_MA11

DDR_B_D40

M_ODT3

DDR_B_MA9

DDR_B_D11

DDR_B_D43

DDR_B_D61DDR_B_D60

DDR_B_MA2

CLK_SDATA

DDR_B_D51

DDR_CS3_DIMMB#

M_CLK_DDR#3

DDR_B_D8

DDR_B_D46

DDR_B_DM4

DDR_B_D30

DDR_B_D28

DDR_B_DM2

DDR_B_D58

DDR_B_D57

DDR_B_D35

DDR_B_DQS#4

DDR_CKE2_DIMMB

DDR_B_D7DDR_B_DQS0

DDR_B_D44

M_ODT2

DDR_B_BS1DDR_B_BS0

DDR_B_MA3

DDR_B_BS2

DDR_B_D27

DDR_B_D18

DDR_B_D17

M_CLK_DDR3

DDR_B_D12

DDR_B_D22

DDR_B_D56

DDR_B_MA0DDR_B_BS1

DDR_CKE3_DIMMB

DDR_B_MA1DDR_B_MA3

DDR_B_MA5DDR_B_MA8DDR_B_MA9DDR_B_MA12

M_ODT3DDR_CS3_DIMMB#DDR_B_CAS#DDR_B_WE#

DDR_B_MA4

DDR_B_MA6

DDR_B_MA2

DDR_B_MA7DDR_B_MA11

M_ODT2DDR_B_MA13

DDR_CS2_DIMMB#DDR_B_RAS#

DDR_B_D1

DDR_B_D0

DDR_B_D3DDR_B_D2DDR_B_D5

DDR_B_D4

+0.9V_DDR_VTT

+0.9V_DDR_VTT

+1.8V_SUS

+3.3V_RUN

+3.3V_RUN

+1.8V_SUS +1.8V_SUS

M_CLK_DDR2 <10>M_CLK_DDR#2 <10>

DDR_B_D[0..63]<11>

DDR_B_DQS[0..7]<11>

DDR_B_MA[0..13]<11>

DDR_B_DM[0..7]<11>

DDR_B_DQS#[0..7]<11>

DDR_CKE3_DIMMB <10>

M_CLK_DDR#3 <10>

DDR_B_RAS# <11>

DDR_CS3_DIMMB#<10>

DDR_CKE2_DIMMB<10>

DDR_B_BS0<11>

CLK_SDATA<6,17>

DDR_B_BS2<11>

M_ODT2 <10>

DDR_CS2_DIMMB# <10>


DDR_B_BS1 <11>

DDR_B_CAS#<11>

M_ODT3<10>

CLK_SCLK<6,17>

DDR_B_WE#<11>

M_CLK_DDR3 <10>

PM_EXTTS#0_R <17>

Title



DDRII-SODIMM SLOT-B



Layout Note:Place these resistorclosely JDIMB1,alltrace length<750 mil

Layout Note:Place these resistorclosely JDIMB1,alltrace lengthMax=1.3"

Layout Note:Place near JDIMB1

Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT



STANDARDDIMMB

Place DIMM-B on Bottom(5.2mm)

RP22

56_1206_8P4R_5%~D

1 82 73 64 5

C626

2.2U_0603_6.3V6K~D

1

2

C638

0.1U_0402_16V4Z~D

1

2

JDIMB1

FOX_AS0A426-M2SN-7F~D

VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39

VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18

DQ12 20DQ13 22

VSS 24DM1 26VSS 28CK0 30

CK0# 32VSS 34

DQ14 36DQ15 38

VSS 40

VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199

VSS 42DQ20 44DQ21 46

VSS 48NC 50

DM2 52VSS 54

DQ22 56DQ23 58

VSS 60DQ28 62DQ29 64

VSS 66DQS3# 68

DQS3 70VSS 72

DQ30 74DQ31 76

VSS 78NC/CKE1 80

VDD 82NC/A15 84NC/A14 86

VDD 88A11 90

A7 92A6 94

VDD 96A4 98A2 100A0 102

VDD 104BA1 106

RAS# 108S0# 110

VDD 112ODT0 114

NC/A13 116VDD 118

NC 120VSS 122

DQ36 124DQ37 126

VSS 128DM4 130VSS 132

DQ38 134DQ39 136

VSS 138DQ44 140DQ45 142

VSS 144DQS5# 146

DQS5 148VSS 150

DQ46 152DQ47 154

VSS 156DQ52 158DQ53 160

VSS 162CK1 164

CK1# 166VSS 168DM6 170VSS 172

DQ54 174DQ55 176

VSS 178DQ60 180DQ61 182

VSS 184DQS7# 186

DQS7 188VSS 190

DQ62 192DQ63 194

VSS 196SAO 198SA1 200

C603

2.2U_0603_6.3V6K~D

1

2

C584

0.1U_0402_16V4Z~D

1

2

C642

0.1U_0402_16V4Z~D

1

2

C621

0.1U_0402_16V4Z~D

1

2

C628

2.2U_0603_6.3V6K~D

1

2

RP18

56_1206_8P4R_5%~D

1 82 73 64 5

C639

0.1U_0402_16V4Z~D

1

2

C643

0.1U_0402_16V4Z~D

1

2

R541 56_0402_5%~D

1 2

C600

2.2U_0603_6.3V6K~D

1

2

RP21

56_1206_8P4R_5%~D

1 82 73 64 5

C585

0.1U_0402_16V4Z~D

1

2

R542 56_0402_5%~D

1 2

C604

0.1U_0402_16V4Z~D

1

2

C602

2.2U_0603_6.3V6K~D

1

2

C629

2.2U_0603_6.3V6K~D

1

2

C582

0.1U_0402_16V4Z~D

1

2

RP20

56_1206_8P4R_5%~D

1 82 73 64 5

C624

2.2U_0603_6.3V6K~D

1

2

C637

0.1U_0402_16V4Z~D

1

2

C587

0.1U_0402_16V4Z~D

1

2

R50610K_0402_5%~D

12

RP19

56_1206_8P4R_5%~D

1 82 73 64 5

R510

10K_0402_5%~D

1 2

C630

0.1U_0402_16V4Z~D

1

2

C601

0.1U_0402_16V4Z~D

1

2

RP17

56_1206_8P4R_5%~D

1 82 73 64 5

C641

0.1U_0402_16V4Z~D

1

2

C640

0.1U_0402_16V4Z~D

1

2

C622

0.1U_0402_16V4Z~D

1

2

C586

0.1U_0402_16V4Z~D

1

2

C583

0.1U_0402_16V4Z~D

1

2

C625

0.1U_0402_16V4Z~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ENVDD_EN

FPBACK_EN

ENVDD_ENLCD_A1+LCD_A0-

LDDC_CLK_R

LCD_A1-

LCD_ACLK+

LCD_A1-

LCD_A0+

+LCDVDD

LCD_ACLK-

LCD_ACLK-

LCD_A0-

LDDC_DATA_RLCD_ACLK+

SBAT_SMBDAT

LCD_A2+

LCD_A2-

LDDC_CLK_R

LCD_A2-

LCD_A2+

LCD_A1+

LDDC_DATA_R

LCD_A0+

LCD_TST

+CMOS_VDD

SBAT_SMBCLK

BIA_PWM_EC

BIA_PWM_R

BIA_PWM_RBACKLITEON

PWR_SRC_ON

PWR_SRC_ON

PANEL_BKEN_R

PANEL_BKEN_R

+3.3V_RUN

+LCDVDD

+GFX_PWR_SRC

+5V_ALW

+15V_SUS

+15V_SUS +3.3V_RUN

+LCDVDD

+LCDVDD

+PWR_SRC

+GFX_PWR_SRC

+5V_RUN

+3.3V_RUN

+GFX_PWR_SRC

+PWR_SRC

+3.3V_RUN

SBAT_SMBDAT <30>SBAT_SMBCLK <30>

FPBACK_EN<31>LCD_TST <23>

RUN_ON<30,32,33,39,40,41,50>

INT_SPK_L1 <36>INT_SPK_L2 <36>

INT_SPK_R2 <36>INT_SPK_R1 <36>

ENVDD_VGA<44>

ENVDD<12>

LCD_ACLK-_NB<12>LCD_ACLK+_NB<12>

LCD_A2-_NB<12>LCD_A2+_NB<12>

LCD_A1-_NB<12>

LCD_A0-_NB<12>LCD_A1+_NB<12>

LCD_A0+_NB<12>

LCD_A0-_VGA<45>

LCD_A1-_VGA<45>

LCD_A0+_VGA<45>

LCD_A1+_VGA<45>

LDDC_DATA<12>BIA_PWM<12>

LDDC_CLK<12>

PANEL_BKEN<12>

BIA_PWM_VGA<44>

LCD_ACLK-_VGA<45>

LCD_A2+_VGA<45>LCD_A2-_VGA<45>

LCD_ACLK+_VGA<45>

PANEL_BKEN_VGA<44>

LDDC_CLK_VGA<44>LDDC_DATA_VGA<44>

USBP4- <23>USBP4+ <23>

BIA_PWM_EC <30>

Title



LVDS Conn




LCD Power

FDS4435: P CHANNAL

40mil40mil

20 mil

Please put the resistors close to connector side

For Discrete: Populting RP3,RP4,RP15,R248For UMA: Populting RP14,RP13,RP16,R254

BIA_PWM for M'07 Inverter

Populate R610 For Platform WithoutDPST Support. No STUFF forDiscrete DPST Support Due to BackUp Plan.

Stuff R63 for M'07 InverterChange from 12/08 Dell GG list asleast COE schematic

Change population for discreteboard as dell request, bitsissue p/n:DF51426

Dual layout for Q16

SI3457DV : P CHANNAL

Overlap on D26 for pop option

Overlap on Q16 for pop option

R289100K_0402_5%~D

12

R248 0_0402_5%~D2@12

G

D

SQ17

2N7002_SO

T23~D

2

13

RP15

0_1206_8P4R_5%~D

2@

1 82 73 64 5

C258

0.1U_0402_16V4Z~D

1

2

R254 0_0402_5%~D1@ 1 2

C34

0.1U_0402_16V4Z~D

1

2

RP16

0_1206_8P4R_5%~D

1@

1 82 73 64 5

C265

0.1U_0402_16V4Z~D

1

2

R244

100K_0402_5%~D

1 2

C29

0.1U_0402_16V4Z~D

1

2 R63 0_0402_5%~D1 2

G

D S

Q112N7002W-7-F_SOT323~D

2

1 3

R652

0_0402_5%~D

@

12

C25

410

00P_

0402

_50V

7K~D

1

2

D2621

R287

100K_0402_5%~D

12

C275

0.1U_0402_16V4Z~D

1

2

RP4

0_1206_8P4R_5%~D

2@

1 82 73 64 5

SG

D

Q64SI3457DV-T1_TSOP6~D

3

6

24 5

1

G

D

S Q122N7002_SOT23~D

2

13

R646

0_0603_5%~D

@ 12

R286

470_0402_5%~D

12

R59100K_0402_5%~D

12

S

GD

Q21SI3456DV-T1-E3_TSOP6~D3

6

24 5

1

RP3

0_1206_8P4R_5%~D

2@

1 82 73 64 5

R243100K_0402_5%~D

12

R288

100K_0402_5%~D

12

Q16FDS4435_NL_SO8~D

@4

78

65

123

RP14

0_1206_8P4R_5%~D

1@

1 82 73 64 5

R40

0_0402_5%~D

@1 2

C2660.1U_0603_50V4Z~D

1

2

R639

0_0402_5%~D

1@12

R61010K_0402_5%~D

2@

12

JLVDS1

IPEX_20330-044E-01F~D

TXUCLKUT- 44

GND1 42

TXUOUT2+ 40

TXUOUT1- 38

GND3 36

TXUOUT0+ 34

TXLCLKOUT- 32

GND5 30

TXLOUT2+ 28

TXLOUT1- 26

GND7 24

TXLOUT0+ 22

PANEL_I2C_DAT 19GND9 18

GND10 16

LCDVDD2 14

LCDPWR_SRC 12

LCDPWR_SRC 10

+5V_ALWF 3

PBAT_SMBCLK 6

GND13 4

FPBACK 8

TXUCLKUT+ 43

TXUOUT2- 41

GND2 39

TXUOUT1+ 37

TXUOUT0- 35

GND4 33

TXLCLKOUT+ 31

TXLOUT2- 29

GND6 27

TXLOUT1+ 25

TXLOUT0- 23

GND8 21PANEL_I2C_CLK 20

VEDID 17

LCDVDD1 15

PNL_SLFTST 13

LCDPWR_SRC 11

GND11 9

LAMP_START 2

PBAT_SMBDAT 5

GND12 7

GND14 1

MGND145MGND246MGND347MGND448MGND549MGND650MGND751MGND852MGND953MGND1054MGND1155

C28

0.1U_0402_16V4Z~D

1

2

RP13

0_1206_8P4R_5%~D

1@

1 82 73 64 5

C38

0.1U_0603_50V4Z~D

1

2

C256

10U_1206_16V4Z~D

1

2

Q15DTC124EKA_SC59~D

I2

O1

G3

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SP_DIF_C

SVIDEO_Y

SPDIF

SP_DIF

CLK_DDC2_R

SVIDEO_CVBSSVIDEO_C

SP_DIFB

VSYNC_R

HSYNC HSYNC_L

VSYNC_L

G

JVGA_VS

DAT_DDC2_R

B

M_ID2#

+5V_SYNC

TV_C

TV_CVBS

TV_Y

BLUE

GREEN

RED

HSYNC

TV_YTV_CVBS

BLUEGREENRED

DAT_DDC2_R

CLK_DDC2_R

SP_DIF_D

VSYNC

VSYNC

JVGA_HS

TV_C

NC_M_SEN#

HSYNC_R HSYNC_L2

VSYNC_L2

R

+3.3V_RUN

+5V_RUN

+CRT_VCC

+5V_RUN

+CRT_VCC

+3.3V_RUN

+3.3V_RUN

+3.3V_SUS

+5V_RUN

SPDIF<36>

YPRPB_DET# <44>

TV_C_NB<12>TV_CVBS_NB<12>

TV_Y_NB<12>

VGA_HSYNC<12>

HSYNC_VGA<44>

GRN_VGA<44>

DAT_DDC2_VGA<44>

DAT_DDC2<12>

CLK_DDC2_VGA<44>

CLK_DDC2<12>

VSYNC_VGA<44>

VGA_VSYNC<12>

TV_C_VGA<44>TV_CVBS_VGA<44>

TV_Y_VGA<44>

VGA_GRN<12>VGA_BLU<12>

VGA_RED<12>

BLU_VGA<44>

RED_VGA<44>

Title



Interval LVDS, TV_OUT and CRT connector



CLOSE TO JSVID1



Please put the resistor close to connector side

NOTE: 1@ is for UMA Implemetation. 2@ is for Discrete Implementation.

POPULATE R90 WHEN COMPONENT VIDEO IS ENABLED.

Pop 150 ohm resistor for UMA

Place All Of These CAPS, INDUCTORSand DIODE CLamp for < 200mils.

Change as 11/22 Dell GG list

Pop 75 ohm resistor for Discrete M/B

R367, R379, R384,R234, R236, R239

Place C709 nearJSVID1 pin 5

L29,L32,L34 change to Murata 560NH +-10% LQM18NNR56K00(SHI0156BK8L), wait CIS symbol.

D6DA204U_SOT323~D@

2 31

D5DA204U_SOT323~D@

2 31

R91

10K_0402_5%~D

12

C331

82P_0402_50V8J~D

C240

10P_0402_50V8J~D

@1

2

R596

110_0603_1%~D

12

R13 0_0402_5%~D1@ 1 2

R1

10K_0402_5%~D

12

C709

0.1U_0402_16V4Z~D

1

2

L340.47UH_CIL10NR47KNC_10%_0603~D

1 2

R23

915

0_04

02_1

%~D

12

R36

715

0_04

02_1

%~D

12

L18BLM18BB600SN1D_0603~D

1 2

R880_0402_5%~D1@

12

R8

1K_0402_5%~D

@

12

R612 0_0402_5%~D1 2

R23

415

0_04

02_1

%~D

12

D2DA204U_SOT323~D@

2 31

L290.47UH_CIL10NR47KNC_10%_0603~D

1 2

C351

82P_0402_50V8J~D

R90

0_0402_5%~D

2@12

C246

0.01U_0402_16V7K~D

1

2

C7068.2P_0402_50V8J~D

R15

39_0402_5%~D

1 2

C241

22P_0402_50V8J~D

@

1

2

RP2

0_1206_8P4R_5%~D

2@

1 82 73 64 5

L320.47UH_CIL10NR47KNC_10%_0603~D

1 2

R61 0_0402_5%~D1@ 1 2

C7078.2P_0402_50V8J~D

D1121

RP12

0_1206_8P4R_5%~D

1@

1 82 73 64 5

L3BLM11A121S_0603~D

1 2

C349

82P_0402_50V8J~D


1 2

R12 0_0402_5%~D2@12

RP10_1206_8P4R_5%~D

1@

1 82 73 64 5 U2

SN74AHCT1G125GW_SC70-5~DA2 Y 4

P5

G3

OE#

1

C379

82P_0402_50V8J~D

L4BLM11A121S_0603~D

1 2

R62 0_0402_5%~D2@12

R633

0_1206_5%~D

12

C1

22P_0402_50V8J~D

1

2

R23

615

0_04

02_1

%~D

12

C381

82P_0402_50V8J~D

R37

915

0_04

02_1

%~D

12

C426

0.01U_0402_16V7K~D

12

D3DA204U_SOT323~D@

2 31

C243

22P_0402_50V8J~D

@

1

2

C2

22P_0402_50V8J~D

1

2

C244

10P_0402_50V8J~D

@

1

2

R101K_0402_5%~D

1 2

C325

82P_0402_50V8J~D

C242

10P_0402_50V8J~D

@

1

2

D1DA204U_SOT323~D@

2 31

D2521

JCRT1

FOX_DZ11A91-ND209-9F~D

611

17

1228

1339

144

1015

5

1617

C245

22P_0402_50V8J~D

@

1

2


1 2

JSVID1

FOX_MH11777-BUR6-7F~D

246

35

1

98

7

D7DA204U_SOT323~D@

2 31

C3

0.1U_0402_16V4Z~D

1

2

U1

SN74AHCT1G125GW_SC70-5~DA2 Y 4

P5

G3

OE#

1

R38

415

0_04

02_1

%~D

12

R3 0_0402_5%~D2@12

RP11

0_1206_8P4R_5%~D

2@

1 82 73 64 5

R9

1K_0402_5%~D

@

12

R14

2.2K_0402_5%

~D

12

R611 0_0402_5%~D

1 2

R2 0_0402_5%~D1@ 1 2

C416

0.1U_0402_16V4Z~D

1

2

U19SN74AHCT1G125GW_SC70-5~D

A2 Y 4

P5

G3

OE#

1

R11

39_0402_5%~D

1 2

R400

220_0603_1%~D

12

R4

2.2K_0402_5%

~D

12

C7058.2P_0402_50V8J~D

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_PCIRST#

PCI_PLTRST#

CLK_PCI_ICH

PLTRST3#_L

CO

INC

ELL

_R

PCI_GNT4#PCI_GNT5#

PCI_REQ2#

PCI_REQ3#

PCI_PIRQD#

PCI_REQ5#

PCI_REQ4#

PCI_DEVSEL#

PCI_TRDY#

PCI_FRAME#

PCI_STOP#

PCI_PLOCK#

PCI_IRDY#

PCI_PERR#

PCI_SERR#

PCI_PIRQA#

PCI_PIRQC#

PCI_PIRQB#

ICH_GPIO5_PIRQH#

ICH_GPIO2_PIRQE#

ICH_GPIO3_PIRQF#

ICH_GPIO4_PIRQG#

PCI_REQ0#

PCI_REQ1#

PCI_REQ5#

PCI_AD0PCI_AD1

PCI_AD5

PCI_AD7

PCI_AD3

PCI_AD6

PCI_AD2

PCI_AD12PCI_AD13

PCI_AD4

PCI_AD9PCI_AD8

PCI_AD20

PCI_AD11PCI_AD10

PCI_AD14PCI_AD15

PCI_AD21

PCI_AD17PCI_AD18

PCI_AD23PCI_AD22

PCI_AD19

PCI_AD27

PCI_AD30

PCI_AD16

PCI_AD31

PCI_AD26PCI_AD25PCI_AD24

PCI_AD28PCI_AD29

PCI_SERR#

ICH_GPIO5_PIRQH#

PCI_PIRQA# ICH_GPIO2_PIRQE#ICH_GPIO3_PIRQF#ICH_GPIO4_PIRQG#

PCI_PIRQD#PCI_PIRQC#PCI_PIRQB#

ICH_PME#

PCI_PLTRST#

PCI_REQ3#

PCI_GNT4#PCI_REQ4#

PCI_REQ1#

PCI_GNT5#

MCH_ICH_SYNC#

PCI_REQ2#

PCI_C_BE2#PCI_C_BE3#

PCI_C_BE1#PCI_C_BE0#

CLK_PCI_ICH

PCI_TRDY#PCI_FRAME#

PCI_DEVSEL#

PCI_PARPCI_IRDY#

PCI_STOP#

PCI_PERR#PCI_PLOCK#

PCI_PCIRST#

PCI_REQ0#

+COINCELL

PCI_GNT3#

PCI_GNT2#

CLK

_IC

H_T

ER

M

PCI_RST#_L

PLTRST1#_L

PLTRST2#_L

+COINCELL

+3.3V_RTC_LDO

+RTC_CELL

+3.3V_RUN

+COINCELL

+3.3V_SUS

+3.3V_RUN

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

PCI_C_BE1# <26,28>

PCI_PAR <26,28>

PCI_SERR# <26,28>

PCI_IRDY# <26,28>

PCI_PERR# <26,28>

PCI_C_BE3# <26,28>

PCI_PIRQC#<28>

PCI_FRAME# <26,28>

PCI_C_BE2# <26,28>

PCI_DEVSEL# <26,28>

PCI_TRDY# <26,28>

PCI_PIRQD#<28>

PCI_C_BE0# <26,28>

PCI_STOP# <26,28>

PCI_AD[0..31]<26,28>

ICH_PME# <31>CLK_PCI_ICH <6>

MCH_ICH_SYNC# <10>

PCI_GNT2# <28>PCI_REQ2# <28>

PCI_PIRQB#<26>

PCI_GNT3# <26>PCI_REQ3# <26>

PCIRST_LOM# <26>

PLTRST_MCH# <10>

PLTRST_EC# <30>

PLTRST3# <29>

PCIRST_PCCARD# <28>

PLTRST_ICH# <23>

PLTRST_EXP# <36>

Title



ICH7(1/4)




PCI

GNT5#Ra

GNT4#Rb

11

10

01

unstuff unstuff

unstuff

unstuff stuff

stuff

ICH Boot BIOS select

*

LPC

SPI

Place closely pin U10.A9

Ra Rb

R176 8.2K_0402_5%~D

1 2

R188 8.2K_0402_5%~D

1 2

R181 8.2K_0402_5%~D

1 2

R192 8.2K_0402_5%~D

1 2

C632

8.2P_0402_50V8J~D

1

2

R526

33_0402_5%~D

12

U24B74VHC08MTCX_NL_TSSOP14~D

IN14

IN25 OUT 6

P14

G7

R544

10_0402_5%~D

12

R951K_0402_5%~D

12

R180 8.2K_0402_5%~D1 2

C138

0.1U_0402_16V4Z~D

@ 1 2

JCOIN1

MOLEX_53398-0290~D

1122

R182 8.2K_0402_5%~D

1 2

R198 8.2K_0402_5%~D

1 2

R178 8.2K_0402_5%~D1 2

R195 8.2K_0402_5%~D

1 2

R175 8.2K_0402_5%~D1 2

D8BAT54C-7-F_SOT23~D

23

1

R194 8.2K_0402_5%~D

1 2

R193 8.2K_0402_5%~D

1 2

U24D74VHC08MTCX_NL_TSSOP14~D

IN113

IN212 OUT 11

P14

G7

R190 8.2K_0402_5%~D

1 2

U24C74VHC08MTCX_NL_TSSOP14~D

IN110

IN29 OUT 8

P14

G7

R177 8.2K_0402_5%~D

1 2

R191 8.2K_0402_5%~D

1 2

R504

33_0402_5%~D

12R196 8.2K_0402_5%~D

1 2

R189 8.2K_0402_5%~D

1 2

R200 8.2K_0402_5%~D

1 2

R552

1K_0402_5%~D

12

R183 8.2K_0402_5%~D

1 2

Interrupt I/F

PCI

MISC

U25B

ICH7M A0_BGA652~D

FRAME# F16

GPIO17 / GNT5# D8

TRDY# F14STOP# F15

GPIO2 / PIRQE# G8GPIO3 / PIRQF# F7GPIO4 / PIRQG# F8GPIO5 / PIRQH# G7

C/BE0# B15C/BE1# C12C/BE2# D12C/BE3# C15

IRDY# A7PAR E10

PCIRST# B18DEVSEL# A12

PERR# C9PLOCK# E11

SERR# B10

PIRQC#C5

RSVD[4]AH4

PIRQA#A3

RSVD[5]AD9

RSVD[2]AD5RSVD[3]AG4

PIRQB#B4

PIRQD#B5

RSVD[1]AE5

REQ0# D7GNT0# E7REQ1# C16GNT1# D16REQ2# C17GNT2# D17REQ3# E13GNT3# F13

REQ4# / GPIO22 A13GNT4# / GPIO48 A14GPIO1 / REQ5# C8

AD0E18AD1C18AD2A16AD3F18AD4E16AD5A18AD6E17AD7A17AD8A15AD9C14AD10E14AD11D14AD12B12AD13C13AD14G15AD15G13AD16E12AD17C11AD18D11AD19A11AD20A10AD21F11AD22F10AD23E9AD24D9AD25B9AD26A8AD27A6AD28C7AD29B6AD30E6AD31D6

RSVD[6] AE9RSVD[7] AG8RSVD[8] AH8RSVD[9] F21

MCH_SYNC# AH20

PLTRST# C26PCICLK A9

PME# B19

R535

1K_0402_5%~D@

12

C1481U_0603_10V4Z~D

R494

33_0402_5%~D

12

R197 8.2K_0402_5%~D

1 2

U24A74VHC08MTCX_NL_TSSOP14~D

IN11

IN22 OUT 3

P14

G7

R179 8.2K_0402_5%~D

1 2

R199 8.2K_0402_5%~D

1 2

C6050.1U_0402_16V4Z~D

R514

33_0402_5%~D

12

R525

33_0402_5%~D

12

R521

33_0402_5%~D

12

R495

33_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH_INTVRMEN

H_IGNNE#

H_A20M#

H_INIT#

H_NMI

H_STPCLK#

IDE_DDREQ

H_INTR

CLK_PCIE_SATA#

ICH_RTCX2

IDE_DD2

H_DPRSTP#

IDE_DD9

IDE_DD15

IDE_DIOR#IDE_DIOW#

CLK_PCIE_SATA

ICH_AZ_MDC_SDIN1

IDE_DD0

H_DPRSTP_R#

LPC_LDRQ1#

IDE_DD14

LPC_LFRAME#

IDE_DD6

ICH_AZ_RST_R#

ICH_AZ_SDOUT_R

IDE_DD10

IDE_DD4

IDE_DD7

IDE_DD13

IDE_DD1

IDE_DD8

LPC_LAD3

IDE_DDACK#

ICH_RTCRST#

ICH_RTCX1

IDE_IRQ

ICH_AZ_CODEC_SDIN0

IDE_DD11

LPC_LAD0

IDE_DD3

SIO_RCIN#

IDE_DD12

IDE_DD5

IDE_DIORDY

SATA_RX0-

INTRUDER#LPC_LDRQ0#

IDE_DCS1#

ICH_AZ_SYNC_R

H_CPUSLP#

SIO_A20GATE

H_PWRGOOD

LPC_LAD1

H_FERR#

H_SMI#

IDE_DCS3#

LPC_LAD2

SATA_RX0+

SATA_ACT#

IDE_DD[0..15]

IDE_IRQ

SATA_ITX_DRX_N0SATA_ITX_DRX_P0

SIO_RCIN#

IDE_DA0

IDE_DA2IDE_DA1

H_FERR#

INTRUDER#

ICH_AZ_SYNC_R

ICH_AZ_SDOUT_R

ICH_AZ_RST_R#

SATA_ACT#

SIO_A20GATEICH_AZ_BITCLK_R

ICH_AZ_BITCLK_R

H_CPUSLP_R#

H_DPSLP#

SATA_ITX_DRX_N0

SATA_ITX_DRX_P0

SATA_ITX_DRX_N2

SATA_ITX_DRX_P2

SATA_ITX_DRX_N2SATA_ITX_DRX_P2

SATA_RX2-SATA_RX2+

THRMTRIP_ICH#SATA_ACT#_RSATA_ACT#

+3.3V_RUN

+RTC_CELL

+RTC_CELL

+3.3V_RUN

+3.3V_RUN

+1.05V_VCCP

+1.05V_VCCP

IDE_DD[0..15] <36>

IDE_DDACK#<36>IDE_DIOW#<36>IDE_DIOR#<36>

ICH_AZ_MDC_SDIN1<36>

IDE_DDREQ <36>

CLK_PCIE_SATA<6>

H_INIT# <7>H_INTR <7>

H_DPSLP# <7>

H_SMI# <7>

H_IGNNE# <7>

H_NMI <7>

H_A20M# <7>

H_STPCLK# <7>

H_CPUSLP# <7,10>

IDE_IRQ<36>

H_FERR# <7>

H_DPRSTP# <7,42>

IDE_DIORDY<36>

SIO_RCIN# <30>

IDE_DCS1# <36>

ICH_AZ_CODEC_SDIN0<36>

IDE_DCS3# <36>

CLK_PCIE_SATA#<6>

ICH_AZ_CODEC_RST#<36>

ICH_AZ_CODEC_SYNC<36>

ICH_AZ_CODEC_SDOUT<36>

ICH_AZ_MDC_RST#<36>

ICH_AZ_MDC_SYNC<36>

ICH_AZ_MDC_SDOUT<36>

SATA_RX0+<36>SATA_RX0-<36>

SIO_A20GATE <30>

H_PWRGOOD <7>

IDE_DA0 <36>IDE_DA1 <36>

LPC_LAD0 <30>

IDE_DA2 <36>

LPC_LAD2 <30>LPC_LAD1 <30>

LPC_LAD3 <30>

ICH_AZ_MDC_BITCLK<36>

ICH_AZ_CODEC_BITCLK<36>

LPC_LFRAME# <30>

SATA_TX0-<36>

SATA_TX0+<36>

SATA_TX2+<36>

SATA_TX2-<36>

SATA_RX2+<36>SATA_RX2-<36>

SATA_ACT#_R <35>

SNIFFER_LED_OFF#<30,35>

Title



ICH7(2/4)




Package9.6X4.06 mm

H_DPRSTP# daisy

Close to ICH7

Within 500 mils

ICH7-M --> Yonah --> IMVP6(ADP3207)

Place near ICH7 side.

NOTE: SNIFFER_LED_OFF# isPush-Pull from the MEC5004

C6090.1U_0402_16V4Z~D@

1

2

R547 33_0402_5%~D

1 2

C680 3900P_0402_50V7K~D12

C70112P_0402_50V8J~D

12

C69012P_0402_50V8J~D

12

C683 3900P_0402_50V7K~D12

R582

10M_0402_5%~D

12

R534

8.2K_0402_5%~D

12

C703

27P_0402_50V8J~D

1

2

C659 3900P_0402_50V7K~D@12

G

DS

Q58 BSS138W-7-F_SOT323~D

2

13

R59033_0402_5%~D

1 2

R550 33_0402_5%~D 1 2

R591

20K_0402_5%~D

1 2

RTC

LAN

SATA

AC-97/AZALIA

LPC

CPU

IDE

U25A

ICH7M A0_BGA652~D

RTXC1AB1RTCX2AB2

RTCRST#AA3

INTVRMENW4INTRUDER#Y5

EE_CSW1EE_SHCLKY1EE_DOUTY2EE_DINW3

LAN_CLKV3

LAN_RSTSYNCU3

LAN_RXD0U5LAN_RXD1V4LAN_RXD2T5

LAN_TXD0U7LAN_TXD1V6LAN_TXD2V7

ACZ_BCLKU1ACZ_SYNCR6

ACZ_RST#R5

ACZ_SDIN0T2ACZ_SDIN1T3ACZ_SDIN2T1

ACZ_SDOUTT4

SATALED#AF18

SATA0RXNAF3SATA0RXPAE3SATA0TXNAG2SATA0TXPAH2

SATA2RXNAF7SATA2RXPAE7SATA2TXNAG6SATA2TXPAH6

SATA_CLKNAF1SATA_CLKPAE1

SATARBIASNAH10SATARBIASPAG10

IORDYAG16IDEIRQAH16DDACK#AF16DIOW#AH15DIOR#AF15

LAD0 AA6LAD1 AB5LAD2 AC4LAD3 Y6

LDRQ0# AC3LDRQ1# / GPIO23 AA5

LFRAME# AB3

A20GATE AE22A20M# AH28

CPUSLP# AG27

TP1 / DPRSTP# AF24TP2 / DPSLP# AH25

FERR# AG26

GPIO49 / CPUPWRGD AG24

IGNNE# AG22INIT3_3V# AG21

INIT# AF22INTR AF25

RCIN# AG23

SMI# AF23NMI AH24

STPCLK# AH22

THERMTRIP# AF26

DA0 AH17DA1 AE17DA2 AF17

DCS1# AE16DCS3# AD16

DD0 AB15DD1 AE14DD2 AG13DD3 AF13DD4 AD14DD5 AC13DD6 AD12DD7 AC12DD8 AE12DD9 AF12

DD10 AB13DD11 AC14DD12 AF14DD13 AH13DD14 AH14DD15 AC15

DDREQ AE15

R503

56_0402_5%~D

12

R549 33_0402_5%~D 1 2

Y5

32.768K_12.5PF_Q13MC30610003~D

14

23

C661 3900P_0402_50V7K~D@12

R537 33_0402_5%~D 1 2

R522 0_0402_5%~D 12

R583 332K_0402_1%~D

1 2

C692

1U_0603_10V4Z~D

R536 24.9_0402_1%~D

1 2

R592

0_0402_5%~D 1 2

R515 56_0402_5%~D 1 2

CMOS_CLR1 SHORT PADS~D

11 2 2

R530

10K_0402_5%~D

12

R502 0_0402_5%~D@12

R594

33_0402_5%~D

1 2

R538 33_0402_5%~D 1 2

R548 33_0402_5%~D

1 2

C69827P_0402_50V8J~D

12

R595

1M_0402_5%~D 1

2

R625

0_0402_5%~D

@1 2

R492

10K_0402_5%~D

12

R491

10K_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BT_RADIO_DIS#

BT_RADIO_DIS#

ICH_EC_SPI_CLK

USBP0+USBP0-

GPIO24

DPRSLPVR

LCD_TST

SIO_EXT_WAKE_R#

CLKRUN#

USB_OC4#

SUSPWROK

LAMP_STAT#

DMI_MTX_IRX_N0

DMI_MTX_IRX_N1

ICH_EC_SPI_DO

DMI_MTX_IRX_P2

DMI_MTX_IRX_P3

DMI_MRX_ITX_P0

PLTRST_DELAY#SATA_CLKREQ#

SIO_EXT_SCI#

PCIE_ITX_EPRX_N4PCIE_RX4+

PCIE_ITX_EPRX_P4

LINKALERT#

ICH_BATLOW#

DPRSLPVR

SIO_PWRBTN#

USB_OC4#USB_OC3#

USB_OC5#USB_OC2#

SMBALERT#

ICH_BATLOW#

ICH_PCIE_WAKE#

SIO_THRM#

IRQ_SERIRQ

USBP3+

ICH_SMBDATA

SIO_THRM#

USBP5-

ICH_PCIE_WAKE#

USBP7-

CLK_PCIE_ICH#

USBP5+

CLK_ICH_48M

PM_BMBUSY#

CLK_ICH_14M

CLK_PCIE_ICH

PLTRST_ICH#

USBP2+

USBP4-

USBP6-

H_STP_CPU#

IMVP_PWRGD

SIO_SLP_S3#ITP_DBRESET#

CLK_ICH_48M

USBP3-

ICH_RI#

USBP6+

IRQ_SERIRQ

USBP2-

SIO_SLP_S5#

USBP4+

USBP7+

SMBALERT#

CLKRUN#

CLK_ICH_14M

SIO_EXT_SMI#

USBRBIAS

DMI_IRCOMP

USB_OC0_1#

USB_OC3#

USB_OC5#USB_OC6_7#

ICH_SMBCLK

SPKR

LINKALERT#

H_STP_PCI#

ICH_SMLINK0ICH_SMLINK1

ICH_PWRGD

DMI_MTX_IRX_N2

DMI_MTX_IRX_N3

DMI_MTX_IRX_P0

DMI_MTX_IRX_P1

DMI_MRX_ITX_P1

DMI_MRX_ITX_N0

DMI_MRX_ITX_N1

DMI_MRX_ITX_N2

DMI_MRX_ITX_N3

DMI_MRX_ITX_P2

DMI_MRX_ITX_P3

ICH_SUSCLK

ICH_EC_SPI_DIN

USBP1+USBP1-

WWAN_RADIO_DIS#

WWAN_RADIO_DIS#

PCIE_RX4-

USB_OC0_1#

USB_OC6_7#

PCIE_RX2-

PCIE_ITX_WLANRX_N2PCIE_ITX_WLANRX_P2

PCIE_RX2+

PCIE_RX1-

PCIE_ITX_WWANRX_N1PCIE_RX1+

PCIE_ITX_WWANRX_P1

USB_OC2#

SIO_EXT_SCI#

SIO_EXT_SMI#

IDE_RST_MOD

LAMP_STAT#

HDDC_EN#MODC_EN#

PLTRST_DELAY#

+3.3V_SUS

+3.3V_RUN

+1.5V_RUN

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS +3.3V_SUS

+3.3V_SUS

+3.3V_RUN

+3.3V_SUS

ICH_SMBDATA<6,29,36>ICH_SMBCLK<6,29,36>

CLKRUN#<26,28,30>

SPKR<36>

H_STP_PCI#<6>

SUSPWROK <16,33>

SIO_PWRBTN# <30>

ICH_PWRGD <10,33>

DPRSLPVR <10,42>

USBP1+ <25>USBP1- <25>

PLTRST_DELAY# <44>SATA_CLKREQ# <6>

DMI_MTX_IRX_N0 <10>

DMI_MTX_IRX_N1 <10>

DMI_MTX_IRX_N2 <10>

DMI_MTX_IRX_N3 <10>

DMI_MTX_IRX_P0 <10>DMI_MRX_ITX_N0 <10>DMI_MRX_ITX_P0 <10>




USB_OC6_7#<25>

SIO_EXT_SCI# <30>

ICH_EC_SPI_CLK<30>

ICH_EC_SPI_DIN<30>ICH_EC_SPI_DO<30>

SPI_CS#<30>

BT_RADIO_DIS#<25>

ITP_DBRESET#<7,30>

LCD_TST<19>

ICH_PCIE_WAKE#<31>

PCIE_RX4+<36>PCIE_TX4-<36>

PCIE_TX4+<36>

SIO_EXT_SMI#<30>

H_STP_CPU#<6>

IMVP_PWRGD<33,42>

USBP5- <29>

USBP3+ <36>

USBP5+ <29>

USBP3- <36>

IRQ_SERIRQ<28,30>

SIO_SLP_S3# <30>

SIO_SLP_S5# <30>

CLK_PCIE_ICH# <6>CLK_PCIE_ICH <6>

PM_BMBUSY#<10>

SIO_THRM#<30>

USBP6+ <25>USBP7- <25>USBP7+ <25>

USBP6- <25>

PLTRST_ICH# <21>

CLK_ICH_14M <6>CLK_ICH_48M <6>

WWAN_RADIO_DIS# <29>

PCIE_RX4-<36>

USBP0- <25>USBP0+ <25>

USB_OC0_1#<25>

PCIE_TX2-<29>

PCIE_RX2-<29>

PCIE_TX2+<29>

PCIE_RX2+<29>

PCIE_RX1-<29>PCIE_RX1+<29>PCIE_TX1-<29>

PCIE_TX1+<29>

IDE_RST_MOD<36>

SIO_EXT_WAKE#<30>

USBP2+ <25>

USBP4+ <19>USBP4- <19>

USBP2- <25>

HDDC_EN# <31,36>MODC_EN# <31,36>

Title



ICH7(3/4)




Place closely pin ICH7.B2

Place closely pin ICH7.AC1

close to SB (ICH7-M)

Within 500 mils

Express Card--->

Mini Card 2-(WLAN) -->

Within 500 mils

(PCI Express Wake Event)

----->Right Port

----->WWAN

----->Express Card

Mini Card 1-(WWAN) -->

----->Right Port

No Stuff for M'07

----->Left Port----->Left Port

----->CCD Camera

----->Blue Tooth

Bits issue DF49798

R56

2

10K_

0402

_5%

~D

12

R476 10K_0402_5%~D

1 2

R48810_0402_5%~D

@

R486 10K_0402_5%~D

1 2

R528

2.2K_0402_5%~D

12

R523

100K_0402_5%~D

12

PCI-EXPRESS

DIRECT MEDIA INTERFACE

USB

SPI

U25D

ICH7M A0_BGA652~D

SPI_CLKR2SPI_CS#P6SPI_ARBP1

SPI_MOSIP5SPI_MISOP2

DMI0RXN V26DMI0RXP V25DMI0TXN U28DMI0TXP U27

DMI1RXN Y26DMI1RXP Y25DMI1TXN W28DMI1TXP W27

DMI2RXN AB26DMI2RXP AB25DMI2TXN AA28DMI2TXP AA27

DMI3RXN AD25DMI3RXP AD24DMI3TXN AC28DMI3TXP AC27

DMI_CLKN AE28DMI_CLKP AE27

DMI_ZCOMP C25DMI_IRCOMP D25

PERn1F26PERp1F25PETn1E28PETp1E27

PERn2H26PERp2H25PETn2G28PETp2G27

PERn3K26PERp3K25PETn3J28PETp3J27

PERn4M26PERp4M25PETn4L28PETp4L27

PERn5P26PERp5P25PETn5N28PETp5N27

PERn6T25PERp6T24PETn6R28PETp6R27

OC0#D3OC1#C4OC2#D5OC3#D4OC4#E5OC5# / GPIO29C3OC6# / GPIO30A2OC7# / GPIO31B3

USBP0N F1USBP0P F2USBP1N G4USBP1P G3USBP2N H1USBP2P H2USBP3N J4USBP3P J3USBP4N K1USBP4P K2USBP5N L4USBP5P L5USBP6N M1USBP6P M2USBP7N N4USBP7P N3

USBRBIAS# D2USBRBIAS D1

R554

10K_0402_5%~D

1 2

C593 0.1U_0402_16V4Z~D

1 2

R58647_0402_5%~D

1 2

C591 0.1U_0402_16V4Z~D

1 2

R485 10K_0402_5%~D1 2

R635 0_0402_5%~D @1 2

R531 8.2K_0402_5%~D

1 2

R496 8.2K_0402_5%~D 1 2

R512

10K_0402_5%~D

12

R529

8.2K_0402_5%

~D

12

R477 8.2K_0402_5%~D1 2

R600 0_0402_5%~D

1 2

R58

5

10K_

0402

_5%

~D

12

R493 10K_0402_5%~D

1 2

R487 10K_0402_5%~D

1 2

R644

10K_0402_5%~D

1 2

R642 47_0402_5%~D12

R505 24.9_0402_1%~D 1 2

R532 680_0402_5%~D1 2

R56

1

10K_

0402

_5%

~D

12

C702

4.7P_0402_50V8C~D@

1

2

R570 10K_0402_5%~D

1 2

C592 0.1U_0402_16V4Z~D

1 2

R588 10K_0402_5%~D

1 2

C588 0.1U_0402_16V4Z~D

1 2

C589 0.1U_0402_16V4Z~D

1 2

R483 10K_0402_5%~D

1 2

C590 0.1U_0402_16V4Z~D

1 2

R475 8.2K_0402_5%~D @1 2 R511

10K_0402_5%~D

12

C700

4.7P_0402_50V8C~D

1

2

R524 10K_0402_5%~D

1 2

R560 47_0402_5%~D

1 2

R593

10_0402_5%~D@

12

R539

10K_0402_5%~D

1 2

RP23

10K_1206_8P4R_5%~D

1 82 73 64 5

R527

2.2K_0402_5%~D

12

R587 22.6_0402_1%~D 1 2

R484 10K_0402_5%~D

1 2

R636 0_0402_5%~D @1 2

R584

10_0402_5%~D

12

SATA

POWER MGT

SYS

SMB

GPIO

Clocks

GPIO

GPIO

U25C

ICH7M A0_BGA652~D

RI#A28

SPKRA19

SYS_RST#A22 SUS_STAT#A27

GPIO0 / BM_BUSY#AB18

GPIO26A21

GPIO27B21GPIO28E23

GPIO32 / CLKRUN#AG18

GPIO33 / AZ_DOCK_EN#AC19GPIO34 / AZ_DOCK_RST#U2

VRMPWRGDAD22

GPIO11 / SMBALERT#B23

SUSCLK C20

SLP_S3# B24SLP_S4# D23SLP_S5# F22

PWROK AA4

GPIO16 / DPRSLPVR AC22

TP0 / BATLOW# C21

PWRBTN# C23

LAN_RST# C19

RSMRST# Y4

GPIO21 / SATA0GP AF19GPIO19 / SATA1GP AH18GPIO36 / SATA2GP AH19GPIO37 / SATA3GP AE19

CLK14 AC1CLK48 B2

GPIO9 E20GPIO10 A20GPIO12 F19GPIO13 E19GPIO14 R4GPIO15 E22GPIO24 R3GPIO25 D20

SATACLKREQ#/GPIO35 AD21GPIO38 AD20GPIO39 AE20

SMBCLKC22SMBDATAB22LINKALERT#A26SMLINK0B25SMLINK1A25

GPIO18 / STPPCI#AC20GPIO20 / STPCPU#AF21

WAKE#F20SERIRQAH21THRM#AF20

GPIO6AC21GPIO7AC18GPIO8E21

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.5VRUN_L

ICH_V5REF_SUS

ICH_V5REF_RUN

ICH_V5REF_RUN

ICH_V5REF_SUS

+1.5V_DMIPLL

+VCCSATAPLL

+1.5V_DMIPLL_L

+VCCSATAPLL_L

+1.05V_VCCP

+3.3V_SUS

+1.5V_RUN

+3.3V_RUN+5V_RUN

+3.3V_SUS+5V_SUS

+1.5V_RUN

+1.5V_RUN

+3.3V_SUS

+3.3V_RUN

+1.5V_RUN

+1.05V_VCCP

+1.5V_RUN

+1.5VRUN_L

+1.5V_DMIPLL

+1.5V_RUN

+3.3V_RUN

+1.5V_RUN

+1.5V_RUN

+3.3V_RUN

+3.3V_RUN

+1.5V_RUN

+1.5V_RUN

+3.3V_SUS

+3.3V_SUS

+RTC_CELL

+3.3V_RUN

+1.5V_RUN

+VCCSATAPLL

+3.3V_SUS

Title



ICH7(4/4)




C617

0.1U_0402_16V4Z~D

1

2

C673

0.1U_0402_16V4Z~D

1

2

L50BLM11A601S_0603~D

1 2

C598

0.1U_0402_16V4Z~D

1

2

C695

0.1U_0402_16V4Z~D

1

2

+

C581

220U_D

2_4VM_R

45~D

1

2

C677

10U_0805_4VAM

~D

1

2

C612

0.1U_0402_16V4Z~D

1

2

L5310U_LB2012T100MR_20%_0805~D

1 2

C635

0.1U_0402_16V4Z~D

1

2

+

C614

330U

_D2E

_2.5

VM_R

9~D1

2

C615

0.1U_0402_16V4Z~D

1

2

D16

RB751V_SOD323~D

21

C678

0.1U_0402_16V4Z~D

1

2

D18

RB751V_SOD323~D

21

C595

0.1U_0402_16V4Z~D

1

2

R557

10_0402_5%~D

12

C618

0.1U_0402_16V4Z~D

1

2

C644

1U_0603_10V4Z~D

R563

0.5_0805_1%~D

1 2

L49

BLM21PG600SN1D_0805~D1 2

C613

1U_0

603_

10V4

Z~D

C596

0.1U_0402_16V4Z~D

1

2

C694

0.1U_0402_16V4Z~D

1

2

C689

0.1U_0402_16V4Z~D

1

2

C623

0.1U_0402_16V4Z~D

1

2

C633

0.1U_0402_16V4Z~D

1

2

C699

0.1U_0402_16V4Z~D

1

2

C687

0.1U_0402_16V4Z~D

1

2

C594

0.1U_0402_16V4Z~D

1

2

C658

0.1U_0402_16V4Z~D

1

2

C597

0.1U_0402_16V4Z~D

1

2

C697

0.1U_0402_16V4Z~D

1

2

C679

0.1U_0402_16V4Z~D

1

2

C693

0.1U_0402_16V4Z~D

1

2

C606

0.1U_0402_16V4Z~D

1

2

C611

0.1U_0402_16V4Z~D

1

2

C599

0.01U_0402_16V7K~D

1

2C696

0.1U_0402_16V4Z~D

1

2

C607

4.7U_0603_6.3V6M

~D

1

2

U25F

ICH7M A0_BGA652~D

V5REF[1]G10

V5REF[2]AD17

V5REF_SusF6

Vcc1_5_B[1]AA22Vcc1_5_B[2]AA23Vcc1_5_B[3]AB22Vcc1_5_B[4]AB23Vcc1_5_B[5]AC23Vcc1_5_B[6]AC24Vcc1_5_B[7]AC25Vcc1_5_B[8]AC26Vcc1_5_B[9]AD26Vcc1_5_B[10]AD27Vcc1_5_B[11]AD28Vcc1_5_B[12]D26Vcc1_5_B[13]D27Vcc1_5_B[14]D28Vcc1_5_B[15]E24Vcc1_5_B[16]E25Vcc1_5_B[17]E26Vcc1_5_B[18]F23Vcc1_5_B[19]F24Vcc1_5_B[20]G22Vcc1_5_B[21]G23Vcc1_5_B[22]H22Vcc1_5_B[23]H23Vcc1_5_B[24]J22Vcc1_5_B[25]J23Vcc1_5_B[26]K22Vcc1_5_B[27]K23Vcc1_5_B[28]L22Vcc1_5_B[29]L23Vcc1_5_B[30]M22Vcc1_5_B[31]M23Vcc1_5_B[32]N22Vcc1_5_B[33]N23Vcc1_5_B[34]P22Vcc1_5_B[35]P23Vcc1_5_B[36]R22Vcc1_5_B[37]R23Vcc1_5_B[38]R24Vcc1_5_B[39]R25

Vcc1_5_B[41]T22Vcc1_5_B[42]T23Vcc1_5_B[43]T26Vcc1_5_B[44]T27Vcc1_5_B[45]T28Vcc1_5_B[46]U22Vcc1_5_B[47]U23Vcc1_5_B[48]V22Vcc1_5_B[49]V23Vcc1_5_B[50]W22

Vcc1_5_B[52]Y22Vcc1_5_B[53]Y23

Vcc1_5_B[51]W23

Vcc1_5_B[40]R26

Vcc3_3[1]B27

VccDMIPLLAG28

VccSATAPLLAD2

Vcc3_3[2]AH11

Vcc1_05[1] L11Vcc1_05[2] L12Vcc1_05[3] L14Vcc1_05[4] L16

Vcc1_05[6] L18Vcc1_05[5] L17

Vcc1_05[7] M11Vcc1_05[8] M18Vcc1_05[9] P11

Vcc1_05[10] P18Vcc1_05[11] T11Vcc1_05[12] T18Vcc1_05[13] U11Vcc1_05[14] U18Vcc1_05[15] V11Vcc1_05[16] V12Vcc1_05[17] V14Vcc1_05[18] V16Vcc1_05[19] V17Vcc1_05[20] V18

Vcc3_3 / VccHDA U6

VccSus3_3/VccSusHDA R7

V_CPU_IO[1] AE23V_CPU_IO[2] AE26V_CPU_IO[3] AH26

Vcc3_3[3] AA7Vcc3_3[4] AB12Vcc3_3[5] AB20Vcc3_3[6] AC16Vcc3_3[7] AD13Vcc3_3[8] AD18Vcc3_3[9] AG12

Vcc3_3[10] AG15Vcc3_3[11] AG19

Vcc3_3[12] A5

Vcc3_3[14] B16Vcc3_3[15] B7Vcc3_3[16] C10

Vcc3_3[13] B13

Vcc3_3[17] D15Vcc3_3[18] F9Vcc3_3[19] G11Vcc3_3[20] G12

VccRTC W5

VccSus3_3[1] P7

VccSus3_3[2] A24

VccSus3_3[4] D19VccSus3_3[5] D22VccSus3_3[6] G19

VccSus3_3[3] C24

VccSus3_3[7] K3VccSus3_3[8] K4VccSus3_3[9] K5

VccSus3_3[10] K6VccSus3_3[11] L1

Vcc1_5_A[19] AB17Vcc1_5_A[20] AC17

Vcc1_5_A[21] T7Vcc1_5_A[22] F17Vcc1_5_A[23] G17

Vcc1_5_A[24] AB8Vcc1_5_A[25] AC8

VccSus1_05[1] K7

Vcc1_5_A[1]AB7Vcc1_5_A[2]AC6Vcc1_5_A[3]AC7Vcc1_5_A[4]AD6Vcc1_5_A[5]AE6Vcc1_5_A[6]AF5Vcc1_5_A[7]AF6Vcc1_5_A[8]AG5Vcc1_5_A[9]AH5

Vcc1_5_A[10]AB10Vcc1_5_A[11]AB9Vcc1_5_A[12]AC10Vcc1_5_A[13]AD10Vcc1_5_A[14]AE10Vcc1_5_A[15]AF10Vcc1_5_A[16]AF9Vcc1_5_A[17]AG9Vcc1_5_A[18]AH9

VccSus3_3[19]E3

VccUSBPLLC1

VccSus1_05/VccLAN1_05[1]AA2VccSus1_05/VccLAN1_05[2]Y7

VccSus3_3/VccLAN3_3[1]V5VccSus3_3/VccLAN3_3[2]V1VccSus3_3/VccLAN3_3[3]W2VccSus3_3/VccLAN3_3[4]W7

Vcc3_3[21] G16

VccSus3_3[12] L2VccSus3_3[13] L3VccSus3_3[14] L6VccSus3_3[15] L7VccSus3_3[16] M6VccSus3_3[17] M7VccSus3_3[18] N7

VccSus1_05[2] C28VccSus1_05[3] G20

Vcc1_5_A[26] A1Vcc1_5_A[27] H6Vcc1_5_A[28] H7Vcc1_5_A[29] J6Vcc1_5_A[30] J7

C688

0.1U_0402_16V4Z~D

1

2

C580

10U_0805_4VAM

~D

1

2

R533

100_0402_5%~D

12

U25E

ICH7M A0_BGA652~D

VSS[0]A4VSS[1]A23VSS[2]B1VSS[3]B8VSS[4]B11VSS[5]B14VSS[6]B17VSS[7]B20VSS[8]B26VSS[9]B28VSS[10]C2VSS[11]C6VSS[12]C27VSS[13]D10VSS[14]D13VSS[15]D18VSS[16]D21VSS[17]D24VSS[18]E1VSS[19]E2VSS[21]E4VSS[22]E8VSS[23]E15VSS[24]F3VSS[25]F4VSS[26]F5VSS[27]F12VSS[28]F27VSS[29]F28VSS[30]G1VSS[31]G2VSS[32]G5VSS[33]G6VSS[34]G9VSS[35]G14VSS[36]G18VSS[37]G21VSS[38]G24VSS[39]G25VSS[40]G26VSS[41]H3VSS[42]H4VSS[43]H5VSS[44]H24VSS[45]H27VSS[46]H28VSS[47]J1VSS[48]J2VSS[49]J5VSS[50]J24VSS[51]J25VSS[52]J26VSS[53]K24VSS[54]K27VSS[55]K28VSS[56]L13VSS[57]L15VSS[58]L24VSS[59]L25VSS[60]L26VSS[61]M3VSS[62]M4VSS[63]M5VSS[64]M12VSS[65]M13VSS[66]M14VSS[67]M15VSS[68]M16VSS[69]M17VSS[70]M24VSS[71]M27VSS[72]M28VSS[73]N1VSS[74]N2VSS[75]N5VSS[76]N6VSS[77]N11VSS[78]N12VSS[79]N13VSS[80]N14VSS[81]N15VSS[82]N16VSS[83]N17VSS[84]N18VSS[85]N24VSS[86]N25VSS[87]N26VSS[88]P3VSS[89]P4VSS[90]P12VSS[91]P13VSS[92]P14VSS[93]P15VSS[94]P16VSS[95]P17VSS[96]P24VSS[97]P27

VSS[98] P28VSS[99] R1

VSS[100] R11VSS[101] R12VSS[102] R13VSS[103] R14VSS[104] R15VSS[105] R16VSS[106] R17VSS[107] R18VSS[108] T6VSS[109] T12VSS[110] T13VSS[111] T14VSS[112] T15VSS[113] T16VSS[114] T17VSS[115] U4VSS[116] U12VSS[117] U13VSS[118] U14VSS[119] U15VSS[120] U16VSS[121] U17VSS[122] U24VSS[123] U25VSS[124] U26VSS[125] V2VSS[126] V13VSS[127] V15VSS[128] V24VSS[129] V27VSS[130] V28VSS[131] W6VSS[132] W24VSS[133] W25VSS[134] W26VSS[135] Y3VSS[136] Y24VSS[137] Y27VSS[138] Y28VSS[139] AA1VSS[140] AA24VSS[141] AA25VSS[142] AA26VSS[143] AB4VSS[144] AB6VSS[145] AB11VSS[146] AB14VSS[147] AB16VSS[148] AB19VSS[149] AB21VSS[150] AB24VSS[151] AB27VSS[152] AB28VSS[153] AC2VSS[154] AC5VSS[155] AC9VSS[156] AC11VSS[157] AD1VSS[158] AD3VSS[159] AD4VSS[160] AD7VSS[161] AD8VSS[162] AD11VSS[163] AD15VSS[164] AD19VSS[165] AD23VSS[166] AE2VSS[167] AE4VSS[168] AE8VSS[169] AE11VSS[170] AE13VSS[171] AE18VSS[172] AE21VSS[173] AE24VSS[174] AE25VSS[175] AF2VSS[176] AF4VSS[177] AF8VSS[178] AF11VSS[179] AF27VSS[180] AF28VSS[181] AG1VSS[182] AG3VSS[183] AG7VSS[184] AG11VSS[185] AG14VSS[186] AG17VSS[187] AG20VSS[188] AG25VSS[189] AH1VSS[190] AH3VSS[191] AH7VSS[192] AH12VSS[193] AH23VSS[194] AH27

C616

0.1U_0402_16V4Z~D

1

2

R499

0.5_0805_1%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB_BACK_EN#

USBP0_D+

USBP0_D-

USBP1_D+

USBP1_D-

USBP6_D+

COEX1_BT_ACTIVECOEX3

COEX2_WLAN_ACTIVEBT_RADIO_DIS#

USBP1_D+USBP1_D-

USBP0_D-USBP0_D+

USBP6_D-

USBP1_D-

USBP1_D+

USBP6_D-

USBP7_D+USBP7_D-

USBP6_D-USBP6_D+

USBP7_D+

USBP7_D-

USBP7_D+

USBP6_D+

USBP7_D-

USB_SIDE_EN#

USBP0_D+

USBP0_D-

USB_OC6_7#

USB_OC0_1#+5V_SUS

+USB_R_PWR

+USB_L_PWR+5V_SUS

+USB_R_PWR

+USB_L_PWR

+3.3V_RUN

+USB_R_PWR

+USB_L_PWR

USB_BACK_EN#<31>

USB_OC0_1# <23>

USB_SIDE_EN#<31>

COEX2_WLAN_ACTIVE<29>

COEX1_BT_ACTIVE<29>

BT_ACTIVE<29,35>

BT_RADIO_DIS#<23>

USBP2-<23>USBP2+<23>

USBP1-<23>

USBP6-<23>

USBP6+<23>

USBP7-<23>

USBP7+<23>

USB_OC6_7# <23>

USBP0-<23>

USBP0+<23> USBP1+<23>

Title



USB 2.0 PORT




Place U5, U6 as close as USB connector.

Place near JBT.

No Stuff

No Stuff



2

3

1

4

USB PORT#

0

DESTINATION

6

5 ECE5011 HUB

7

EXPRESS CARD

Blue Tooth

CCD Camera



C77

0.1U

_040

2_16

V4Z~

D

1

2

U17

TPS2062DR_SO8~D

GND1IN2EN1#3EN2#4

OC1# 8OUT1 7OUT2 6OC2# 5

L19DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

L27DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

C4

33P

_040

2_50

V8J~

D

1

2

R3590_0402_5%~D12

C27

10U_1206_16V4Z~D

@1

2

+C

6415

0U_D

_6.3

VM

_R55

~D

@

1

2

+

C73

150U

_D_6

.3V

M_R

55~D

1

2

R3240_0402_5%~D12

C35

0.1U_0402_16V4Z~D

1

2

C48

0.1U

_040

2_16

V4Z~

D

1

2

C5

0.1U_0402_16V4Z~D

1

2

U5

IP4220CZ6_SO6~D

@

D2+ 4

D1- 6

VCC 5

D1+1

GND2

D2-3

C277

0.1U_0402_16V4Z~D

@1

2

U6

IP4220CZ6_SO6~D

@

D2+ 4

D1- 6

VCC 5

D1+1

GND2

D2-3

R3310_0402_5%~D12

C22

0.1U

_040

2_16

V4Z~

D

1

2

L28DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

JUSB2

FOX_UB1112H-8Z4-HT~D

A_VCCA1A_D-A2A_D+A3A_GNDA4

B_VCCB1B_D-B2B_D+B3B_GNDB4

G19G210G311G412

R3520_0402_5%~D12

C26

0.1U

_040

2_16

V4Z~

D

1

2

C6

100P_0402_50V8J~D@

1

2

R17

10K_

0402

_5%

~D 12

L24DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

JBT1

JST_BM10B-SRSS-TB1(LF)(SN)~D

1122334455667788991010

GND 11GND 12

R3630_0402_5%~D12

R3460_0402_5%~D12

R3140_0402_5%~D12

R3190_0402_5%~D12

JUSB1

FOX_UB1112H-8Z4-HT~D

A_VCCA1A_D-A2A_D+A3A_GNDA4

B_VCCB1B_D-B2B_D+B3B_GNDB4

G19G210G311G412

+

C13

150U

_D_6

.3V

M_R

55~D

@

1

2

U7

TPS2062DR_SO8~D

GND1IN2EN1#3EN2#4

OC1# 8OUT1 7OUT2 6OC2# 5

C272

10U_1206_16V4Z~D

1

2

+

C37

150U

_D_6

.3V

M_R

55~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_PCI_LOM

SPROM_CSSPROM_CLK

SPROM_DI

SPROM_DI

PCI_AD13PCI_AD14

XO

PCI_AD18

PCI_AD22

PCI_AD24

EPHY_BIAS_AVDD

XI

SPROM_DOUT

LINK_LED100#

PCI_AD0

PCI_AD20

PCI_AD26

PCI_AD30

LAN_TX-

PCI_AD4

PCI_AD10

EPHY_PLLVDD

PCI_AD6

PCI_AD11

PCI_AD27

VAUX_AVAIL

PCI_AD5

PCI_AD15 SPROM_DOUT

LINK_LED10#

LAN_AD16

LAN_TX+

PCI_AD29

PCI_AD8

PCI_AD17

PCI_AD23

PCI_AD1

PCI_AD16

PCI_AD25

SPROM_CLK

PCI_AD2

PCI_AD7

LAN_RX-LAN_RX+

EPHY_PLLVDD

PCI_AD3

PCI_AD19

PCI_AD31

SPROM_CS

PCI_AD9

PCI_AD12

PCI_AD21

PCI_AD28ACTLED#

PCI_AD[0..31]

PCI_AD16EPHY_BIAS_AVDD

LAN_TX+LAN_TX-LAN_RX+LAN_RX-

+1.8V_LOM

+3.3V_LAN

+3.3V_LAN

+1.8V_LOM

+3.3V_LAN

+1.8V_LOM

+1.8V_LOM

+3.3V_LAN

+1.8V_LOM

+3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+3.3V_SRC+3.3V_LAN +3.3V_SUS

+3.3V_LAN

+3.3V_LAN

PCI_SERR#<21,28>

CLKRUN#<23,28,30>

PCI_GNT3#<21>

PCI_C_BE0#<21,28>

SYS_PME#<28,31>

PCI_PAR<21,28>

PCI_REQ3#<21>

PCI_PIRQB#<21>

CLK_PCI_LOM<6>

PCI_C_BE1#<21,28>

LOM_LOW_PWR# <31>

PCI_PERR#<21,28>

PCI_FRAME#<21,28>

PCI_TRDY#<21,28>

PCIRST_LOM#<21>

PCI_IRDY#<21,28>

PCI_STOP#<21,28>PCI_DEVSEL#<21,28>

LAN_TX+ <27>LAN_TX- <27>LAN_RX+ <27>LAN_RX- <27>

LINK_LED10# <27>LINK_LED100# <27>ACTLED# <27>

PCI_C_BE3#<21,28>PCI_C_BE2#<21,28>

PCI_AD[0..31]<21,28>

ENAB_3VLAN<32>

Title



BROADCOM 4401L LAN




None

10K Pullup4Kb

1Kb

SPROM_CLKSPROM_DOUT

None

10K Pullup

None

None

U12:ORG NC is 16x64.

Place closeto pin 57

Place closely pin 118

16Kb

Current Consumption: Max 1.5A

place Decoupling as closed physically possible to each power pins

Place R381,C352,C493 close to pin69

Place C66,C78 close to pin64

Replace with BLM11A601S if needed to meetnoise guideline for EPHY_BIAS_AVDD pin

Place close to LAN chip (U10)R65-68 should be rated at least 1/16W

C155

0.1U_0402_16V4Z~D

1

2

R68 49.9_0603_1%~D1 2

C152

4.7U_0805_10V4Z~D

1

2C

1330.1U

_0402_16V4Z~D

1

2

C122

0.1U_0402_16V4Z~D

1

2

C44 0.1U_0402_16V4Z~D1 2

C143

0.1U_0402_16V4Z~D

1

2

R3810_0603_5%~D

12

C128

0.1U_0402_16V4Z~D

1

2

R92

806_0402_1%~D

12

C144

0.1U_0402_16V4Z~D

1

2

R412

1K_0402_5%~D

1 2

C97

27P_0402_50V8J~D

1

2

C17122P_0402_50V8J~D

1

2

R402

10K_0402_5%~D

@

12

C851000P_0402_50V7K~D

1

2

R66 49.9_0603_1%~D1 2

U12

AT93C46-10SU-2.7_SO8~D

CS1SK2DI3DO4

VCC 8NC 7

ORG 6GND 5

L11

BLM11A601S_0603~D1 2

R67 49.9_0603_1%~D1 2

C76

0.1U_0402_16V4Z~D

1

2

C86

0.1U_0402_16V4Z~D

1

2

R389

10K_0402_5%~D

@

12

Y2

25MHZ_20PF_1BG25000CK1A~D

1 2

C99

27P_0402_50V8J~D

1

2

C139

0.1U_0402_16V4Z~D

1

2

C156

0.1U_0402_16V4Z~D

1

2

C781000P_0402_50V7K~D

1

2

C67

4.7U_0805_10V4Z~D

1

2

R65 49.9_0603_1%~D1 2

C72

0.1U_0402_16V4Z~D

1

2

C162

0.1U_0402_16V4Z~D

1

2

C70

4.7U_0805_10V4Z~D

1

2

R101

100_0402_5%~D

1 2

C75

0.1U_0402_16V4Z~D

1

2

C66

2.2U_0805_10V6K~D

1

2

C118

0.1U_0402_16V4Z~D

1

2

C493

0.1U_0402_16V4Z~D

1

2

R112

0_0805_5%~D1 2

C46 0.1U_0402_16V4Z~D1 2

C121

0.1U_0402_16V4Z~D

1

2

L14

BLM18PG181SN1_0603~D

@1 2

C160

0.1U_0402_16V4Z~D

1

2

R399

10K_0402_5%~D

@

12

C352

0.1U_0402_16V4Z~D

1

2

R387

1.27K_0402_1%~D

1 2BroadcomBCM 4401KQL

U10

BCM4401KQL_LQFP128~D

PCI_AD31122PCI_AD30123PCI_AD29124PCI_AD28126PCI_AD27127PCI_AD26128PCI_AD251PCI_AD243PCI_AD236PCI_AD228PCI_AD219PCI_AD2010PCI_AD1911PCI_AD1814PCI_AD1715PCI_AD1616PCI_AD1533PCI_AD1434PCI_AD1336PCI_AD1237PCI_AD1138PCI_AD1039PCI_AD941PCI_AD842PCI_AD745PCI_AD648PCI_AD549PCI_AD450PCI_AD351PCI_AD253PCI_AD154PCI_AD055

PCI_CBE3_L4PCI_CBE2_L18PCI_CBE1_L32PCI_CBE0_L43PCI_FRAME_L20PCI_IRDY_L21PCI_TRDY_L23PCI_DEVSEL_L26PCI_STOP_L27PCI_PERR_L28PCI_SERR_L29PCI_PAR31PCI_INT_L116

PCI_RST_L117PCI_CLK118PCI_GNT_L119PCI_REQ_L121PCI_PME_L113PCI_IDSEL5

PCI_CLKRUN_L22

XTAL_IN67XTAL_OUT66

LED0_L 75LED1_L 76LED2_L 77LED3_L 78

EPHY_AGND 58EPHY_AVDD 57

EPHY_BIAS_AVDD 69EPHY_BIAS_AVSS 70

EPHY_PLLVDD 64EPHY_PLLGND 63

EPHY_VREF 71EPHY_RDAC 72

EPHY_TESTMODE 88

EPHY_TDP 62EPHY_TDN 61EPHY_RDP 59EPHY_RDN 60

NC0 104

VSS1

210

5

NC2 103NC3 108NC4 102NC5 109NC6 110NC7 107

VAUX_AVAIL 87GPIO0 85

EECLK_PXE 90EEDATA_PXE 93

SPROM_CS 98SPROM_CLK 95

SPROM_DOUT 101SPROM_DIN 99

EXT_POR_L 89

JTAG_TDO 83JTAG_TCK 80JTAG_TDI 82

JTAG_TRST_L 73JTAG_TMS 81

VSS0

12VS

S146

VSS2

111

VSS3

100

VSS4

84VS

S52

VSS6

24VS

S774

VSS8

13VS

S947

VSS1

012

0VS

S11

35

VDD

CO

RE1

112

VDD

CO

RE2

17VD

DC

OR

E344

VDD

BUS1

115

VDD

BUS2

125

VDD

BUS3

19VD

DBU

S430

VDD

BUS5

40VD

DBU

S652

VDD

BUS7

7

VD

DIO

010

6V

DD

IO1

79V

DD

IO2

94

REG

_AVD

D1

96R

EG_A

VDD

297

RE

G_V

OU

T191

RE

G_V

OU

T292

VESD

111

4VE

SD2

25VE

SD3

56

XTAL

_AVD

D65

XTAL

_AVS

S68

GPIO1 86

R11433_0402_5%~D

12

C69

0.1U_0402_16V4Z~D

1

2

S

GD

Q5SI3456DV-T1-E3_TSOP6~D

3

6

245

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_TX+

LAN_TX-

LAN_RX+

LAN_RX-

LINK_LED10#LINK_LED100#

RJ_TIPRJ_RING

RJ_TIPRJ_RING

RJ_TIP_1

ACTLED#

RJ_RING_1

+3.3V_LAN +3.3V_LAN

LAN_TX+<26>

LAN_RX+<26>

LAN_RX-<26>

LAN_TX-<26>

ACTLED#<26>LINK_LED10#<26>LINK_LED100#<26>

Title


Date: Sheet o fLA-3001 0.4

Magnetic & RJ45




Layout Note:Place close to the J_RJ1

C238

300P_1808_3KV8K~D

@1

2

L2FBM-L11-160808-301LMA20T_2P~D

1 2

JWIRE1

MOLEX_53398-0290~D

1 12 2

R7 150_0402_5%~D1 2R5 150_0402_5%~D1 2

R6 150_0402_5%~D1 2

J_RJ1

TYCO_1566598-1~D

1122

GND13GND24

1000pF 2KV

2 X 75 OHMS

1CT:1CT

1CT:1CT

TRP1P

TRP1N

TRP2P

TRP2N

NC

NC

NC

NC

JLOM1

TYCO_1368458-1~D

TRD1P11

TRCT112

TRD1N10

TRD2P4

TRCT26

TRD2N5

NC3

NC1

NC2

NC8

NC7

NC9

YELLOW13

COMMON014

COMMON116

GREEN17ORANGE15

SHIE

LD0

18SH

IELD

119

L1FBM-L11-160808-301LMA20T_2P~D

1 2

C237

0.01U_0402_16V7K~D

1

2

C236

300P_1808_3KV8K~D

@1

2

C239

0.01U_0402_16V7K~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_AD20

TPA0-

TPBIAS0

TPB0-TPB0+

XD_CE#SDWP#_XDRB#CARD_ENXDWP#

MSCD#_XDCD1

SDCMD_MSBS_XDWE#

SDDATA3_MSDATA3_XDD3SDDATA2_MSDATA2_XDD2

SDDATA0_MSDATA0_XDD0

XDD4XDD5XDD6

XDCLEXDD7

XDALE

TP_SD/MMC/MS/XD_LED#

R5C832XOR5C832XI

UDIO4

R5C832XISDDATA1

PCI_AD31

PCI_AD28

PCI_AD30PCI_AD29

PCI_AD22

PCI_AD27

PCI_AD25PCI_AD26

PCI_AD17PCI_AD18

PCI_AD21

PCI_AD24PCI_AD23

PCI_AD15

PCI_AD13

PCI_AD16

PCI_AD14

PCI_AD19

PCI_AD7

PCI_AD9PCI_AD10PCI_AD11PCI_AD12

PCI_AD2PCI_AD1

PCI_AD5PCI_AD4

PCI_AD8

PCI_AD6

PCI_C_BE2#

PCI_C_BE0#

PCI_C_BE3#

PCI_AD0

PCI_AD3

PCI_DEVSEL#PCI_STOP#

PCI_FRAME#PCI_PAR

PCI_C_BE1#

PCI_REQ2#

PCI_IDSELPCI_AD17

PCI_IRDY#PCI_TRDY#

PCIRST_PCCARD#BUS_GRST#

PCI_SERR#PCI_PERR#

PCI_GNT2#

BUS_GRST#

XD_CDSW#UDIO5

R5C832XO

SDCD#_XDCD0#

SDCD#_XDCD0#


SDDATA2

TPA0+

CLK_PCI_PCCARD

SDCD#_XDCD0#

MSCD#_XDCD1

CARD_EN

UDIO4

IRQ_SERIRQ

UDIO5

MS_INS#

XD_SW#

XD_CDSW#

XD_SW#

XDALESDCMD_MSBS_XDWE#

MSCLK SDCLK_MSCLK_XDRE#


SDCMD_MSBS_XDWE#


SDDATA2_MSDATA2_XDD2SDDATA3_MSDATA3_XDD3

MS_INS#


SDCLK_MSCLK_XDRE#SDDATA1_MSDATA1_XDD1

SDDATA3_MSDATA3_XDD3SDDATA1


XD_CE#

XDD5 SDDATA2

XDCLE

XDD6


XDWP#

SDDATA0_MSDATA0_XDD0XDD4

SDWP#_XDRB#

XDD7SDCLK_MSCLK_XDRE#

SDCD#_XDCD0#SDCMD_MSBS_XDWE#SDCLK

SDWP#_XDRB#

MSCD#_XDCD1 MS_INS#

XD_CDSW#



SDCLK_MSCLK_XDRE#

+3.3V_R5C832

+15V_SUS

+3.3V_RUN_CARD

+3V_RUN_PHY

+3.3V_R5C832

+3.3V_R5C832

+3.3V_R5C832

+3.3V_RUN_XD

+3.3V_R5C832

+3.3V_R5C832

+VCC_ROUT

+VCC_ROUT

+3V_RUN_PHY

+3.3V_RUN_CARD

+3.3V_RUN+3.3V_R5C832

+3.3V_R5C832

+3.3V_R5C832 +3.3V_RUN_CARD

+3.3V_R5C832

+3.3V_R5C832

+3.3V_RUN_XD

+3.3V_RUN_CARD

PCI_C_BE3#<21,26>

PCI_AD[0..31]<21,26>

CLKRUN#<23,26,30>

PCI_C_BE2#<21,26>

PCI_C_BE0#<21,26>PCI_C_BE1#<21,26>

PCI_FRAME#<21,26>PCI_TRDY#<21,26>

PCI_PAR<21,26>

PCI_DEVSEL#<21,26>PCI_STOP#<21,26>PCI_IRDY#<21,26>

PCI_PERR#<21,26>

PCI_REQ2#<21>PCI_GNT2#<21>

CB_HWSPND#<31>

CLK_PCI_PCCARD<6>PCIRST_PCCARD#<21>

PCI_SERR#<21,26>

PCI_PIRQC#<21>

IRQ_SERIRQ <23,30>

SYS_PME#<26,31>

PCI_PIRQD#<21>

CBUS_GRST#<31>

TPA0+ <29>TPA0- <29>

TPB0+ <29>TPB0- <29>

TPBIAS0 <29>

Title



R5C832 and 5 IN 1




XDLED#

XDR/B#

XDPWR

XDRE#

XDCE#

XDWE#

Solve MS Duo Adaptor short problem

Media I/FMDIO00

MDIO02

MDIO01

MDIO07

MDIO06

MDIO05

MDIO04

MDIO03

SDCD#

SD Card

MDIO08

MDIO09

SDCCMD

SDLED#

SDPWR1

SDPWR0

SDWP#

MDIO13

MDIO12

MDIO11

MDIO10

SDCCLK

MDIO18

MDIO17

MDIO16

MDIO15

MDIO14

SDCDAT2

SDCDAT1

SDCDAT0

MDIO19

MSEN

MMC Card

SDCDAT3

UDIO4UDIO3 XDEN

Pull-up

Function

Pull-upPull-up

Function set pin define

SD,MMC,MS,MS PRO,XD muti-function pin define

EnableSD,XD,MS,MMC Card

Pull-up

MMCLED#

MMCPWR

MMCCD#

MMCCLK

MMCCMD

MMCDAT

MSWR

MSCD#

MS Card

MSCDAT2

MSCDAT1

MSCDAT0

MSEXTCK

MSLED#

XD Card

MSCCLK

MSBS

MSCDAT3

XDCDAT4

XDCDAT3

XDCDAT2

XDCDAT1

XDCDAT0

XDCDAT7

XDCDAT6

XDCDAT5

XDALE

XDCLE

XDWP#

XDCD1#

XDCD0#

SDEXTCK

Layout Note: Place close to R5C832and Shield GND

Place close to J5IN1

Layout Note: Place close to R5C832

MS Pro Card

Add test point

No pop R98 to fixcurrent leakage issuefrom ZRS M/B

5 IN 1 CardReader CONN.

G

DS

Q8 SI2303BDS-T1-E3_SOT23-3~D2

13

C149

10U_0805_6.3V6M

~D

1

2

R150

10K_0402_5%~D1

2R5450_0402_5%~D

1 2

C645

0.01U_0402_16V7K~D

1

2

R498

0_0402_5%~D

@1 2

D9

RB751V_SOD323~D

2 1

C562

10P_0402_50V8J~D

1

2

C459

0.47U_0402_10V4Z~D

1

2

C180

0.01U_0402_16V7K~D

1

2

R105

0_0402_5%~D@

1 2

C153

0.01U_0402_16V7K~D

1

2

C503

0.01U_0402_16V7K~D

1

2

C172

22P_0402_50V8J~D

1 2

R5C832

U21

R5C832_TQFP128~D

AD31125AD30126AD29127AD281AD272AD263AD255AD246AD239AD2211AD2112AD2014AD1915AD1817AD1718AD1619AD1536AD1437AD1338AD1239AD1140AD1042AD943AD844AD746AD647AD548AD449AD350AD251AD152AD053

VCC_PCI3V 10VCC_PCI3V 20

VCC_RIN 61

VCC_ROUT 16VCC_ROUT 34

VCC_3V 67

VCC_MD3V 86

AVCC_PHY3V 98AVCC_PHY3V 106AVCC_PHY3V 110

TPBIAS0 113

MDIO00 80

MDIO03 77MDIO04 76MDIO05 75MDIO06 74MDIO07 73

MDIO10 82MDIO11 81MDIO12 93MDIO13 90

FIL0 96

VREF 100REXT 101

MDIO08 88MDIO09 84

MDIO01 79MDIO02 78

MDIO14 91MDIO15 89MDIO16 92MDIO17 87MDIO18 85MDIO19 83

C/BE3#7C/BE2#21C/BE1#35C/BE0#45

PAR33FRAME#23TRDY#25IRDY#24STOP#29DEVSEL#26IDSEL8PERR#30SERR#31

NC97

TEST66 HWSPND#69

INTA#115INTB#116

PCICLK121PCIRST#119GBRST#71CLKRUN#117PME#70

REQ#124GNT#123

AGND99 AGND102 AGND103

GND 4GND 13GND 22GND 28

UDIO0/SERIRQ# 72UDIO1 60UDIO2 56UDIO3 65UDIO4 59UDIO5 57

XI 94XO 95

MSEN 58XDEN 55

AGND107 AGND111

GND 54GND 62GND 63GND 68GND 118GND 122

VCC_PCI3V 32VCC_PCI3V 27

VCC_PCI3V 41

VCC_ROUT 114VCC_ROUT 64

VCC_ROUT 120

VCC_PCI3V 128

AVCC_PHY3V 112

TPAP0 109TPAN0 108

TPBP0 105TPBN0 104

R509

100K_0402_5%~D

1 2

C169

1U_0603_10V4Z~D

1

2R149

10K_0402_5%~D1

2

L47

BLM21A601SPT_0805~D

1 2

R5080_0402_5%~D@

12

C150

1U_0603_10V4Z~D

1

2

R97

100K_0402_5%~D

12

X1

24.576MHz_16P_1BG24576CKIA~D

12

C522

0.01U_0402_16V7K~D

1

2

C151

0.1U_0402_16V4Z~D

1

2

C550

0.47U_0402_10V4Z~D

1

2

R96 10K_0402_5%~D1 2

G

D

S

Q9

2N7002_SOT23~D

2

13

C163

22P_0402_50V8J~D

1 2

U13

G5240B1T1U_SOT23-5~D

IN5

ON/OFF#4

OUT 1GND 2N.C 3

C135

0.01U_0402_16V7K~D

1

2

C146

0.01U_0402_16V7K~D

1

2

R565

0_0402_5%~D

12

R140

10K_0402_1%~D

12

C181

0.01U_0402_16V7K~D

1

2

C482

0.01U_0402_16V7K~D

1

2

R98 0_0402_5%~D@1 2

R103 100K_0402_5%~D

1 2

C145

0.01U_0402_16V7K~D

1

2

4 IN 1 CONN

xD Card

Interface

MS Card

Interface

SD Card

Interface

J5IN1

MOLEX_48000-3002~D

XD0_GND1

XD1_CD2XD2_R/B#3XD3_RE#4XD4_CE#5XD5_CLE6XD6_ALE7XD7_WE#8XD8_WP#9

XD9_GND10

XD10_D011XD11_D112XD12_D213XD13_D314XD14_D415XD15_D516XD16_D617XD17_D718

XD18_VCC19

MS1_VSS 20

MS2_BS 21

MS3_DATA1 22MS4_DATA0 23

MS5_DATA2 24

MS6_INS 25

MS7_DATA3 26MS8_SCLK 27

MS9_VCC 28

MS10_VSS 29

SD1_CD/DAT3 30

SD2_CMD 31

SD3_VSS 32

SD4_VDD 33

SD5_CLK 34

SD6_VSS 35

SD7_DAT0 36SD8_DAT1 37SD9_DAT2 38

SD_GND 39

SD_SW 40SD_SW/WP 41

GND042GND143GND244

G

D S

Q382N7002_SOT23~D

2

1 3R100

10K_0402_5%~D

1 2

C619

0.01U_0402_16V7K~D

1

2

C608

2.2U_0805_10V6K~D

1

2

R458

10_0402_5%~D

12

C449

10U_0805_6.3V6M

~D

1

2

C527

0.01U_0402_16V7K~D

1

2

G

D S

Q352N7002_SOT23~D

2

1 3

R519 0_0805_5%~D@1 2

C157

10U_0805_6.3V6M

~D

1

2

D14

RB751V_SOD323~D

2 1

R130680_0402_5%~D

1 2

G

D

S Q372N7002_SOT23~D

2

13

C179

0.1U_0402_16V4Z~D

1

2

R108

100K_0402_5%~D

1

2

C178

1000P_0402_50V7K~D

1

2

C177

0.01U_0402_16V7K~D

1

2

C551

10U_0805_6.3V6M

~D

1

2

R559

150K_0402_5%~D

12

R507

0_0402_5%~D

@1 2

D15

RB751V_SOD323~D

2 1

C513

0.01U_0402_16V7K~D

1

2

R500

0_0402_5%~D

@1 2

C141

0.1U_0402_16V4Z~D

1

2

R139 0_0402_5%~D 1 2

R109100_0402_5%~D

1 2

R170

0_0805_5%~D

1 2

C620

0.01U_0402_16V7K~D

1

2

C1820.01U_0402_16V7K~D 1 2

R102 0_0402_5%~D@1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH_SMBCLK

PCIE_RX2-

CLK_PCIE_MINI2

PCIE_RX2+

CLK_PCIE_MINI2#

PLTRST3#

PCIE_WAKE#

WLAN_RADIO_OFF#

MINI2CLK_REQ#

ICH_SMBDATA

LED_WLAN#

PCIE_TX2-

COEX2_WLAN_ACTIVECOEX1_BT_ACTIVE

ICH_SMBCLK

PCIE_RX1-PCIE_RX1+

PCIE_TX1-PCIE_TX1+

ICH_SMBDATA

PCIE_WAKE#

USBP5_D+USBP5_D-

CLK_PCIE_MINI1#CLK_PCIE_MINI1

MINI1CLK_REQ#

WWAN_RADIO_DIS#PLTRST3#

UIM_DATAUIM_CLK

UIM_VPPUIM_RESET

USBP5_D+

USBP5- USBP5_D-

USBP5+

UIM_RESET

UIM_DATA

UIM_VPP

UIM_CLK

TPBIAS0

TPA0-

TPB0-

TPA0+

TPA_0-

TPB_0+

TPA_0+

TPB_0-

PCIE_TX2+

TPB0+

WLAN_RADIO_OFF#

+3.3V_RUN

+3.3V_LAN

+3.3V_RUN

+1.5V_RUN

+3.3V_RUN

+1.5V_RUN

+3.3V_LAN

+3.3V_LAN

+3.3V_RUN

+3.3V_RUN

+SIM_PWR

+3.3V_LAN

LED_WLAN# <35>

MINI2CLK_REQ#<6>

CLK_PCIE_MINI2#<6>

PLTRST3# <21>

PCIE_RX2+<23>

COEX2_WLAN_ACTIVE<25>

CLK_PCIE_MINI2<6>

COEX1_BT_ACTIVE<25>

ICH_SMBCLK <6,23,36>ICH_SMBDATA <6,23,36>

PCIE_WAKE#<31,36>

PCIE_RX2-<23>

CLK_PCIE_MINI1<6>CLK_PCIE_MINI1#<6>

PCIE_RX1-<23>

ICH_SMBCLK <6,23,36>

PCIE_RX1+<23>

WWAN_RADIO_DIS# <23>

ICH_SMBDATA <6,23,36>

MINI1CLK_REQ#<6>

PCIE_TX1-<23>PCIE_TX1+<23>

PLTRST3# <21>

PCIE_WAKE#<31,36>

BT_ACTIVE <25,35>

USBP5-<23>

USBP5+<23>

PCIE_TX2-<23>

UIM_DATA <35>UIM_CLK <35>UIM_RESET <35>UIM_VPP <35>

TPA0+<28>TPA0-<28>TPB0+<28>TPB0-<28>

TPBIAS0<28>

HOST_DEBUG_TX <30>HOST_DEBUG_RX<30>

PCIE_TX2+<23>

8051TX<30>

8051RX <30>

WLAN_RADIO_DIS#<31>

Title



MINI CARD & 1394 Connector




Mini Wireless LAN Card Mini Wireless WAN Card

Close to JMINI1 Conn.

Layout Note: Place close to R5C832 Chip Layout Note: Place close to 1394 Connector

Suport for WoWprevents backdrive when WoW is enabled.

Close to JMINI1 Conn.

R461

56.2_0603_1%~D

12

L36

DLW21SN121SQ2L_4P~D

@

11

44 3 3

2 2

C194

33P_0402_50V8J~D

1

2

R4030_0402_5%~D

12

C191

0.1U_0402_16V4Z~D

1

2

C283

33P_0402_50V8J~D

1

2

R460

56.2_0603_1%~D

12

R2410_0402_5%~D

1 2

+

C198

330U_V_6.3VM

_R25M

~D

1

2

C201

0.047U_0402_16V4Z~D

1

2

C188

0.1U_0402_16V4Z~D

1

2

C53

33P_0402_50V8J~D

1

2

R2400_0402_5%~D

1 2

C193

33P_0402_50V8J~D

1

2C248

4.7U_0603_6.3V6M

~D

1

2

C572

0.01U_0402_16V7K~D

1

2

R391 0_0402_5%~D

12

R6280_0402_5%~D @

1 2

JMINI2

TYCO_1775838-1~D

1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151

GND153

2 24 46 68 8

10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52

GND2 54

JCLIP2

MOLEX_48099-5200~D

11223344

L35

DLW21SN121SQ2L_4P~D

@11

44 3 3

2 2

JCLIP1

MOLEX_48099-5200~D

11223344

C567

0.33U_0603_10V7K~D

1

2

L15DLW21SN900SQ2_0805~D

@

11

44 3 3

2 2

R4010_0402_5%~D

12

C281

0.1U_0402_16V4Z~D

1

2

JMINI1

TYCO_1775838-1~D

1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151

GND153

2 24 46 68 8

10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52

GND2 54

R325 0_0402_5%~D@

1 2

R167 0_0402_5%~D1 2

T1PAD~D

R463

56.2_0603_1%~D

12

C571

270P_0402_50V7K~D

1

2

C192

0.1U_0402_16V4Z~D

1

2

C249

0.047U_0402_16V4Z~D

1

2

C199

0.047U_0402_16V4Z~D

1

2

R166 0_0402_5%~D1 2

J1394

TYCO_2-1775815-2~D

TPA+4TPA-3TPB+2TPB-1

GND 5GND 6GND 7GND 8

C189

0.047U_0402_16V4Z~D

1

2

R4685.11K_0603_1%~D

12

R462

56.2_0603_1%~D

12

+

C553

330U_V_6.3VM

_R25M

~D

1

2

D22

RB751V_SOD323~D

21

C187

0.047U_0402_16V4Z~D

1

2

C544

0.047U_0402_16V4Z~D

1

2

C195

33P_0402_50V8J~D

1

2

C280

0.047U_0402_16V4Z~D

1

2

R393 0_0402_5%~D

12

C282

33P_0402_50V8J~D

1

2

C190

33P_0402_50V8J~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DAT_SMB

CLK_SMB

SIO_SLP_S5#

AUX_EN

ALWON

CLK_PCI_5004

KSO16

KSI0

KSI6

KSO9

BREATH_LED

SIO_EXT_SCI#

LPC_LAD2

KSO4

KSO12

SIO_SLP_S3#

CLK_SMB

BAT2_LED#BAT1_LED#

ICH_EC_SPI_CLK

NUM_LED#

DEBUG_ENABLE#

PS_ID_DISABLE#

SBAT_SMBDAT

HOST_DEBUG_TX

VGA_IDENTIFY

KSI4

BC_INT#

SIO_EXT_SMI#EC_FLASH_SPI_DIN

SIO_A20GATE

LPC_LAD0

KSO1

KSO6PBAT_SMBDAT

KSO14KSO15

ICH_EC_SPI_DIN

CAP_LED#

FWP#

LPC_LAD1

KSI5

CLK_PCI_5004

EC_FLASH_SPI_DO

EC_FLASH_SPI_CLK

KSO2

KSO8

SFPI_EN

BC_CLK

PS_ID

KSI7

KSO11

SIO_THRM#

SIO_EXT_WAKE#

SCRL_LED#

IRQ_SERIRQ

FAN1_TACH

SIO_RCIN#

SUS_ON

KB_XOSEL

KSO3

HOST_DEBUG_RX

MAIN_PWR_SW#

KSO0

VCC0

BC_DAT

CLK_TP_SIO

KSI3

KSO7

ACAV_IN

SBAT_SMBCLK

KSI1

PBAT_SMBCLK

RESET_OUT#

RUNPWROK

VGA_IDENTIFY

LPC_LAD3

PLTRST_EC#

ATF_INT#

KSO5

KSI2

KSO13

DAT_SMB

RUN_ON

SIO_PWRBTN#

ICH_EC_SPI_DO

DAT_TP_SIO

CLKRUN#

LPC_LFRAME#

KSO10

LID_CL_SIO#

32K_XTAL2

SFPI_EN

DEBUG_ENABLE#8051TX

PBAT_SMBDAT

PBAT_SMBCLK

SBAT_SMBDAT

SBAT_SMBCLK

KSO17

8051RX

ITP_DBRESET#

LID_CL_SIO# LID_CL#

MAIN_PWR_SW# POWER_SW#

32K_XTAL1

INSTANT_ON_SW# INSTANT_POWER_SW#

INSTANT_ON_SW#

EC_32KHZ

ATF_INT#

SNIFFER_PWR_SW#

RUN_ON_D

SNIFFER_SW#

8051RX8051TX

EC_PWM3_188Khz

SNIFFER_LED_OFF#

BIA_PWM_EC

SPI_CS#

VR_CAP

HOST_DEBUG_TXHOST_DEBUG_RX

EC_FLASH_SPI_CLK

SPI_CS#

EC_FLASH_SPI_DO

EC_FLASH_SPI_DIN

FWP#

VR_CAPALWON

+3.3V_ALW

+3.3V_ALW

+RTC_CELL

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+RTC_CELL

+RTC_CELL

+3.3V_SUS

+RTC_CELL

+3.3V_SUS+3.3V_SUS

+3.3V_ALW+3.3V_ALW

LPC_LFRAME#<22>

PLTRST_EC#<21>

CLKRUN#<23,26,28>

CLK_PCI_5004<6>

KSI[0..7]<34>

BAT1_LED# <35>BAT2_LED# <35>

RESET_OUT# <33>

RUNPWROK <31,33,42>

ACAV_IN <16,43>

CLK_TP_SIO<34>DAT_TP_SIO<34>

ALWON <39>

BREATH_LED <35>

FAN1_TACH <16>

CLK_SMB <16>

SIO_A20GATE<22>

ICH_EC_SPI_DO<23>

ICH_EC_SPI_CLK<23>

PBAT_SMBCLK <38,43>PBAT_SMBDAT <38,43>

SIO_EXT_SCI# <23>

SIO_EXT_SMI# <23>

BC_INT#<31>

BC_CLK<31>BC_DAT<31>

SIO_THRM#<23>

IRQ_SERIRQ<23,28>

AUX_EN <32,39>SUS_ON <32,33,39>RUN_ON <19,32,33,39,40,41,50>

SIO_SLP_S5# <23>SIO_SLP_S3# <23>

SIO_RCIN# <22>SIO_EXT_WAKE# <23>

SCRL_LED# <35>CAP_LED# <35>

NUM_LED# <35>

ATF_INT# <16>

DAT_SMB <16>

PS_ID_DISABLE# <37>

LPC_LAD0<22>LPC_LAD1<22>LPC_LAD2<22>LPC_LAD3<22>

SIO_PWRBTN#<23>

SBAT_SMBDAT <19>SBAT_SMBCLK <19>

KSO[0..17]<34>

LID_CL# <35>

POWER_SW# <16,35>

INSTANT_POWER_SW# <35>

ICH_EC_SPI_DIN<23>

ITP_DBRESET# <7,23>

EC_32KHZ <31>

SNIFFER_PWR_SW# <35>

PS_ID <37>

8051TX<29>8051RX<29>

SNIFFER_LED_OFF# <22,35>

EC_PWM3_188Khz <39>

BIA_PWM_EC <19>

SPI_CS# <23>

HOST_DEBUG_TX <29>HOST_DEBUG_RX <29>

Title



EMC5004



Place closely pin 58



0 = UMA (Pop Rb)1 = Discrete Gfx (Pop Ra)

1=Flash Recovery Enabled0=Flash Recovery Disabled

Use Low ESR cap<2 ohms

To SW/B

Ra

Rb

5V tolerant pins

IMCLK,IMDAT,EMCLK,EMDAT,KCLK,KDAT,8051RX,8051TXGPIO43,GPIO35~37

For power 15Vcharge bump circuit

150 MIL SO8

200 MIL SO8

Flash ROM

Flash write protect bottom 4Kof internal bootblock flash

Low = write protectedSTUFF for DevelopmentNO STUFF for Production

Work around circuit for EMC5004 Rev.C version

Bits issue list: WI52662

C519

0.1U_0402_16V4Z~D

1

2

R145

1K_0402_5%~D

@ 12

R203 0_0402_5%~D1 2

R131

0_0402_5%~D

12

C457

0.1U_0402_16V4Z~D

1

2

R137 8.2K_0402_5%~D

1 2

R454100K_0402_5%~D

12

R136 8.2K_0402_5%~D

1 2

D27

RB751V_SOD323~D@

21

Y4

32.768K_12.5PF_Q13MC30610003~D

14

23

C7114.7U_0603_6.3V6M~D@

1

2

R153

1K_0402_5%~D

12

R517

10K_0402_5%~D

12

U23

M25P80-VMW6TP_SO8~D

S#1Q2W#3VSS4

VCC 8HOLD# 7

C 6D 5

R441

0_0402_5%~D

1 2

C

BE

Q65MMBT3906_SOT23~D@1

2

3

C455

0.1U_0402_16V4Z~D

1

2

R649

10K_0402_5%~D@

1 2

C161

1U_0603_10V4Z~D

1

2

C610

0.1U_0402_16V4Z~D

1 2

C18322P_0402_50V8J~D

1 2

L41BLM11A121S_0603~D

1 2

C168

1U_0603_10V4Z~D

1

2

C1581U_0603_10V4Z~D

1

2

R422

22_0402_5%~D

12 R115

10K_0402_5%~D

1 2

R643 0_0402_5%~D1 2

R201

10K_0402_5%~D

12

R410

100K_0402_5%~D

@

12

C477

0.047U_0402_16V4Z~D

1

2

R104 8.2K_0402_5%~D

1 2

R117

10K_0402_5%~D

1 2

U22

MX25L8005MI-15G_SOP8~D

@

CS#1SO2WP#3GND4

VCC 8HOLD# 7

SCLK 6SI 5R518

47_0402_5%~D

12

R134 10K_0402_5%~D

1 2

R411100K_0402_5%~D

12

C17022P_0402_50V8J~D

1 2

C176

0.1U_0402_16V4Z~D

1

2

L43BLM

11A121S_0603~D

12

R417

100K_0402_5%~D

1@

12

R11110K_0402_5%~D

1 2

C523

10U_0805_6.3V6M

~D

1

2

R650

0_0402_5%~D@

1 2

R406

10_0402_5%~D

C508

0.1U_0402_16V4Z~D

12

R64710K_0402_5%~D@

12

R202

10K_0402_5%~D

12

R426 10K_0402_5%~D12

JDBG1

MOLEX_53398-0571~D@

1 12 23 34 45 5G16 G27

R106 8.2K_0402_5%~D

1 2

R405

100K_0402_5%~D

12

R51610K_0402_5%~D

12

G

D

S

Q662N7002_SOT23~D@

2

13

C175

4.7U_0603_6.3V6M

~D

1

2

JDEBG2

1.5mm SMT~D@

11 22 33

R651

100K_0402_5%~D@

1 2

R118

100K_0402_5%~D

12

R110

10K_0402_5%~D

12

R648

100K_0402_5%~D

@

12

R627 0_0402_5%~D1 2

LPC Interface

Host/8051

Keyboard and Mouse Interface

BC Bus

PWR SW

U20

MEC5004_VTQFP128~D

GPIO82/FAN_TACH3 43

SGPIO35 1SGPIO36 (SFPI_EN) 2

SGPIO37 3

SGPIO43 4

GPIO16/FAN_TACH2 42GPIO15/FAN_TACH1 41

GPIO5/KSO1514GPIO4/KSO1415

OUT11/PWM1 46OUT10/PWM0 45

OUT9/PWM2 47

OUT5/KBRST50

OUT2/PWM3 48

PWRGD 49

nRESET_OUT/OUT6 53

ACAV_IN 128

POWER_ SW_IN1# 126

AB1A_DATA 5AB1A_CLK 6AB1B_DATA 7AB1B_CLK 8

KSO13/GPIO1816KSO12/OUT817KSO11/GPIOC718KSO10/GPIOC619KSO9/GPIOC520KSO8/GPIOC423KSO7/GPIO324KSO6/GPIO225

KSO4/GPIO028KSO3/GPIOC329KSO2/GPIOC230KSO1/GPIOC131KSO0/GPIOC032

KSI7/GPIO1933KSI6/GPIO1734KSI5/GPIO1035KSI4/GPIO936KSI3/GPIO837KSI2/GPIO738KSI1/GPIO639KSI0/SGPIO3040

KCLK77KDAT78EMCLK79EMDAT80

POWER_ SW_IN0# 127

VCC

121

KSO5/GPIO127

VR_C

AP22

VSS

26

KSO17/GPIOA112KSO16/GPIOA013

VSS

51

VCC

144

GPIO96/TOUT1 52

SGPIO44/MSCLK/SPCLK2 54SGPIO45/MSDATA/SPDOUT2 55

SER_IRQ56

LRESET#57PCICLK58LFRAME#59LAD060LAD161LAD262LAD363

VSS

74

CLKRUN#64

VCC

165

nEC_SCI/SPDIN2 66

SGPIO31/TIN1/SPCLK1 67SGPIO47/SPDOUT1 68SGPIO46/SPDIN1 69

SYSOPT0/SGPIO32/LPC_TX 70SYSOPT1/SGPIO33/LPC_RX 71

TEST_PIN 72

GPIOA3/WINDMON 73

GPIO94/IMCLK75GPIO95/IMDAT76

VCC

183

GPIO20/PS2CLK/8051RX81GPIO21/PS2DAT/8051TX82

VSS

88

nFWP 84

SGPIO42 89SGPIO41 90SGPIO40 91

SGPIO34/A20M92

VSS_

PLL

101

HSTCLK102

FLCLK103

VC

C_P

LL10

4

HSTDATAIN105

FLDATAIN106

HSTDATAOUT107

FLDATAOUT108

FLCS0109FLCS1110

VSS

113

nBAT_LED 114nPWR_LED 115

VCC

111

6

OUT7/nSMI 11

GPIO83/32KHZ_OUT 117

BGPO0 118

ALWON 120

XTAL1122

XOSEL123

XTAL2124

AGN

D12

5

POWER_ SW_IN2# 119

GPIO11/AB2A_DATA 93GPIO12/AB2A_CLK 94

GPIO13/AB2B_DATA 95GPIO14/AB2B_CLK 96

GPIO87/AB1C_DATA 111GPIO86/AB1C_CLK 112

GPIO85/AB1D_DATA 9GPIO84/AB1D_CLK 10

GPIO93/AB1F_DATA 97GPIO92/AB1F_CLK 98

GPIO91/AB1E_DATA 99GPIO90/AB1E_CLK 100

BC_CLK87BC_DAT86BC_INT85

VCC

012

1

C5240.1U_0402_16V4Z~D

1

2

R135 10K_0402_5%~D

1 2

C506

22P_0402_50V8J~D

1

2

R116

100K_0402_5%~D

12

R418

100K_0402_5%~D

2@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BID2

BID3

VDDA33

REG_EN

RBIAS

RUNPWROK

ECE5011_XTAL1

VDDA18PLLVDD18CAP_LDO

CPU_PROCHOT#

BID0

BID1

THERMTRIP_SIO

LOM_LOW_PWR#

BID2

BC_INT#

PBAT_ALARM#

AUDIO_AVDD_ON

BC_DAT

SYS_PME#

BID3

BC_CLK

BID1

ICH_PME#ICH_PCIE_WAKE#

PCIE_WAKE#

BID0

BEEP

ECE5011_XTAL1

ECE5011_XTAL2

CB_HWSPND#

EC_32KHZ

CBUS_GRST#

ECE5011_XTAL2

PBAT_PRES#

DBAY_MODPRES#

M_LED_A

MDC_RST_DIS#

EXPRCRD_STBY#

FPBACK_EN

SNIFFER_WIRELESS_ON/OFF#

CPPE#

ADAPT_OC

DOCK_SIO_ALERT#

NB_MUTE

5V_CAL_SIO#

USB_BACK_EN#USB_SIDE_EN#

DBAY_MODPRES#

PCIE_WAKE#

DOCK_SIO_ALERT#

PBAT_ALARM#

SBAT_ALARM#

SBAT_ALARM#

IMVP6_PROCHOT#

IMVP6_PROCHOT#

5V_CAL_SIO2#

SYS_PME#

SC_DET#

WLAN_RADIO_DIS#

TOUCH_PAD_LED#

CAM_IMG_CAPTURE#LOW_LIGHT

MIC_SWITCH

SW_LED

ADAPT_TRIP_SEL

HDDC_EN#MODC_EN#

MODC_EN#HDDC_EN#

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_RUN

+3.3V_ALW

AUDIO_AVDD_ON<36>

SYS_PME#<26,28>

BEEP<36>

BC_CLK<30>

BC_INT#<30>BC_DAT<30>

ICH_PCIE_WAKE#<23>

PBAT_ALARM#<38>

ICH_PME#<21>

LOM_LOW_PWR#<26> RUNPWROK <30,33,42>

CB_HWSPND#<28>

EC_32KHZ <30>

PCIE_WAKE#<29,36>

CBUS_GRST#<28>

PBAT_PRES#<38>

M_LED_A<34>

MDC_RST_DIS#<36>

EXPRCRD_STBY#<36>

FPBACK_EN<19>CPPE#<36>

THERMTRIP_SIO<16>

ADAPT_OC<43>

SNIFFER_WIRELESS_ON/OFF#<35>

NB_MUTE<36>

5V_CAL_SIO#<16>

USB_BACK_EN#<25>USB_SIDE_EN#<25>

5V_CAL_SIO2#<16>

AC_OFF<37>

SC_DET#<36>

IMVP6_PROCHOT#<42>

WLAN_RADIO_DIS# <29>

TOUCH_PAD_LED#<34>

CAM_IMG_CAPTURE#<35>LOW_LIGHT<34>

CPU_PROCHOT#<7>

MIC_SWITCH<36>

SW_LED<35>

ADAPT_TRIP_SEL<43>

HDDC_EN#<23,36>MODC_EN#<23,36>

Title



HUB/ECE5011




BID0BID3M00REVBID2 BID1

0000

Route RBIAS and its return to pin 128 veryshort.

5V tolerant pins

GPIOB[7:0],GPIOC[7:0]GPIOD[1:0],GPIOE[7:0]

X00 Modify 9/14

0 0 10 X000 0 1 X010

X020 0 1 1X030 1 0 0

R375 10K_0402_5%~D1 2

C36

00.

1U_0

402_

16V4

Z~D

1

2

C604.7U_0805_6.3V6K~D1

2

R40410K_0402_5%~D

1 2

R42

10K_

0402

_5%

~D

@ 12

R398

12K_0402_1%~D

12

R70

100K_0402_5%~D

1 2R

941M

_0402_5%~D

@

12

R372 10K_0402_5%~D1 2

R86 10K_0402_5%~D

1 2

USB

GPIO

ECE5011

VSS

U18

ECE5011_VTQFP128~D

GPIOA[0]97GPIOA[1]98GPIOA[2]99GPIOA[3]100GPIOA[4]101GPIOA[5]102GPIOA[6]103GPIOA[7]104

VDDA33 8

VSS 23

VDDA33 14

VSS 51

VDDA33 20

VSS 36

GPIOH[0]24GPIOH[1]25GPIOH[4]26GPIOH[5]27BC_INT58BC_DAT59BC_CLK60

VCC

134

GPIOE[0]1GPIOE[1]2GPIOE[2]3GPIOE[3]4GPIOE[4]5GPIOE[5]84GPIOE[6]83GPIOE[7]6

VSS 37

VSS 38

VSS 39

VSS 40

VSS 41VC

C1

42VC

C1

43

VSS 44

VSS 45

NC 46

VSS 47

VSS 48

VSS 49

VSS 50

VSS 52

VCC

157

VSS 53

VSS 54

VSS 55

VSS 56

GPIOB[0]65GPIOB[1]66GPIOC[2]67GPIOC[3]68GPIOC[4]69GPIOC[5]70GPIOC[6]71GPIOC[7]73GPIOD[0]74GPIOC[1]75GPIOC[0]76GPIOB[7]77GPIOB[6]78GPIOB[5]79GPIOB[4]80GPIOB[3]81GPIOB[2]82

VSS 64

GPIOD[1]/CIRTX61GPIOD[2]/CIRRX62

GPIOD[3]/VBUS_DET63

CAP_LDO 86

VCC

185

KHz_32 96

GPIOD[4]/OCS1_N28GPIOD[5]/OCS2_N29GPIOD[6]/OCS3_N30GPIOD[7]/OCS4_N31

GPIOH[6]32GPIOH[7]33

GPIOG[0]88GPIOG[1]89GPIOG[2]90GPIOG[3]91GPIOG[4]92GPIOG[5]93GPIOG[6]94GPIOG[7]95

GPIOH[2]106GPIOH[3]107

VCC

110

8

GPIOF[7]109GPIOF[6]110GPIOF[5]111GPIOF[4]112

CIRTX113CIRRX114

GPIOF[3]115GPIOF[2]116GPIOF[1]117GPIOF[0]118

VCC

111

9

VDD18 120

VSS 17

XTAL2 122XTAL1/CLKIN 123

VDDA18PLL 124VDDA33PLL 125

ATEST 126

RBIAS 127

VSS 11

VSS 128VSS 121VSS 87VSS 72

USBDP0 9USBDN0 10

USBDN1 12USBDP1 13

USBDP2 15USBDN2 16

USBDN3 18USBDP3 19

USBDP4 21USBDN4 22

PWRGD 7

OUT65 105

TEST_PIN 35

Y324MHZ_20PF_1BX24000BK1A~D

@12

R351 10K_0402_5%~D1 2

R44

10K_

0402

_5%

~D1

2

C37

10.

1U_0

402_

16V4

Z~D

1

2

R34 10K_0402_5%~D

1 2

R32 10K_0402_5%~D1 2

R356 10K_0402_5%~D1 2

C10233P_0402_50V8J~D

@

1 2

C33

00.

1U_0

402_

16V4

Z~D

1

2L33

BLM18PG181SN1_0603~D

1 2

C89 4.7U_0805_6.3V6K~D1 2C95 0.1U_0402_16V4Z~D1 2

C456

0.1U_0402_16V4Z~D

1

2

C363 4.7U_0805_6.3V6K~D

1 2

R45

10K_

0402

_5%

~D

@

12

C62

0.1U

_040

2_16

V4Z~

D

1

2

R31 10K_0402_5%~D1 2

C453

0.1U_0402_16V4Z~D

1

2

R637 0_0402_5%~D1 2

R640

100K_0402_5%~D

12

C409

4.7U

_080

5_6.

3V6K

~D

1

2

R638 0_0402_5%~D1 2

R93 0_0402_5%~D@

1 2

R84 10K_0402_5%~D

1 2

R362 10K_0402_5%~D1 2

C11433P_0402_50V8J~D

@

1 2

C33

50.

1U_0

402_

16V4

Z~D

1

2

R43

10K_

0402

_5%

~D

@ 12

C408

4.7U

_080

5_6.

3V6K

~D

1

2

R33 10K_0402_5%~D@ 1 2

C454

0.1U_0402_16V4Z~D

1

2

R641

100K_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ENAB_3VLAN

AUX_EN

Z401

1

Z400

8

Z400

9

Z401

0

SUS_ON_5V#

SUS_ON

RUN_ON_5V#

RUN_ENABLE

Z400

5

Z400

6

Z400

7

SUS_ON_5V#

SUS_ENABLE

RUN_ON_5V#

+5V_RUN +3.3V_RUN +1.8V_RUN

+3.3V_SRC+3.3V_SUS

+15V_SUS

+5V_ALW

+3.3V_RUN+3.3V_SRC

+1.8V_SUS

+1.8V_RUN

+PWR_SRC

+PWR_SRC

+5V_RUN

+5V_SUS

+1.5V_RUN

+0.9V_DDR_VTT +2.5V_RUN

+5V_ALW

+15V_SUS

+1.8V_SUS

SUS_ON<30,33,39>

RUN_ON<19,30,33,39,40,41,50>

AUX_EN<30,39>

ENAB_3VLAN <26>

RUN_ENABLE<39>

GFX_RUN_ON <50>

Title



POWER CONTROL




+3.3V_LAN power enable signal

Reserve for discharge path

For G72 GDDR3 Power

+1.8VRUN Source

3.3VRUN Turn ON Delay:Populate RC ComponantCPU VR Requirements: 5VRUNneed to be > 1.5Vlevel, before3.3VRUN canbe Switched ON.

+5VRUN Source

Run Planes Enable +3VRUN Source

+3.3V_SUS Source

Updated as COE A06

Maximum Rds for Q45, Q26,Q4should 15mohm

R107

200K_0402_5%~D2@

12

C66

310

U_0

805_

10V4

Z~D 1

2

R632

100K_0402_5%~D

2@1 2

C66

010

U_0

805_

10V4

Z~D 1

2

G

D

S

Q342N7002_SOT23~D

2

13

Q43SI4810DY_SO8~D

365

78

2

4

1

R569100K_0402_5%~D

12

G

D

S

Q492N7002_SOT23~D

2

13

R46720K_0402_5%~D

12

G

D

S

Q22N7002_SOT23~D

@2

13

R56820K_0402_5%~D

12

G

D

S

Q522N7002_SOT23~D

2

13

R54030_0805_5%

@

12

G

D

S

Q402N7002_SOT23~D

21

3

R556100K_0402_5%~D

12

R56430_0805_5%

@

12

C54

710

U_0

805_

10V4

Z~D 1

2

D24

MMBD4148_SOT23~D

2@

1

3

2

C1540.047U_0402_16V4Z~D 2@

1

2

R520470K_0402_5%~D

12

R572100K_0402_5%~D

12

G

D

S

Q472N7002_SOT23~D

@2

13

R59730_0805_5%

12

R55830_0805_5%

@

12

Q26SI4810DY_SO8~D

365

78

2

4

1C685

4700

P_04

02_2

5V7K

~D

1

2

C708470P_0402_50V7K~D

1

2

G

D

S

Q462N7002_SOT23~D

2

13

G

D

S

Q442N7002_SOT23~D

@2

13

R5830_0805_5%

@

12

Q4SI4800DY-T1-E3_SO8~D

2@

365

78

2

4

1

G

D

S

Q422N7002_SOT23~D

@2

13

G

D

S

Q392N7002_SOT23~D

@2

13

R497100K_0402_5%~D

12

R13820K_0402_5%~D2@

12

G

D

S

Q412N7002_SOT23~D

2

13

R555100K_0402_5%~D

12

G

D

S

Q362N7002_SOT23~D

2

13

R56730_0805_5%

@

12

R631

200K_0402_5%~D

1 2

R44730_0805_5%

@

12

R55320K_0402_5%~D

12

D23

MMBD4148_SOT23~D

1

3

2G

D

S

Q252N7002_SOT23~D

@2

13

R501

200K_0402_5%~D

12

C15

910

U_0

805_

10V4

Z~D

2@

1

2

Q45SI4810DY_SO8~D

365

78

2

4

1

R513

100K_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RUN_ON

RUNPWROK

SUSPWROK

ICH_PWRGD#

RESET_OUT#ICH_PWRGD

IMVP_PWRGD

SUSPWROK_1P8V

5V_3V_1.8V_RUN_PWRGD

1.8V_ON

5V_3V_1.8V_RUN_PWRGD

+3.3V_SUS+3.3V_RUN

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS+3.3V_ALW

+1.8V_SUS+1.8V_RUN

RUNPWROK <30,31,42>

SUSPWROK <16,23>

RUN_ON<19,30,32,39,40,41,50>

RESET_OUT#<30>

IMVP_PWRGD<23,42>

ICH_PWRGD# <16>

ICH_PWRGD<10,23>

2.5V_RUN_PWRGD<16>

1.5V_RUN_PWRGD<40>

1.05V_RUN_PWRGD<40>

+0.9V_DDR_PWRGD<41>

GFX_PCIE_PWRGD<50>

GFX_CORE_PWRGD<50>

SUSPWROK_1P8V<41>

SUS_ON<30,32,39>

Title



POWER SEQUENCE




For Discrete Graphic Core VR

Not stuff R576 & R577 if page50 PR159 & PR160 arepopulated.

Change for Dell GG list request 12/13.

Or use N-FET (SOT23) 2N7002,RHU002N06,2N7000

R58

0

0_04

02_5

%~D1

2

G

D

S

Q102N7002_SOT23~D

2

13

R57

7

0_04

02_5

%~D

@

12

R57320K_0402_5%~D

12

U26B

74VHC08MTCX_NL_TSSOP14~D

IN14

IN25 OUT 6

P14

G7

R57

6

0_04

02_5

%~D

@

12

U26A


IN11

IN22 OUT 3

P14

G7

G

D

S

Q602N7002_SOT23~D

2@2

13

R57

9

0_04

02_5

%~D1

2

U27C

74LVC3G14DC_VSSOP8~D

P8

A3 Y 5

G4

EB

CQ48

PMBT3904_SOT23~D

2

31

C710

0.1U_0402_10V7K~D

2@ 1

2

EB

CQ61

PMBT3904_SOT23~D

2@2

31

R471100K_0402_5%~D

2@

12

C686

0.1U_0402_16V4Z~D

1 2

R57

8

0_04

02_5

%~D1

2

R232100K_0402_5%~D

12

R57110K_0402_5%~D

12

U26D


IN113

IN212 OUT 11

P14

G7

C691

0.1U_0402_16V4Z~D

1 20.01U_0402_25V7K~D

C681

1

2

R58

1

0_04

02_5

%~D1

2

U27B


P8

A6 Y 2

G4

R12910K_0402_5%~D2@

12

U26C


IN110

IN29 OUT 8

P14

G7

C684

0.1U_0402_10V7K~D

1

2

R574100K_0402_5%~D

12

U27A


P8

A1 Y 7

G4

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_TP_SIO

DAT_TP_SIO

KSO4

KSO14

KSO5

KSO2

KSO12

KSO15

KSO7

KSO11

KSO6

KSO10

KSO13

KSO0

KSO16

KSO8

KSO3

KSO17

KSO9

KSO1

TP_DATA

TP_CLK

KSI7

KSI4

KSI1

KSI6KSI5

KSI0

KSI2KSI3

TP_CLKTP_DATA

KSO17

KSI3KSI4

KSI0KSI1KSI2

KSI5KSI6

M_LED_ATOUCH_PAD_LED#

KSO1

KSO7

KSO0

KSO8

KSO2

KSO6

KSO3

KSI4KSI6

KSO5

KSI3

KSI7

KSI1

KSI0

KSO4

KSO10

KSO14

KSO12

KSO13

KSI5KSI2

KSO15

KSO9

KSO16

KSO11

LOW_LIGHT

TOUCH_PAD_LED#

+5V_RUN

+5V_RUN+5V_RUN

+5V_RUN

KSI[0..7]<30>

DAT_TP_SIO<30>

CLK_TP_SIO<30>

KSO[0..17]<30>

M_LED_A<31>TOUCH_PAD_LED#<31>LOW_LIGHT<31>

Title



INT KB/Touch Pad/Media CONN




T/P & Media CONN.

M_LED_A

TOUCH_PAD_LED#LOW_LIGHT SignalsHigh bright for Media LED

Low bright for Media LED/Touch PAD LED

Description

High bright for Touch PAD LED

LED ControlStatus

OFF

LOW

HIGH H H

L H

L L

Add a 10K pull-up to +5V_RUN from bits issue list: WI52078

C666

100P_0402_50V8J~D

1

2

C675

100P_0402_50V8J~D

1

2

C676

100P_0402_50V8J~D

1

2

C647

100P_0402_50V8J~D

1

2

C671

100P_0402_50V8J~D

1

2

C652

100P_0402_50V8J~D

1

2

C664

100P_0402_50V8J~D

1

2

JTP1

JST_BM20B-SRDS-G-TFC(LF)(SN)~D

113355779911111313151517171919

GND121

2 24 46 68 8

10 1012 1214 1416 1618 1820 20

GND2 22

C653

100P_0402_50V8J~D1

2

C650

100P_0402_50V8J~D

1

2

C656

100P_0402_50V8J~D

1

2

C232

0.1U_0402_16V4Z~D

1

2

C651

100P_0402_50V8J~D

1

2

R64510K_0402_5%~D

12

R551

4.7K_0402_5%

~D

12

C627

10P_0402_50V8J~D

1

2

C646

100P_0402_50V8J~D

1

2

C667

100P_0402_50V8J~D

1

2

R543

4.7K_0402_5%

~D

12

C662

100P_0402_50V8J~D

1

2

C665

100P_0402_50V8J~D

1

2

C672

100P_0402_50V8J~D

1

2

C649

100P_0402_50V8J~D

1

2

JKYBD1

JAE_FK2S030W12~D11

33

55

77

1111

99

1313

1515

1717

1919

2121

2323

2525

NC 27

NC 29

22

44

66

88

1010

1212

1414

1616

1818

2020

2222

2424

NC 26

NC 28

NC 30

GND 31GND 32

NC 33NC 34

C636

10P_0402_50V8J~D

1

2

C670

100P_0402_50V8J~D

1

2

L51BLM11A601S_0603~D

1 2

C225

0.1U_0402_16V4Z~D

1

2

C668

100P_0402_50V8J~D

1

2

C648

100P_0402_50V8J~D

1

2

C655

100P_0402_50V8J~D

1

2

C674

100P_0402_50V8J~D

1

2

C654

100P_0402_50V8J~D

1

2

C657

100P_0402_50V8J~D

1

2

C634

10P_0402_50V8J~D

1

2

L52BLM11A601S_0603~D

1 2

C669

100P_0402_50V8J~D

1

2

C631

10P_0402_50V8J~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SNIFFER_PWR_SW#

POWER_SW#

LED_WLAN#

R_LED_WLAN LED_WLAN

SATA_ACT#_R

LED_WLAN

BAT1_LED#

CAM_IMG_CAPTURE#

INSTANT_POWER_SW#

UIM_VPP

UIM_DATA

SCRL_LED#NUM_LED#

BREATH_LED

UIM_RESETUIM_CLK

BAT2_LED#

POWER_SW_R#

+SIM_PWR

CAP_LED#

LID_CL#

BT_ACTIVE_R

SNIFFER_LED_OFF#

BT_ACTIVE_R

SNIFFER_G

SNIFFER_Y

SNIFFER_GREEN#

SNIFFER_YELLOW#

SNIFFER_LED_OFF#

+3.3V_RUN

+3.3V_RUN

+3.3V_ALW

+3.3V_SW_RUN

+SIM_PWR

+3.3V_SUS

+3.3V_SUS

+3.3V_SW_RUN+3.3V_RUN

SNIFFER_PWR_SW#<30>

SNIFFER_WIRELESS_ON/OFF#<31>POWER_SW# <16,30>

LED_WLAN#<29>

UIM_VPP <29>

NUM_LED#<30>

UIM_CLK<29>

CAP_LED#<30> CAM_IMG_CAPTURE# <31>BREATH_LED<30>

UIM_DATA<29>

SCRL_LED#<30>BAT1_LED#<30>

LID_CL# <30>SATA_ACT#_R <22>

UIM_RESET<29>

BAT2_LED#<30>

INSTANT_POWER_SW# <30>

SNIFFER_LED_OFF#<22,30>

BT_ACTIVE<25,29>

SW_LED <31>

SNIFFER_GREEN#<16>

SNIFFER_YELLOW#<16>

Title



SW LED/B & ME & spare parts




Fiducial Mark

PCB Fiducial Mark (FIDUCIAL)

PCB Fiducial Mark (SMD40M80)

Screw

POWER Button CONN.

VGA stand-Off

Updated as COE A06

FD18

FIDUCIAL MARK~D

1

H4H_O276X236D157X118

1FD14

FIDUCIAL MARK~D

1

Reve

rse

off

JSNIFF1

1BS008-13130-042-7F_4P~D

11

22

33

44

FD19

FIDUCIAL MARK~D

1

FD24

FIDUCIAL MARK~D

1

H19H_C276D110

1

R16220_0402_5%~D

1 2

R626

10K_0402_5%~D

1 2

Q62DDTA114EUA-7-F_SOT323~D

2

13

Q29

DDTA114EUA-7-F_SOT323~D

2

13

Q33

DDTA114EUA-7-F_SOT323~D

2

13

H16H_C276D110

1

FD12

FIDUCIAL MARK~D

1

FD17

FIDUCIAL MARK~D

1

H9C315D91

1

FD5

FIDUCIAL MARK~D

1

FD25

FIDUCIAL MARK~D

1

H15H_C315D110

1

FD7

FIDUCIAL MARK~D

1

H1H_C276D110

1

R479220_0402_5%~D

1 2

H3H_C217D118

1

FD3

FIDUCIAL MARK~D

1

FD10

FIDUCIAL MARK~D

1

FD2

FIDUCIAL MARK~D

1

FD23

FIDUCIAL MARK~D

1FD21

FIDUCIAL MARK~D

1

FD11

FIDUCIAL MARK~D

1FD8

FIDUCIAL MARK~D

1

FD20

FIDUCIAL MARK~D

1

R478220_0402_5%~D

1 2

H7H_C217D43

1

FD6

FIDUCIAL MARK~D

1

H17H_C276D110

1

H8H_C315D102x91

1

C

BE

Q59MMBT3906WT1G_SC70-3~D

1

2

3

FD13

FIDUCIAL MARK~D

1

H10H_C236D110

1

FD1

FIDUCIAL MARK~D

1

Y

G

D13

12-22AUYSYGC/530-A2/TR8_G/Y~D

3

21

JSW1

TYCO_1775876-1~D

11 2 233 4 455 6 677 8 899 10 1011111313 12 12

14 1415151717191921212323

16 1618 1820 2022 2224 24

R237100_0402_5%~D

1 2

FD4

FIDUCIAL MARK~D

1

H13H_C315D102x91

1H2

H_C276D110

1

H6H_C276D110

1

H12H_C315D102x91

1

H5H_C276D110

1

G

D

S

Q632N7002_SOT23~D

2

13

H18H_C276D110

1

FD9

FIDUCIAL MARK~D

1

FD15

FIDUCIAL MARK~D

1

H11H_C276D110

1

H14H_C217D43

1

Q1DDTA114EUA-7-F_SOT323~D2

13

R465100K_0402_5%~D

12

FD16

FIDUCIAL MARK~D

1

FD26

FIDUCIAL MARK~D

1

FD22

FIDUCIAL MARK~D

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IDE_DD[0..15]

IDE_DD6

IDE_DD9

IDE_DD4

IDE_DD8IDE_DD1

IDE_DD3

IDE_DD2

IDE_DD0IDE_DD15

IDE_DD12

IDE_DD13IDE_DD14

IDE_DD11IDE_DD10IDE_DD7IDE_DD5

+1.5V_RUN

+3.3V_RUN +3.3V_RUN

+5V_SUS

+15V_SUS

+3.3V_SUS

+5V_SUS

+5V_RUN

IDE_DD[0..15] <22>

PCIE_RX4+<23>PCIE_RX4-<23>

PCIE_TX4+<23>PCIE_TX4-<23>

USBP3-<23>USBP3+<23>

SATA_TX0-<22>

SATA_RX0-<22>SATA_RX0+<22>

SATA_TX0+<22>

SATA_TX2-<22>SATA_TX2+<22>

SATA_RX2-<22>SATA_RX2+<22>

CARD_CLK_REQ#<6>CPPE#<31>PLTRST_EXP#<21>

EXPRCRD_STBY#<31>HDDC_EN#<23,31>

INT_SPK_L2 <19>

INT_SPK_R2 <19>INT_SPK_L1 <19>

ICH_SMBDATA<6,23,29>ICH_SMBCLK<6,23,29>

PCIE_WAKE#<29,31>

SC_DET#<31> AUDIO_AVDD_ON <31>

ICH_AZ_MDC_SYNC <22>ICH_AZ_MDC_RST# <22>

ICH_AZ_MDC_SDIN1 <22>ICH_AZ_MDC_SDOUT <22>MDC_RST_DIS# <31>

ICH_AZ_MDC_BITCLK <22>ICH_AZ_CODEC_SDIN0 <22>ICH_AZ_CODEC_RST# <22>

ICH_AZ_CODEC_BITCLK <22>ICH_AZ_CODEC_SDOUT <22>ICH_AZ_CODEC_SYNC <22>

SPDIF <20>NB_MUTE <31>

SPKR <23>BEEP <31>

IDE_DIOR# <22>IDE_DDREQ <22>

IDE_DCS3# <22>

IDE_DCS1# <22>IDE_DIOW# <22>IDE_DDACK# <22>IDE_IRQ <22>IDE_DIORDY <22>

IDE_DA2 <22>IDE_DA1 <22>IDE_DA0 <22>

INT_SPK_R1 <19>

MODC_EN# <23,31>

CLK_PCIE_EXPCARD <6>CLK_PCIE_EXPCARD# <6>

IDE_RST_MOD<23>

MIC_SWITCH <31>

Title



I/O BOARD DOCKING




CD-ROM IDE BUS

MDC

SPEAKEREXPRESS CARD

AC 97

SATA HDD

shielding

JIO1

FOX_QT00120A-1120-9F~D

GND 13 35 57 79 9

11 1113 1315 1517 1719 1921 21

GND 2325 2527 2729 2931 3133 3335 3537 3739 3941 4143 4345 45

GND 4749 4951 5153 5355 5557 5759 5961 6163 6365 6567 6769 69

GND 7173 7375 7577 7779 7981 8183 8385 8587 8789 8991 9193 93

GND 9597 9799 99

101 101103 103105 105107 107109 109111 111113 113115 115117 117

GND 119

GND24466881010121214141616181820202222GND2426262828303032323434363638384040424244444646GND4850505252545456565858606062626464666668687070GND7274747676787880808282848486868888909092929494GND969898100100102102104104106106108108110110112112114114116116118118GND120

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+DCIN_JACK

DOCK_PSID

PQ_G

PWR_ID

DOCK_PSID PS_ID

-DCIN_JACK

+DC_IN_SS

+PWR_SRC

+3.3V_RTC_LDO

+3.3V_ALW+5V_ALW

+5V_ALW+5V_ALW

+DC_IN

PS_ID <30>

PS_ID_DISABLE# <30>

AC_OFF<31>

Title

Size Document Number R ev

Date: Sheet o f

X02

+DCIN



AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS


NOTE: "THE POINT LOCATEDAT PS MODULE

THE POINT

+DC_IN Source

PS_ID Detector

3.3V RTC Power

Bali

GPIO Input from EC

PR

1047

K_0

402_

5%~D

12

PJP22

PAD-OPEN 4x4m

1 2

PC

30.

47U

_080

5_25

V7k

12

PR

824

0K_0

402_

5%~D

12

PQ36DTC115EUA_SC70

@2

13

MIC5235-3.3BM5_SOT23-5~D

PU1

IN1

GN

D2

OUT 5

NC 4EN3

PL2FBM-L11-453215-900LMAT_1812~D

1 2

PD

3SM

24_S

OT2

3

@

2 31

PD

2D

A20

4U_S

OT3

23~D

@

231

PR333_0402_5%~D 1 2

PC

60.

1U_0

603_

25V

7K~D

12

FOX_JPD113D-509-TR~DPJDC1

Low_PWR 1

DC+_1 2

DC+_2 3

DC-_1 4

DC-_2 5GND_16

GND_27

GND_38

GND_49

MH

1M

H2

PC

710

U_1

206_

25V

6M~D

1

2

PR

410

0K_0

402_

1%~D

12

PR180240K_0402_5%~D

@

12

PR

910

K_0

603_

5%

12

CB

E

PQ2PMBT3904_SOT23~D

2

31

PL3FBM-L11-453215-900LMAT_1812~D

1 2

PC

40.

01U

_040

2_25

V7K

~D

12

PR

510

K_0

402_

1%~D

12

PR20_0402_5%~D@1 2

PC

21U

_080

5_25

V4Z

~D

12

PR6100_0402_5%~D@

1 2

PC

50.

1U_0

603_

25V

7K~D

12

PJP21

PAD-OPEN 4x4m

1 2

PL1BLM11B102S 0603~D

12

G

D S

PQ1FDV301N_SOT23

2

1 3

PC

12.

2U_0

603_

6.3V

6K

12

G

D

S

PQ37SI2301BDS_SOT23~D

@ 2

13

PR

715

K_0

402_

1%~D

12

PC

80.

01U

_040

2_25

V7K

~D

@

12

PR

12.

21K

_040

2_1%

~D

12

PD

1D

A20

4U_S

OT3

23~D 23

1

PQ3FDS6679Z_SO8~D

3 65

78

2

4

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Z4304

+PBATT

Z4305

Z4307

Z4306

+3.3V_ALW

+3.3V_ALW+VCHGR

+PBATT

PBAT_SMBDAT <30,43>PBAT_PRES# <31>

PBAT_ALARM# <31>

PBAT_SMBCLK <30,43>

Title


Date: Sheet o f

X02

Battery Conn






SUYIN_200028MR009G502ZLTOP view

9

8

7

6

5

4

3

2

1

Battery Connector

ESD Diodes

Bali

PC

194

0.1U

_040

2_25

V4K~

D @

12

PJBAT1SUYIN_200028MR009G502ZL~D

BATT1+ 1

SMB_CLK 3SMB_DAT 4

BATT_PRES# 5SYSPRES# 6

BATT2- 9GND10GND11

BATT2+ 2

BATT_VOLT 7BATT1- 8

PD6DA204U_SOT323~D@

231PD4

DA204U_SOT323~D@

231 PD5

DA204U_SOT323~D@

231

PR

1110

K_04

02_1

%~D

12PC

90.

1U_0

603_

25V7

K~D

12

PC

1022

00P_

0402

_50V

7K~D

12

PR13100_0402_5%~D

1 2PR14

100_0402_5%~D

1 2 PR15100_0402_5%~D

1 2

PD7DA204U_SOT323~D@

231

PR12100_0402_5%~D

1 2

PC

193

2200

P_04

02_2

5V7K

@

12

PL5FBM-L11-453215-900LMAT_1812~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAX8734_V+

MAX8734_ON3MAX8734_ON5

MAX8734_BST3B MAX8734_BST5B

+VCC_MAX8734

MAX8734_DH3

MAX8734_FB5

MAX8734_LX3

MA

X87

34_S

HD

N#

MAX8734_FB3

MAX

1999

_SKI

P#

MAX8734_PRO#MAX8734_DL3

MAX8734_LX5

MAX8734_DH5

+DCDC_PWR_SRC

MAX8734_DL5

+15VS_L

MAX8734_PRO#

MAX8734_ILIM5

MAX8734_ILIM5

MAX8734_ILIM3

MAX8734_ILIM3

MAX8734_TON

MAX8734_TONMAX8734_REF

MAX8734_REF

+5V_SUSP

+5V_ALW

+PWR_SRC

+3.3V_SRCP

+VCC_MAX8734

+3.3V_SRCP

+3.3V_SRCP

+5V_SUS+5V_SUSP

+3.3V_SRC

+VCC_MAX8734

+VCC_MAX8734

+3.3V_ALW

+15V_SUSP

+15V_SUS+15V_SUSP

+3.3V_RTC_LDO

+3.3V_ALW

+3.3V_SRC

+5V_SUSP

MAX8734_DL

GNDA_SYS

GNDA_SYS

GNDA_SYS

GNDA_SYSGNDA_SYS

GNDA_SYS

GNDA_SYS

GNDA_SYS

GNDA_SYS

GNDA_SYS

+5V

_SU

SP

+5V

_ALW

SUSPWROK_5V <41>

SUS_ON<30,32,33>

RUN_ON <19,30,32,33,40,41,50>

THERM_STP# <16>

ALWON<30>

THERM_STP#<16>

SUS_ON<30,32,33>

AUX_EN<30,32>

RUN_ENABLE <32>

EC_PWM3_188Khz<30>

Title


Date: Sheet o f

X02

+3.3V/+5V



3.3 Volt +/-5%design current: 7AMax current: 9.9A Min OCP: 11.5A




Place these CAPsclose to FETs

DC +3V/ +5V/ +15V


Enable Skip Mode

L-S Rds-on (max)=5.9~7.25m ohms

L-S Rds-on= 16~20m ohm

5 Volt +/-5%design current: 4.1A peak current: 5.8A Min OCP: 5.9A

Bali

MAX8734 Current Limit Characteristics min typ max ToleranceVLIM=0.5V 40mV 50mV 60mV 20%VLIM=1.0V 93mV 100m 107mV 7%

+3.3VSRC OCP Ton=1/300k * Vo/Vin=0.578usToff=1/300k - 0.578us = 2.752usDeltaI=3.3V/2uH * 2.752us = 4.54AIimit=(VILM*0.1)/Rds(on)+1/2 DeltaIVILM=2*100/(100+97.6)=1.01V *0.1=101mVIC 7% tolerance (min 94mV)(Typ 101mV)(max 108mV)Iimit=(VILM)/Rds(on)+1/2 Delta IIimit Min=94mV/(7.25mOhm*1.4)+1/2 Delta I=11.5AIimit Typ=101mV/(5.9mOhm*1.4)+1/2 Delta I=14AIimit Max=108mV/(5.9mohm*1.4)+1/2 Delta I=15.3A

+5VSUSP OCP Ton=1/200k * Vo/Vin=1.316usToff=1/200k - 1.316us = 3.684usDeltaI=5V/4.7uH * 3.684us = 3.92AIimit=(VILM*0.1)/Rds(on)+1/2 DeltaIVILM=2*102/(102+84.5)=1.094V *0.1=109.4mVIC 7% tolerance (min 101.7mV)(Typ 109.4mV)(max 117mV)Iimit=(VILM)/Rds(on)+1/2 Delta IIimit Min=101.7mV/(20mOhm*1.4)+1/2 Delta I=5.86AIimit Typ=109.4mV/(16mOhm*1.4)+1/2 Delta I=6.8AIimit Max=117mV/(16mohm*1.4)+1/2 Delta I=7.2A

Output Caps ESR= 25// 25=12.5 m ohms

Reference COE system power Rev A 04

Unpop 15V charger bump

PQ

6S

I480

0BD

Y-T

1_S

O8~

D

365 7 8

2

4

1

PC

3010

U_1

206_

10V

4Z

12

PC

185

1U_0

603_

25V6

K

@

12

PR

205

0_04

02_5

%~D

@

12

PR

2997

.6K

_060

3_1%

12

PJP1PAD-OPEN 4x4m1 2

PC

204.

7U_1

206_

10V

7K~D

12

PR

380_

0402

_5%

~D1

2

PC

214.

7U_1

206_

25V

6K~D

@

12

PR272K_0402_1%~D

1 2

+

PC

2715

0U_D

2E_6

.3V

M_R

18

1

2

PR

350_

0402

_5%

~D 12

PC

190

0.47

U_0

603_

10V

7K~D

@12

PR410_0402_5%~D

1 2

PJP3

PAD-OPEN 4x4m

1 2

PC

1110

U_1

206_

25V

6M~D

1

2

PR

3610

2K_0

402_

1%

12

PC

181

2.2U

_120

6_25

V7M

~D

12

PR

3010

0K_0

402_

5%~D

@

12

PC

180

2.2U

_120

6_25

V7M

~D12

PJP2

PAD-OPEN 4x4m

1 2

PR

2884

.5K

_040

2_1%

12

PL23

4.7u_SIQHB1250-4R7PF_10A_20%

@1 2

G

D

S PQ9RHU002N06_SOT323@

2

13

PR

206

0_04

02_5

%~D

@

12

+

PC

183

150U

_D2E

_6.3

VM

_R18

1

2

PR17810K_0805_5%~D

12

PR

2610

0K_0

402_

1%~D

12

PC

160.

1U_0

603_

25V

7K~D

12

PR

390_

0402

_5%

~D

@

12

PR2090_0402_5%~D

@

1 2

PR

3224

0K_0

402_

5%~D

12

PR2107.5K_0402_5%~D

@

1 2

PC

187

1U_0

603_

25V6

K

@

12

+

PC

2515

0U_D

2E_6

.3V

M_R

18

1

2

PC

1710

U_1

206_

25V

6M~D

1

2

C

BE

PQ40MMBT2222ALT1G_SOT23

1

2

3

PJP18

PAD-OPEN 4x4m

1 2

PR330_0402_5%~D@

12

PD

19B

AT5

4S-2

-GP

@

231P

C19

1U_0

603_

10V

6K~D

12

PL72.0UH+-20%_HMP1340-2R0PF-12A~D

1 2

3

PC230.1U_0603_25V7K~D

1 2PL84.7U_STQB1250-4722PF-7A

14

32

PC1740.1U_0603_25V7K~D

12

PR

160_

1206

_5%

~D

12

PC

186

1U_0

603_

25V

6K

@

12

PC

3110

00P

_040

2_50

V7K~

D

@

12

PQ

8S

I481

0BD

Y_S

O8~

D

365 7 8

2

4

1

PC

184

1U_0

603_

25V6

K

@

12

PR1880_0603_5%~D

12

PC

1522

00P

_040

2_50

V7K~

D

12

PU2

MAX8734AEEI+_QSOP28~D

SHDN6

BST328

DH326

LX327

DL324

OUT322

LX5 15

DL5 19

FB5 9PRO 10

ILIM5 11ILIM3 5REF 8

V+20

VCC17

LDO5 18

BST5 14

DH5 16

OUT5 21N.C. 1

TON 13GND 23

SK

IP12

LDO325

FB37

ON33ON54

PGOOD 2

PC

181U

_060

3_10

V6K

~D

12

PC

1210

U_1

206_

25V

6M~D

1

2P

C26

0.1U

_040

2_10

V7K

~D

12

PR1847_0603_5%~D

12

S

GD

PQ39

FDC655BN_NL_SSOT-6~D@

3

6 24

5 1

PR

179

0_08

05_5

%~D

@

12

PL6FBM-L11-453215-900LMAT_1812~D

1 2

PC

1422

00P

_040

2_50

V7K~

D

12

+

PC

182

150U

_D2E

_6.3

VM

_R18

1

2

PR200_0603_5%~D

1 2

PR

310_

0402

_5%

~D1

2

PR

1710

_120

6_5%

~D

@

12

PD

16E

C11

FS2_

SO

D10

6~D

21

PR

210_

0603

_5%

~D

@ 12

PU15

SN74LVC1G08_SC70-5~D

@

IN11

IN22 G3

O 4

P5

PC

220.

1U_0

603_

25V

7K~D

12

PC

291U

_060

3_10

V6K

~D

12

PR1770_0805_5%~D

1 2

PC240.1U_0603_25V7K~D

12

PQ5HAT2198R-EL-E_SO8~D

S3

D6

D5

D7

D8

S2

G 4

S1

PR340_0402_5%~D@

12

PR

230_

0402

_5%

~D

12

PR

3710

0K_0

402_

1%~D

12

PR190_0603_5%~D

1 2

PC

280.

1U_0

402_

10V

7K~D

12

PQ7

FDS

6676

AS

_SO

8~D

36 578

2

4

1

PD

17M

MB

Z524

5B_S

OT2

3~D

1

2 3

PC

130.

1U_0

603_

25V

7K~D

12

PU14TC7SH32FU_SSOP5~D

I02

I11O 4

P5

G3

PD

8R

B71

7F_S

OT3

23~D

2 31

PR

220_

0603

_5%

~D

@

12

PR401K_0402_1%~D

1 2

PD

18B

AT5

4S-2

-GP

@

231

PR

240_

0402

_5%

~D

12

PR207120_0402_5%~D

@12

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

ISL6227_PHASE1

ISL6227_LGATE2

ISL6227_ISEN2 ISL6227_ISEN1

ISL6227_OCSET1

ISL6227_LGATE1

ISL6227_EN2

ISL6227_UGATE1ISL6227_UGATE2

ISL6227_EN1

ISL6227_OCSET2

ISL6227_SOFT2 ISL6227_SOFT1

ISL6227_BOOT2 ISL6227_BOOT1

ISL6227_VSEN1

ISL6227_BOOT2B ISL6227_BOOT1B

GNDA_DC2GND

ISL6227_VSEN2

+1.5V_1P05VP_PWRSRC

ISL6227_V

CC

ISL6227_PHASE2

+1.5V_RUNP

+5V_SUS

+1.5V_RUNP+VCCP_1P05VP

+VCCP_1P05VP +1.05V_VCCP

+1.5V_RUN

GNDA_DC2

GNDA_DC2

GNDA_DC2

GNDA_DC2 GNDA_DC2 GNDA_DC2 GNDA_DC2 GNDA_DC2

GNDA_DC2

GNDA_DC2

GNDA_DC2

+PWR_SRC

GNDA_DC2

1.05V_RUN_PWRGD <33>

RUN_ON<19,30,32,33,39,41,50>RUN_ON <19,30,32,33,39,41,50>

1.5V_RUN_PWRGD <33>

Title


Date: Sheet o f

X02

+1.5VRUNP /+VCCP_1P05VP



+1.5VRUNP / +VCCP_1P05VP




1.05 Volt +/-5%Thermal Design Current: 5.7AMaximum current: 8.1AOCP min: 8.8A, Max 19.1A

Place these CAPsclose to FETs Place these CAPs

close to FETs

L-S Rds-on=9m~11.5m ohmsOutput Caps ESR

= 9mohms

Output Caps ESR= 9//9mohms=4.5m ohm

Use PR48 and PR54for voltage margining

Use PR49 and PR55for voltage margining

PR53=0, PR61 Nopop, PWM/ HYSPR53 Nopop, PR61=0, froce PWM

PR52=0, PR60 Nopop, PWM/ HYSPR52 Nopop, PR60=0, froce PWM

1.5 Volt +/-5% Thermal Design Current: 4.7AMaximum current: 6.7A OCP min: 7.4A, max 14.4A

Bali

L-S Rds-on= 9m~11.5m ohm

Layut notes:Place PC43 need very close Pin1 of PU4, and Pin28 of PU4.Place PR63 need very close Pin1 of PU4.Minimize loop including PQ10, PQ13, PL10, PC49, PC52.Minimize loop including PQ11, PQ12, PL11, PC47, PC48, PC51.Route GNDA_DC2 using 25mil trace width.Minimize GNDA_DC2 trace length.Place PC46, PR48 and PR54 near Pin19 of PU4.Place PR61 and PR53 near Pin20 of PU4.Place PC50, PR49 and PR55 near Pin10 of PU4.Place PR52 and PR60 near Pin9 of PU4.Place PR56, PC54, PR57, PC53 near Pin 18, 17, 11, 12 of PU5.Place PR46, PR47 near Pin7, 22 of PU4.Place PR44, PC44 near Pin23, 25 of PU4.Place PR45, PC45 near Pin6, 4 of PU4.Route 1.05V Boot and 1.5V Boot using 25mil trace width and minimze length.Need large copper fill areas to PQ10, PQ11, PQ12 and PQ13 for thermal inprovment.Minize length of 1.5V phase node and 1.05V phase node.PC33, PC34,PC35 and PC36 need close Pin5, 6, 7, 8 of PQ10.PC37, PC38, PC39 and PC40 need close Pin5, 6, 7, 8 of PQ11.Route +1.5V_1P05VP_PWRSRC using 50 mil trace width and minimize length."Route VSEN1 and VSEN2 away from the inductor and switch node. Sense Vout directly at the output bulk capacitor"

Reference COE 1.05/1.5V ISL6227 Rev A04

COE A04: Unpop PD21, PC192 for sequencing requirements

PR

5712

4K_0

402_

1%~D

12

PC

440.

1U_0

603_

25V7

K~D

12

PR471.87K_0402_1%

1 2

PR

4819

.6K_

0402

_1%

~D

12

PR

581K

_040

2_1%

~D

12

PR

440_

0603

_5%

~D

12

PC

178

1000

P_04

02_5

0V7K

~D

12

PR

420_

0402

_5%

~D

12

+

PC

4933

0U_D

2E_2

.5VM

_R9~

D

1

2


PR

520_

0402

_5%

~D

12

PR

5428

.7K_

0603

_1%

~D

12

PC

188

2.2U

_080

5_10

V6K~

D

@

12


PC

3410

U_1

206_

25V6

M~D

1

2

PC

450.

1U_0

603_

25V7

K~D

12

PC

179

1000

P_04

02_5

0V7K

~D

12


+

PC

4733

0U_D

2E_2

.5VM

_R9~

D

1

2

PR63

0_0603_5%~D

12

PC

3722

00P_

0402

_50V

7K~D

12

PL9FBM-L11-453215-900LMAT_1812~D 1 2

PC

500.

01U

_040

2_25

V7K~

D

12

PC

411U

_060

3_10

V6K~

D

12

PL103.8UH_SIL1045K-3R8_8A

1 2

PC

4633

0P_0

402_

50V7

K~D

12

PC

350.

1U_0

603_

25V7

K~D

12

PL111.5uH_SIL104-1R5F_10A_30%~D

1 2

PC

192

0.47

U_0

603_

16V7

K1

2

PQ13

FDS

6670

AS

_SO

8~D

36 578

2

4

1

PC

5210

U_0

805_

6.3V

5K~D

@

12

PR

5530

.1K

_060

3_1%

~D

12

PD2121

PR

450_

0603

_5%

~D

12

PR

511K

_060

3_1%

~D

@

12

PR

600_

0402

_5%

~D

@

12

PC

5110

U_0

805_

6.3V

5K~D

@

12

PC

432.

2U_0

805_

10V6

K~D

12

ISL6227CA-T

PU4

ISL6227CA-T_SSOP28~D

GND 1

LGATE1 2

PGND1 3

PHASE1 4

UGATE1 5

BOOT1 6

ISEN1 7

EN1 8

VOUT1 9VSEN1 10

OCSET1 11

SOFT1 12

DDR 13VIN 14

PG1 15PG2/REF16

SOFT217

OCSET218

VSEN219VOUT220

EN221

ISEN222

BOOT223

UGATE224

PHASE225

PGND226

LGATE227

VCC28

PQ10

FDS

8880

_SO

8~D

36 578

2

4

1

PC

4010

U_1

206_

25V6

M~D

1

2

PC

530.

01U

_040

2_25

V7K~

D

12P

R53

0_04

02_5

%~D

12

PR

501K

_060

3_1%

~D

@

12

PR

610_

0402

_5%

~D

@ 12

+

PC

4833

0U_D

2E_2

.5VM

_R9~

D

1

2

PD9BAT54A-7-F_SOT23~L

32

1

PC

420.

01U

_040

2_25

V7K~

D

12


PR

5612

4K_0

402_

1%~D

12

PC

380.

1U_0

603_

25V7

K~D

12

PQ12

FDS

6670

AS

_SO

8~D

365 7 8

2

4

1

PC

3910

U_1

206_

25V6

M~D

1

2

PQ11

FDS

8880

_SO

8~D

365 7 8

2

4

1


PR

495.

11K_

0402

_1%

~D

12

PR

4310

_080

5_5%

~D

12

PC

3310

U_1

206_

25V6

M~D

1

2

PR461.43K_0402_1%~D

1 2

PC

540.

01U

_040

2_25

V7K~

D

12

PC

3622

00P_

0402

_50V

7K~D

12

PR591K_0402_1%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAX8632_LX

MAX8632_DH

MAX8632_DL

MAX8632_ILIM

MAX8632_REF

+DDR_PWR_SRC

MAX8632_FB

MAX8632_REFIN

MAX8632_STBY

MA

X86

32_A

VDD

SUSPWROK_5V

MAX

8632

_OVP

+1.8V_SUSP +1.8V_SUS

+0.9V_DDR_VTT+0.9V_DDR_VTTP

+5V_SUS

+DDR_PWR_SRC

+PWR_SRC

+3.3V_SUS

+0.9V_DDR_VTTP

+1.8V_SUSP

+1.8V_SUSP

+1.8V_SUSP

MAX8632_DL

+5V_ALW

GNDA_DDR

GNDA_DDR

GNDA_DDR GNDA_DDRGNDA_DDR

GNDA_DDR

MAX8632_AVDD

GNDA_DDR

SUSPWROK_5V <39>

SUSPWROK_1P8V <33>

+0.9V_DDR_PWRGD <33>

RUN_ON <19,30,32,33,39,40,50>


Title


Date: Sheet o f

X02

+1.8VSUSP/ +0.9V_DDR_VT




(10A,320mils ,Via NO.=20)

(2A,200mils ,Via NO.=4)

+1.8VSUSP/ +0.9V_DDR_VTTDDR2 Termination

0.9 Volt Design current 0.7APeak current 1A


1.8 Volt +/-5%Design Current: 10.2A Peak Current: 14.5A OCP min 15.7A

0.9 Volt VTTR current limit: +-32mA typ

L-S Rds-on =3.7(Typ)~4.8 (max) ohms

Output Caps ESR= 15mohms/ each

Bali

+1.8VSUS OCP

Toff=1/450k (1-1.8/19) = 2.22usDeltaI=1.8V/1.5uH * 2.22us = 2.66AIimit=(VILM*0.1)/Rds(on)+1/2 DeltaIVILM=2*100/(100+84.5)=1.08V *0.1=108mVIC 10% tolerance (min 97.2mV)(Typ 108mV)(max 118.8mV)Iimit=(VILM)/Rds(on)+1/2 Delta IIimit Min=97.2mV/(4.8mOhm*1.4)+1/2 Delta I=15.7A

duplicate pull up resistors on Page 33 R573 +3.3V_RUN for power good signal of +0.9V_DDR_PWRGD, Unpop PR68 from M00.

Ton open, f= 300KHz

Ton =Ref, f= 450KHz

Reference Coe Rev. A05

PC

601U

_060

3_10

V6K

~D

12

PC

650.

1U_0

402_

10V

7K~D

12

PC

5822

00P

_040

2_50

V7K~

D

12

PR69

1_0603_5%~D

1 2

PR7220_0603_1%~D

12

PC610.1U_0805_50V7M~D

12

PC

730.

22U

_060

3_10

V7M

~D

12

PJP14

PAD-OPEN 4x4m

1 2

PC

5510

U_1

206_

25V

6M~D

1

2P

R77

17.4

K_0

402_

1%~D

@

12


PR6410_1206_5%~D

12

PD

10R

B75

1V-4

0_S

OD

323~

D

21

PQ

15IR

F783

2_S

O8~

D

36 578

2

4

1

PC

7410

00P

_040

2_50

V7K~

D

12

+

PC

6233

0U_D

2E_2

.5V

M~D

1

2

PR

185

0_06

03_5

%~D

@

12 PR66

0_0402_5%~D@12

+

PC

6333

0U_D

2E_2

.5V

M~D

1

2

PR

184

0_06

03_5

%~D

1

2

PR

6810

0K_0

402_

1%~D

@ 12

PL131.5U+-20%_HMP1340-1R5PF-15A 2 1

3

PC

690.

1U_0

402_

10V

7K~D

12

PC

680.

1U_0

402_

10V

7K~D

12

PR1700_0402_5%~D

@

12


PR740_0402_5%~D

12

PQ

14IR

F782

1_S

O8~

D

36 578

2

4

1


PC

6410

U_0

805_

6.3V

5K~D

1

2

PC

7010

U_0

805_

6.3V

5K~D

1

2

PR1710_0402_5%~D

12

PR

7327

.4K

_060

3_1%

~D

@

12

PR650_0402_5%~D

12

PR

202

0_06

03_5

%~D

12

PR

7510

0K_0

402_

1%~D

12 P

C71

10U

_080

5_6.

3V5K

~D

1

2

PC

5610

U_1

206_

25V

6M~D

1

2 PC

570.

1U_0

603_

25V

7K~D

12

PU5

MAX8632ETI+_TQFN28~D

SK

IP25

VD

D22

PGND123

LX19

AV

DD

26

REF3

TON1

OV

P/ U

VP

2

SS

8

GN

D24

POK1 5

POK2 6

VTT 12

STBY 7

TP0

28

VOUT16 REFIN 14

FB15

VTTR 10

ILIM

4

PGND2 11

DH18

DL21

VTTS 9

SHDN 27

VIN 17BST20

VTTI 13

GN

D29

PC

751U

_060

3_10

V6K

~D

12

PR

7884

.5K

_040

2_1%

12

PR

6710

0K_0

402_

1%~D

12

PL12FBM-L11-453215-900LMAT_1812~D

1 2

PC

7210

U_0

805_

6.3V

5K~D

@

1

2P

C59

4.7U

_120

6_10

V7K

~D

12

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

H H

G G

F F

E E

D D

C C

B B

A A

AD3419_BST1

ADP3207_PWM1

ADP3207_PWM2

AD3419_BST2

ADP3207_#DCM

AD

P32

07_C

SS

UM

AD

P32

07_R

AM

PA

DJ

ADP3207_VRTT

AD

P32

07_V

CC

AD3419_DRVH1

AD3419_DRVL2

AD3419_DRVL1

AD

P32

07_T

TSEN

SE

AD3419_DRVL3

AD3419_BST3

AD3419_SW3

ADP3207_#OD

AD

P32

07_C

SR

EF

AD3419_DRVH2

AD3419_DRVH3

ADP3207_PWM3

AD3419_SW1

AD3419_SW2

CPU_PWR_SRC

CPU_PWR_SRC

CPU_PWR_SRC

+VCC_CORE

+VCC_CORE

+5V_RUN

+3.3V_RUN

+PWR_SRC

+5V_RUN

+5V_RUN

+5V_RUN

+VCC_CORE

+PWR_SRC

+VCC_CORE

+1.05V_VCCP

DPRSLPVR<10,23>

RUNPWROK<30,31,33>

IMVP6_PROCHOT# <31>

VSSSENSE <8>

H_DPRSTP#<7,22>H_PSI#<8>

VID2<8>

VID0<8>

VID3<8>VID4<8>VID5<8>VID6<8>

VID1<8>

CLK_ENABLE#<6>

IMVP_PWRGD<23,33>

VCCSENSE <8>

RUNPWROK<30,31,33>

Title


Date: Sheet o fBali X02

+VCORE



Place PH2 close to output inductor of phase 1.

Rdson_typ4.8mohms


Thermistor PH1 should be placed close to the hot spot of the VR

NOTE: ( Connection VCORE output Cap GND)De-populate PR245 and PR246 when CPU is present

NOTE:PR111 is reversed for loop gain measurement purpose

NOTE:Populate PR86 and de-pop PR88 for 3 phase, De-POP PR86 and populate PR88 for 2 phase.

IMVP-6 solution -For Merom: 3-phase: Thermal Design Current 35A / Iccmax 44A-For Yonah: 3-phase: Thermal Design Current 28.8A / Iccmax 36A

Rdson_typ4.8mohms

Reference COE Vcore Rev A 03

PC

864.

7U_0

805_

10V

6K

12

G

D

S

PQ182N7002_SOT23~D

@2

13

PR

116

0_06

03_5

%~D

12

PC

108

10U

_121

0_25

V6M

~D

12

PC934700P_0402_25V7K

1 2

PR86

0_0402_5%~D

12

PR

960_

0402

_5%

~D1

2

PR8310_0603_5%

12

PR1120_0603_5%~D

12

PR

810_

0603

_5%

~D

12

PC

111

1500

P_0

402_

50V7

K~D

12

PR92 0_0402_5%~D1 2

PR12093.1K_0603_1% 12

PR106 0_0402_5%~D

12

PC

100

470P

_060

3_50

V8J

~D

@

12

PL14FBM-L18-453215-900LMA90T_1812~D

12

PR

940_

0402

_5%

~D1

2

PR10228.7K_0603_1%~D

1 2

PD11RB751V-40_SOD323~D

12

PC

780.

33U

_060

3_10

V7K

12

PL150.45U_MPC1040LR45_27A_20%~D

1

3

4

2

PC9518P_0402_50V8K

12

PC

841U

_080

5_25

V4Z

~D

12

PC

110

1000

P_0

402_

50V7

K~D

12

PC

9847

0P_0

402_

50V7

K

12

PR115147K_0402_1%~D

1 2

PR122100_0603_5%~D

@

1 2

PR820_0402_5%~D

@ 12

PC

9210

U_1

210_

25V

6M~D

1

2

PC

830.

01U

_040

2_25

V7K

~D

@

12

PC

104

1000

P_0

402_

50V7

K~D

12

PR119100_0603_5%~D

@

1 2

PQ

19IR

F782

1_S

O8~

D

G2

D3

S1

+

PC

7622

0U_C

E-A

X_2

5V_M

~D

1

2

PC96220P_0402_50V8K

1 2

PC

870.

33U

_060

3_10

V7K

12

PR

110

56.2

K_0

402_

1%

12

PR

891.

91K

_060

3_1%

~D

12

PR

901.

91K

_060

3_1%

~D

12

PR12493.1K_0603_1% 12

PR181499_0402_1%

12

PC

8110

U_1

210_

25V6

M~D

1

2

PR

100

0_06

03_5

%~D

12

PC

9915

00P

_040

2_50

V7K~

D

12

PQ

22FD

S70

88S

N3_

SO

8~D

G2

D3

S1

PQ

16IR

F782

1_S

O8~

D

G2

D3

S1

PU6

ADP3419JRM_MSOP-10

IN1

SD#2

DRVLSD#3

CROWBAR4

VCC5 DRVL 6

GND 7

SW 8

DRVH 9

BST 10

PC

101

470P

_060

3_50

V8J

~D

12

PC

109

0.33

U_0

603_

10V

7K

12

PC

8922

00P

_040

2_50

V7K~

D

12

PC

8210

U_1

210_

25V6

M~D

1

2

PQ

20FD

S70

88S

N3_

SO

8~D

G2

D3

S1

PR11810_0402_1%~D

1 2

PU9

ADP3419JRM_MSOP-10

IN1

SD#2

DRVLSD#3

CROWBAR4

VCC5 DRVL 6

GND 7

SW 8

DRVH 9

BST 10

PR1011.65K_0402_1%

12

PR

111

154K

_060

3_1%

12

PR

930_

0402

_5%

~D1

2

PR91 0_0402_5%~D1 2

PQ

17FD

S70

88S

N3_

SO

8~D

G2

D3

S1

PH

222

0K_0

402_

5%_T

H11

-4H

104F

T1

2

PU8

ADP3419JRM_MSOP-10

IN1

SD#2

DRVLSD#3

CROWBAR4

VCC5 DRVL 6

GND 7

SW 8

DRVH 9

BST 10

PC

800.

1U_0

805_

25V

7K~D

12

PC881000P_0402_50V7K~D

1 2

PC

970.

012U

_040

2_16

V7K

~D

12

PC

774.

7U_0

805_

10V

6K

12

PR

113

71.5

K_0

402_

1%

12 PD13

RB751V-40_SOD323~D

12

PC94150P_0402_50V8J

12

PR

117

0_04

02_5

%~D

12

PR10410_0402_1%~D

1 2

PR12393.1K_0603_1% 12

PC

112

1000

P_0

402_

50V7

K~D

12

PQ

21IR

F782

1_S

O8~

D

G2

D3

S1

PC

103

4.7U

_080

5_10

V6K

12

PR105 0_0402_5%~D

12

PR98 0_0402_5%~D1 2 PD12

RB751V-40_SOD323~D

12

PR990_0402_5%~D

12

PC

900.

1U_0

805_

25V

7K~D

12

PC

102

1800

P_0

402_

50V7

K

12P

R10

916

0K_0

603_

1%

12

PC

107

10U

_121

0_25

V6M

~D

12

PL160.45U_MPC1040LR45_27A_20%~D

1

3

4

2

PH

110

0K_0

603_

5%_T

H11

-4H

104F

T

@

12

PU7

ADP3207JCP-RL_LFCSP-40

STSET9

SS8

EN1

PWRGD2

PGDELAY3

FBRTN5

CLKEN4

FB6

COMP7

ILIM

IT11

RR

PM

13

GN

D20

RT

14

RA

MP

AD

J15

LLS

ET

16

CS

RE

F17

CS

SU

M18

CS

CO

MP

19

PWM3 24

VR

PM

12

SW1 23

PWM2 25

PWM1 26

OD 27

DCM 28

VRTT 29

TTSENSE 30

PS

I32

DP

RS

TP33

VID

634

VID

535

VID

436

VID

337

VID

238

VID

040

VID

139

DPRSLP10

SW2 22

SW3 21

VC

C31

PC

105

2200

P_0

402_

50V7

K~D

12

PC

7922

00P

_040

2_50

V7K~

D

12

PR

807.

32K

_060

3_1% 1

2

PR

114

280K

_060

3_1%

12

PR880_0402_5%~D

@

12

PC

106

0.1U

_080

5_25

V7K

~D

12

PC

8515

00P

_040

2_50

V7K~

D

12

PC

9110

U_1

210_

25V

6M~D

1

2

PR

950_

0402

_5%

~D1

2

PR

970_

0402

_5%

~D1

2

PR103 0_0402_5%~D

12

PR8510_0402_1%~D

1 2

PL170.45U_MPC1040LR45_27A_20%~D

1

3

4

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAX8731_ACOK

MAX8731_IINP

MAX8731_CCV

MAX8731_CCI

MAX8731_CCS

MAX8731_REF

MAX

8731

_DAC

MAX

8731

_CSS

N

+VCHGR_L

MAX8731_CSIP

MAX8731_CSIN

MAX8731_LDO

MAX8731_DHI

MAX8731_VCC

MAX8731_ACINMAX8731_BSTB

MAX8731_LDO

MAX

8731

_CSS

P

N657586

GNDA_CHGRGND

ACAV_IN

MAX8731_REF

MAX

8731

_AC

SNS

MAX8731_SW

+DC_IN_SS

+PWR_SRC

+DC_IN_SS

+5V_ALW

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

+5V_ALW +3.3V_ALW

CHRG_IN

+5V_ALW

+5V_ALW

+VCHGR

+VCHGR

+DC_IN

+VCHGR

GNDA_CHGR

+5V_ALW

ACAV_IN<16,30>

PBAT_SMBCLK<30,38>

PBAT_SMBDAT<30,38>

ADAPT_OC <31>

ACAV_IN<16,30>

ADAPT_TRIP_SEL<31>

Title


Date: Sheet o f

X02

Charger





+DC_IN discharge pathSmart Charger


Bali

Reference COE charger Rev A 11

Adapter (W) Trip current (A) PR144 PR147 PR149 PR150 PR20165 3.17 4.32M 301K 56.2K 27.4K N/A90 4.43 976K 49.9K 13.3K 9.31K 38.3K

The charger UL design for UMA 65W adapter.Discrete 90w adapter need change;PR144 to 976K.PR147 to 49.9K.PR149 to 13.3K.PR150 to 9.31K.PR201 to 38.3K

Layout Notes:Minimize loop including PQ30,PL20,PR139,PC124,PC125,PC126,PC127.Place PC117,PC118,PC119 very close PQ30 pins 5,6,7,8.Place PC175 near Pin23.Place PC189 near Pin15.


PC

134

0.1U

_040

2_10

V7K~

D

12

PC1913300P_0402_50V7K

12

PR

132

365K

_040

2_1%

~D

12

PL19FBM-L11-453215-900LMAT_1812~D

1 2

PR

143

10K_

0402

_1%

~D

12

PC

118

10U

_120

6_25

V6M

~D

1

2

G

D

S

PQ27RHU002N06_SOT323

@2

13

PQ31

SI4

810B

DY

_SO

8~D

365 7 8

2

4

1

PQ26SI4835BDY_SO8~D

365

78

2

4

1

PR1360_0603_5%~D

1 2

PU10

MAX8731_TQFN28~D

DHI 24

CSIP 18

LX 23

FBSA 15

SDA9

IINP8

GN

D1

DCIN22

ACIN2

VDD11

SCL10

ACOK13

BATSEL14

BST 25

FBSB 16

CCS4

LDO 21

VCC 26

CSS

P28

CSIN 17

PGND 19

DLO 20

CCV6

CCI5

CSS

N27

REF3

DAC7

GND12

PC

142

100P

_040

2_50

V8K

12

PC

133

0.01

U_0

402_

25V7

K~D

12

PC

129

0.01

U_0

402_

25V7

K~D

12

PR

208

1K_0

603_

5%1

2


PQ23SI4835BDY-T1-E3 _SO8~D

3 65

78

2

4

1

PC

176

2200

P_04

02_5

0V7K

~D

@ 12

PQ30

SI4

800B

DY

-T1_

SO8~

D

365 7 8

2

4

1

PR130100K_0402_1%~D

12

PC

131

1U_0

603_

10V6

K~D

12

G

D

S

PQ322N7002_SOT23~D

2

13

PR1390.01_2512_1%~D

4

2

1

3

PC

132

0.1U

_040

2_10

V7K~

D

12

PC

113

10U

_120

6_25

V6M

~D

1

2

PC

130

0.01

U_0

402_

25V7

K~D

12

PR13549.9K_0402_1%~D

12

PR1480_0402_5%~D 1 2

PC

117

0.1U

_080

5_50

V7M

~D

12

PC

189

0.01

U_0

603_

25V

@

12

PR12910K_0402_1%~D

12

PR

146

100K

_040

2_5%

~D1

2

PC1151U_0603_10V6K~D

1 2

PR

199

100_

0402

_5%

~D 12

PC

139

100P

_040

2_50

V8K

12

PR1370_0402_5%~D

1 2

PD

14R

B75

1V-4

0_SO

D32

3~D

21

PC1220.1U_0402_10V7K~D

12

PC

137

10P

_040

2_50

V8J~

D@

12

PC1231U_0603_10V6K~D

1 2

PD20

21

PR

140

4.7K

_040

2_5%

~D

12

PL20

8.2U_HMU1356-8R2_5.8A_20%~D

1 2

PC

126

10U

_120

6_25

V6M

~D

1

2

PR

126

10K_

0402

_1%

~D

@

12

PU12BLM393DR_SO8~D

IN+5

IN-6 O 7

P8

G4

PC

177

0.1U

_080

5_50

V7M

~D

@ 12

PC

121

0.1U

_060

3_25

V7K~

D

12

PR1250.01_2512_1%~D

4

2

1

3

PR

138

33_0

603_

1%~D

12

PR

127

470K

_040

2_5%

~D

12

PR13315.8K_0402_1%~D

12

PC

141

0.01

U_0

402_

25V8

K1

2

PR13410K_0402_1%~D

1 2

PC

124

0.1U

_080

5_50

V7M

~D

12

PC1141U_0805_25V4Z~D

12

PU12ALM393DR_SO8~D

IN+3

IN-2O 1

P8

G4

PR

145

100K

_040

2_1%

~D 12

PR

147

301K

_040

2_1% 1

2

PR1730_0402_5%~D

@12

PR174

1_0603_1%~D

1 2

PC

119

10U

_120

6_25

V6M

~D

1

2

PC

116

2200

P_04

02_5

0V7K

~D

12

PR142

0_0603_5%~D

12

PC175220P_0402_50V7K~D

12

G

D

S

PQ28RHU002N06_SOT323

2

13

PR

150

27.4

K_04

02_1

% 1

2

PC

140

100P

_040

2_50

V8K

12

PC1200.01U_0402_25V7K~D

12

PR1444.32M_0402_1% 1 2

PR1720_0402_5%~D

12

PR20138.3K_0402_1%~D

@

1 2

PR

149

56.2

K_04

02_1

% 1

2

PC

127

10U

_120

6_25

V6M

~D

@

1

2

PC

125

10U

_120

6_25

V6M

~D

1

2

PC

138

0.01

U_0

402_

25V8

K1

2

PC

143

0.01

U_0

402_

25V8

K1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEG_MTX_GRX_N[0:15]

PEG_MTX_GRX_P[0:15]

PEG_MRX_GTX_P[0:15]

PEG_MRX_GTX_N[0:15]LDDC_CLK_VGA

LDDC_DATA_VGA

PEG_MTX_GRX_N0

PEG_MRX_GTX_C_N0PEG_MRX_GTX_C_P0

PEG_MTX_GRX_N1

PEG_MTX_GRX_N2

PEG_MTX_GRX_P1

PEG_MTX_GRX_P2

PEG_MTX_GRX_N4


PEG_MTX_GRX_P4

PEG_MTX_GRX_N6


PEG_MTX_GRX_P6

PEG_MTX_GRX_N8


PEG_MTX_GRX_P8

PEG_MTX_GRX_N10


PEG_MTX_GRX_P10

PEG_MTX_GRX_N12


PEG_MTX_GRX_P12

PEG_MTX_GRX_N14


PEG_MTX_GRX_P14

PEG_MTX_GRX_P15

PEG_MTX_GRX_P0

PEG_MTX_GRX_N15

PEG_MRX_GTX_C_P0PEG_MRX_GTX_C_N0

PEG_MRX_GTX_P0PEG_MRX_GTX_N0

PEG_MRX_GTX_N1PEG_MRX_GTX_P1












PEG_MRX_GTX_N13



PEG_MRX_GTX_P13
















PEG_MRX_GTX_C_N1PEG_MRX_GTX_C_P1

PEG_MRX_GTX_C_N3PEG_MRX_GTX_C_P3PEG_MRX_GTX_C_N2PEG_MRX_GTX_C_P2







CLK_PCIE_VGA#CLK_PCIE_VGA

XTALOUTBUFF

VSYNC_VGAHSYNC_VGA

BLU_VGAGRN_VGA

RED_VGA

DACAVREF

TV_Y_VGATV_CVBS_VGA

VGADDCDATVGADDCCLK

LDDC_CLK_VGALDDC_DATA_VGA

DACBVREF

TV_C_VGA

DACB_RSET

CLK_DDC2_VGA

RAM_CFG0RAM_CFG1

RAM_CFG2RAM_CFG3

DEVID3

ENVDD_VGAPANEL_BKEN_VGA

I2CB_SCL

I2CB_SDA

XTALOUT

BIA_PWM_VGA

DEVID2DEVID0DEVID1

XTALSSIN_R

XTALIN_RXTALIN

I2CB_SCLI2CB_SDA

GFX_CORE_CNTRL

VGADDCCLK VGADDCDATDAT_DDC2_VGA

GPIO1_SW_VREF

THERMTRIP_VGA#

PLTRST_DELAY#

YPRPB_DET#+3.3V_RUN

+3.3V_RUN+3.3V_RUN

PEG_MTX_GRX_P[0:15]<12>

PEG_MTX_GRX_N[0:15]<12>

PEG_MRX_GTX_P[0:15]<12>

PEG_MRX_GTX_N[0:15]<12>

CLK_PCIE_VGA#<6>CLK_PCIE_VGA<6>

HSYNC_VGA <20>VSYNC_VGA <20>RED_VGA <20>BLU_VGA <20>GRN_VGA <20>

TV_C_VGA <20>TV_CVBS_VGA <20>TV_Y_VGA <20>

LDDC_CLK_VGA <19>LDDC_DATA_VGA <19>

DAT_DDC2_VGA<20>CLK_DDC2_VGA<20>

RAM_CFG0 <49>RAM_CFG1 <49>

RAM_CFG2 <49>RAM_CFG3 <49>

DEVID3 <49>

XTALOUTBUFF<49>

XTALSSIN<49>

ENVDD_VGA <19>PANEL_BKEN_VGA <19>

BIA_PWM_VGA <19>

DEVID0 <49>DEVID1 <49>

DEVID2 <49>

XTALSSIN_CLK_GEN<6>

XTALIN_CLK_GEN<6>

GFX_CORE_CNTRL <50>

GPIO1_SW_VREF <45,48>

THERMTRIP_VGA# <16>

PLTRST_DELAY#<23>

YPRPB_DET# <20>

Title



NVG72 PCIE,GPIO,CLK





<---DVI

<---LVDS

<---CRT

<---CRT

NVIDIA Johnson's recommendfrom 0715 mail

Stuff R74,R76 and No stuffR75,R77 for clock Gen 27MHz

R376470K_0402_5%~D

2@

12

C5050.1U_0402_10V7K~D

2@12

C4330.1U_0402_10V7K~D 2@ 12

C4520.1U_0402_10V7K~D 2@ 12

R78

10K_0402_5%~D

2@1 2

R348 2.2K_0402_5%~D 2@1 2

C3820.1U_0402_10V7K~D

2@12

C5518P_0402_50V8J~D

@12

R614

10K_0402_5%~D

2@12

C4950.1U_0402_10V7K~D 2@ 12

R770_0402_5%~D

@1 2

R74

0_0402_5%~D

2@1 2

Y1

27MHz_16PF_6P27000126~D

@

OUT 3

GND 2

GND4

IN1

R69 124_0402_1%~D 2@1 2

C3280.1U_0402_10V7K~D

[email protected]_0402_10V7K~D 2@ 12

C3270.1U_0402_10V7K~D 2@ 12

C4640.1U_0402_10V7K~D

2@12

R75

0_0402_5%~D

@1 2

C3130.1U_0402_10V7K~D

2@12

C3180.1U_0402_10V7K~D

2@12

C3570.1U_0402_10V7K~D 2@ 12

R42410K_0402_5%~D 2@

12

C3970.1U_0402_10V7K~D

2@12

R613

10K_0402_5%~D

2@

12

R83 2.2K_0402_5%~D 2@1 2

R6300_0402_5%~D

2@1 2

C3440.1U_0402_10V7K~D 2@ 12

R6290_0402_5%~D

@

1 2

R6340_0402_5%~D

1 2

C3360.1U_0402_10V7K~D

2@12

C3680.1U_0402_10V7K~D 2@ 12

C4940.1U_0402_10V7K~D

2@12

C2910.1U_0402_10V7K~D 2@ 12

R87 2.2K_0402_5%~D 2@1 2

C4310.1U_0402_10V7K~D

2@12 C57 0.01U_0402_16V7K~D 2@1 2

R85 2.2K_0402_5%~D 2@1 2

C3620.1U_0402_10V7K~D

2@12

C4000.1U_0402_10V7K~D 2@ 12

C4870.1U_0402_10V7K~D 2@ 12C319 0.01U_0402_16V7K~D 2@1 2

C3550.1U_0402_10V7K~D

2@12

C3080.1U_0402_10V7K~D 2@ 12

C4670.1U_0402_10V7K~D 2@ 12

R760_0402_5%~D

2@1 2

C4450.1U_0402_10V7K~D

2@12

C3880.1U_0402_10V7K~D 2@ 12

C54

18P_0402_50V8J~D

@

1

2

G

D S

Q232N7002W-7-F_SOT323~D

2@

2

1 3

C4140.1U_0402_10V7K~D

2@12

DVO

/ G

PIO

PCI E

XPR

ESS

TESTCL

K

Part 1 of 5

DACs

I2C

U8A

G72-N-A1_BGA533~D2@

PEX_RX0AF1PEX_RX0_NAG2PEX_RX1AG3PEX_RX1_NAG4PEX_RX2AF4PEX_RX2_NAF5PEX_RX3AG6PEX_RX3_NAG7PEX_RX4AF7PEX_RX4_NAF8PEX_RX5AG9PEX_RX5_NAG10PEX_RX6AF10PEX_RX6_NAF11PEX_RX7AG12PEX_RX7_NAG13PEX_RX8AG15PEX_RX8_NAG16PEX_RX9AF16PEX_RX9_NAF17PEX_RX10AG18PEX_RX10_NAG19PEX_RX11AF19PEX_RX11_NAF20PEX_RX12AG21PEX_RX12_NAG22PEX_RX13AF22PEX_RX13_NAF23PEX_RX14AG24PEX_RX14_NAG25PEX_RX15AG26PEX_RX15_NAF27

PEX_TX0AD5PEX_TX0_NAD6PEX_TX1AE6PEX_TX1_NAE7PEX_TX2AD7PEX_TX2_NAC7PEX_TX3AE9PEX_TX3_NAE10PEX_TX4AD10PEX_TX4_NAC10PEX_TX5AE12PEX_TX5_NAE13PEX_TX6AD13PEX_TX6_NAC13PEX_TX7AC15PEX_TX7_NAD15PEX_TX8AE15PEX_TX8_NAE16PEX_TX9AC18PEX_TX9_NAD18PEX_TX10AE18PEX_TX10_NAE19PEX_TX11AC21PEX_TX11_NAD21PEX_TX12AE21PEX_TX12_NAE22PEX_TX13AD22PEX_TX13_NAD23PEX_TX14AF25PEX_TX14_NAE25PEX_TX15AE24PEX_TX15_NAD24

PEX_REFCLKAE3PEX_REFCLK_NAE4

PEX_RST_NAC6

XTALINB1

XTALOUTC2

XTALOUTBUFFC3

XTALSSINC1

GPIO0 A9GPIO1 D9GPIO2 A10GPIO3 B10GPIO4 C10GPIO5 C12GPIO6 B12GPIO7 A12GPIO8 A13GPIO9 B13

GPIO10 B15GPIO11 A15GPIO12 B16

MIOBD0 G2MIOBD1 G3MIOBD2 J2MIOBD3 J1MIOBD4 K4MIOBD5 K1MIOBD6 M2MIOBD7 M1MIOBD8 N1MIOBD9 N2

MIOBD10 N3MIOBD11 R3

MIOB_HSYNC G4MIOB_VSYNC F1

MIOB_DE G1MIOB_CTL3 F2

MIOB_CLKIN R2MIOB_CLKOUT K2

MIOB_CLKOUT_N K3

MIOB_VREF J4

DACA_HSYNC AD4DACA_VSYNC AC4

DACA_RED AE1DACA_BLUE AD2

DACA_GREEN AD1DACA_IDUMP U9DACA_RSET AD3

DACA_VREF AB4

DACB_RED F4DACB_BLUE D5

DACB_GREEN E4DACB_IDUMP L9DACB_RSET D6

DACB_VREF E7

I2CA_SCL D10I2CA_SDA E10I2CB_SCL F9I2CB_SDA F10I2CC_SCL E9I2CC_SDA D8I2CH_SCL C7I2CH_SDA B7

IFPAB_VPROBE N6IFPCD_VPROBE M5

JTAG_TCK AE27JTAG_TDI AD27

JTAG_TDO AE26JTAG_TMS AD26

JTAG_TRST_N AD25TESTMODE D7

PEX_TSTCLK_OUT AF13PEX_TSTCLK_OUT_N AF14

DACB_HSYNC E6DACB_VSYNC F5

R370470K_0402_5%~D

2@

12

G

D S

Q222N7002W-7-F_SOT323~D

2@

2

1 3

C3020.1U_0402_10V7K~D 2@ 12

R615

10K_0402_5%~D

@12

C4170.1U_0402_10V7K~D 2@ 12

R357 124_0402_1%~D 2@1 2

C2980.1U_0402_10V7K~D

2@12

C4800.1U_0402_10V7K~D

2@12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DQSA_WP4

FBAD0FBAD1FBAD2FBAD3

CLKA1CLKA1#

CLKA0#CLKA0

DQMA#4

DQMA#6

DQMA#[0:7]

DQSA_WP[0:7]

FBAA[0:11]

FBAD[0:63]

FBBA[2:5]

DQMA#3

DQMA#1

DQMA#5

DQSA_WP3

DQSA_WP1

DQSA_WP7
















LCD_A1-_VGA

LCD_A0+_VGALCD_A0-_VGALCD_A1+_VGA

LCD_ACLK+_VGALCD_ACLK-_VGA

LCD_A2-_VGALCD_A2+_VGA

PEX_PLL_EN_TERM100SUB_VENDOR

3GIO_ADR_0

3GIO_ADR_13GIO_ADR_2

DQSA_WP6

DQMA#0

DQMA#7

DQSA_WP5

DQSA_WP2

DQMA#2

DQSA_WP0

MIOA_HSYNC

VGA_THERMDN

VGA_THERMDP

FBBA3FBBA4

FBBA5

FBAA3

FBAA0

FBAA2

FBAA1

FBBA2

FBAA10

FBAA11

FBAA8

FBAA9FBAA6

FBACS1#

FBAA7

FBA_CKE

FBAA4

FBA_BA0

FBA_BA1

FBAWE#FBACAS#

FBACS0#

FBARAS#FBAA5

FBA_RST#

DQSA_RN2

DQSA_RN4

DQSA_RN6

DQSA_RN0

DQSA_RN3

DQSA_RN1

DQSA_RN7

DQSA_RN5

DQSA_RN[0:7]

FBA_VREF

GPU_SW_VREF

+3.3V_RUN

+1.8V_RUN

CLKA0 <48>CLKA0# <48>CLKA1 <48>CLKA1# <48>

FBAA[0:11] <48>

FBBA[2:5] <48>

FBAD[0:63] <48>

DQSA_WP[0:7] <48>

DQMA#[0:7] <48>

LCD_ACLK+_VGA<19>LCD_ACLK-_VGA<19>LCD_A0+_VGA<19>LCD_A0-_VGA<19>LCD_A1+_VGA<19>LCD_A1-_VGA<19>LCD_A2+_VGA<19>LCD_A2-_VGA<19>

VGA_THERMDN <16>

VGA_THERMDP <16>

PEX_PLL_EN_TERM100 <49>SUB_VENDOR <49>

3GIO_ADR_0 <49>

3GIO_ADR_1 <49>3GIO_ADR_2 <49>

FBACS1# <48>

FBA_BA0 <48>

FBA_CKE <48>

FBA_BA1 <48>

FBAWE# <48>FBACAS# <48>

FBACS0# <48>

FBARAS# <48>

FBA_RST# <48>

DQSA_RN[0:7] <48>

GPIO1_SW_VREF<44,48>

Title



NVG72 Memory Interface,LVDS



10mil10mil



Place cap close to U28(G72)

VGA_THERMDN, VGA_THERMDP routingtogether. Trace width / Spacing = 10 / 10 mil

VREF=1.26V=0.7 x VDDQ

VREF=VDDQ x Rb(Ra+Rb)

Ra

Rb

Calibration GDDR3

FB_CALx_PD_VDDQ

FB_CALx_PU_GND

FB_CALx_TERM_GND

VREF RATIO 0.7xFBVDDQ

60

60

40Stuff for G74

R394

511_0402_1%~D

2@ 12

MEM

OR

Y IN

TER

FAC

E

Part 2 of 5

U8B

G72-N-A1_BGA533~D2@

FBAD0A26FBAD1C24FBAD2B24FBAD3A24FBAD4C22FBAD5A25FBAD6B25FBAD7D23FBAD8G22FBAD9J23FBAD10E24FBAD11F23FBAD12J24FBAD13F24FBAD14G23FBAD15H24FBAD16D16FBAD17E16FBAD18D17FBAD19F18FBAD20E19FBAD21E18FBAD22D20FBAD23D19FBAD24A18FBAD25B18FBAD26A19FBAD27B19FBAD28D18FBAD29C19FBAD30C16FBAD31C18FBAD32N26FBAD33N25FBAD34R25FBAD35R26FBAD36R27FBAD37T25FBAD38T27FBAD39T26FBAD40AB23FBAD41Y24FBAD42AB24FBAD43AB22FBAD44AC24FBAD45AC22FBAD46AA23FBAD47AA22FBAD48T24FBAD49T23FBAD50R24FBAD51R23FBAD52R22FBAD53T22FBAD54N23FBAD55P24FBAD56AA24FBAD57AA27FBAD58AA26FBAD59AB25FBAD60AB26FBAD61AB27FBAD62AA25FBAD63W25

FBA_CMD0 G27FBA_CMD1 D25FBA_CMD2 F26FBA_CMD3 F25FBA_CMD4 G25FBA_CMD5 J25FBA_CMD6 J27FBA_CMD7 M26FBA_CMD8 C27FBA_CMD9 C25

FBA_CMD10 D24FBA_CMD11 N27FBA_CMD12 G24FBA_CMD13 J26FBA_CMD14 M27FBA_CMD15 C26FBA_CMD16 M25FBA_CMD17 D26FBA_CMD18 D27FBA_CMD19 K26FBA_CMD20 K25FBA_CMD21 K24FBA_CMD22 F27FBA_CMD23 K27FBA_CMD24 G26FBA_CMD25 B27FBA_CMD26 N24

FBADQM0 D21FBADQM1 F22FBADQM2 F20FBADQM3 A21FBADQM4 V27FBADQM5 W22FBADQM6 V22FBADQM7 V24

FBADQS_RN0 A22FBADQS_RN1 E22FBADQS_RN2 F21FBADQS_RN3 B21FBADQS_RN4 V26FBADQS_RN5 W23FBADQS_RN6 V23FBADQS_RN7 W27

FBADQS_WP0 B22FBADQS_WP1 D22FBADQS_WP2 E21FBADQS_WP3 C21FBADQS_WP4 V25FBADQS_WP5 W24FBADQS_WP6 U24FBADQS_WP7 W26

FB_VREF A16

FBA_CLK0 L24FBA_CLK0_N K23

FBA_CLK1 M22FBA_CLK1_N N22FBA_REFCLK M23

FBA_REFCLK_N M24FBA_DEBUG K22

R89

10K_

0402

_5%

~D

2@ 12

R355

1K_0

402_

5%~D

2@

12

C396

0.02

2U_0

402_

16V7

K~D

2@

1

2

R3431K_0402_5%~D

2@

12

R349

10K_

0402

_5%

~D

2@ 12

R601909_0402_1%~D

@

12

Part 3 of 5

LVD

S/TM

DS

NCG

ENER

AL

SERIAL

U8C

G72-N-A1_BGA533~D2@

IFPA_TXC_NU4 IFPA_TXCT4 MIO_A_D0 A2

MIO_A_D2 A3

MIO_A_D4 A4

MIO_A_D1 B3

MIO_A_D5 B4MIO_A_D6 B6

MIO_A_HSYNC C4

MIO_A_D8 C6

NC_3 C13

MIO_A_D3 D4

NC_0 D12NC_1 E12NC_2 F12

MIO_A_D9 G5

MIO_A_D7 P4

MIO_A_D10 V4

IFPA_TXD0N4IFPA_TXD0_NN5IFPA_TXD1R5IFPA_TXD1_NR4IFPA_TXD2T5IFPA_TXD2_NT6IFPA_TXD3R6IFPA_TXD3_NP6IFPB_TXCW5IFPB_TXC_NW6IFPB_TXD4W3IFPB_TXD4_NW2IFPB_TXD5AA2IFPB_TXD5_NAA3IFPB_TXD6AB1IFPB_TXD6_NAA1IFPB_TXD7AB3IFPB_TXD7_NAB2

IFPAB_RSETU6

IFPC_TXCV1IFPC_TXC_NW1IFPC_TXD0T1IFPC_TXD0_NR1IFPC_TXD1T3IFPC_TXD1_NT2IFPC_TXD2V2IFPC_TXD2_NV3

IFPCD_RSETJ3

BUFRST_N A6

STEREO F7

SWAPRDY A7THERMDN C9THERMDP B9

ROM_SCLK D2ROM_SI F3

ROM_SO D3ROMCS_N D1

C346

2200P_0402_50V7K~D

@1

2

R38

8

1.18

K_04

02_1

%~D

2@

12

R43810K_0402_5%~D

2@

12

G

D

S

Q552N7002_SOT23~D

@2

13

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PLLVDD

FBA_PLLAVDD

FBA_PLLAVDD

DACA_VDD

MIOBCAL_PD_VDDQ

PLLVDD

FBCAL_PD_VDDQ

DACB_VDD

IFPAB_PLLVDD

IFPAB_IOVDD

DACB_VDDDACA_VDD

G72_PLLVDD

G72_PLLVDD

+VCC_GFX_CORE

+3.3V_RUN

+1.22V_GFX_PCIE

+3.3V_RUN

+3.3V_RUN

+1.22V_GFX_PCIE

+1.8V_RUN

PEX_PLLAVDD

+1.8V_RUN

+1.8V_RUN+1.8V_RUN

+3.3V_RUN

+1.22V_GFX_PCIE

+2.5V_RUN

+2.5V_RUN

+1.22V_GFX_PCIE

Title



NVG72 PWR



1808mA

40mA



20mA180mA

40mA

40mA

70mA140mA

For PLVDD

For PLAVDD

This is NC for G72. It wasthere to support NVxx

C356

1U_0

603_

10V6

K~D

2@

1

2

C3430.1U_0402_10V7K~D

2@

1

2

L23BLM11A121S_0603~D

2@1 2

C45

80.

1U_0

402_

10V7

K~D

2@1

2C364

0.1U

_040

2_10

V7K~

D

2@

1

2

C52

0.1U

_040

2_10

V7K~

D

2@

1

2

C47

147

00P_

0402

_25V

7K~D

2@

1

2

C50

4.7U

_060

3_6.

3V6M

~D

2@

1

2

C46

847

00P_

0402

_25V

7K~D

2@

1

2

C412

4700

P_04

02_2

5V7K

~D

2@

1

2

C369

4.7U

_060

3_6.

3V6M

~D

2@

1

2

C31

747

0P_0

402_

50V7

K~D

2@

1

2

R390

60.4_0402_1%~D

2@1 2

C292

4700

P_04

02_2

5V7K

~D 2@

1

2

C43

70.

022U

_040

2_16

V7K~

D

2@

1

2

C373

0.1U

_040

2_10

V7K~

D

2@

1

2

C43

90.

022U

_040

2_16

V7K~

D

2@

1

2

R73

10K_0402_5%~D 2@

1 2

C442

10U

_080

5_4V

AM~D

2@

1

2

C284

2.2U

_060

3_6.

3V6K

~D

2@

1

2C

501

4.7U

_060

3_6.

3V6M

~D

2@

1

2

C419

0.1U

_040

2_10

V7K~

D

2@

1

2

C315

10U

_080

5_4V

AM~D

2@

1

2

L25

BLM11A121S_0603~D

2@12

C358

0.1U

_040

2_10

V7K~

D

2@

1

2

L21

BLM11A121S_0603~D

2@1 2

C32

347

00P_

0402

_25V

7K~D

2@

1

2

C28

610

U_0

805_

10V4

Z~D

2@

1

2

C45

4.7U

_060

3_6.

3V6M

~D

2@

1

2

C43

60.

1U_0

402_

10V7

K~D

2@

1

2

L20BLM11A121S_0603~D

2@

12

C41

10.

022U

_040

2_16

V7K~

D

2@1

2

C46

10.

1U_0

402_

10V7

K~D

2@

1

2

C418

0.02

2U_0

402_

16V7

K~D

2@

1

2

L30BLM11A121S_0603~D

2@

12

C390

0.1U

_040

2_10

V7K~

D

2@

1

2

C47

00.

022U

_040

2_16

V7K~

D

2@

1

2

C42

90.

1U_0

402_

10V7

K~D 2@

1

2

L31BLM11A121S_0603~D

2@

1 2

C402

0.1U

_040

2_10

V7K~

D

2@

1

2

C4200.

022U

_040

2_16

V7K~

D 2@

1

2

C49

1U_0

603_

10V6

K~D

2@

1

2

C34

0

0.01

U_0

402_

16V7

K~D 2@

1

2

C287

2.2U

_060

3_6.

3V6K

~D

2@

1

2

C30

347

00P_

0402

_25V

7K~D

2@ 1

2

C56

4.7U

_060

3_6.

3V6M

~D 2@1

2

C387

0.02

2U_0

402_

16V7

K~D

2@

1

2

C372

1000

P_04

02_5

0V7K

~D

2@

1

2

C3760.1U_0402_10V7K~D 2@

1

2

C306

470P

_040

2_50

V7K~

D

2@

1

2

C36

10.

1U_0

402_

10V7

K~D

2@

1

2

C39

90.

022U

_040

2_16

V7K~

D

2@

1

2

C403

0.1U

_040

2_16

V4Z~

D

2@

1

2

C47

30.

022U

_040

2_16

V7K~

D

2@

1

2

C294

470P

_040

2_50

V7K~

D

2@

1

2

C46

30.

1U_0

402_

10V7

K~D

2@

1

2

C301

4700

P_04

02_2

5V7K

~D

2@1

2

Part 4 of 5

POW

ER

U8D

G72-N-A1_BGA533~D2@

VDD_27T16VDD_28T17VDD_29U12VDD_30U13VDD_31U15VDD_32U16VDD_33W13VDD_34W15VDD_35W16

VDD_17N17 VDD_16N11 NV_PLLAVDDN9 VDD_14M17 VDD_13M16 VDD_12M15

VDD_26T15

VDD_6L16

VDD_10M13

VDD_5L15 VDD_4L13 VDD_3L12 VDD_2J11 VDD_1J10 VDD_0J9

VDD_11M14

VDD_18R9VDD_19R11VDD_20R17VDD_21T9VDD_22T11VDD_23T12VDD_24T13VDD_25T14

VDD_9M12

PEX_IOVDD_0 W17PEX_IOVDD_1 W18PEX_IOVDD_2 AB10PEX_IOVDD_3 AB11PEX_IOVDD_4 AB14

VDD_7M9VDD_8M11

PEX_IOVDD_5 AB15

VDD_LP_0W9VDD_LP_1W10

VDD33_0F13VDD33_1F14VDD33_2J12VDD33_3J13VDD33_4J15VDD33_5J16

PLLVDD H4

FBA_PLLAVDD D13

FBA_PLLVDD D14

FBCAL_PD_VDDQ D15

FBVTT_0E15FBVTT_1F15FBVTT_2F16FBVTT_3J17FBVTT_4J18FBVTT_5L19FBVTT_6N19FBVTT_7R19FBVTT_8U19FBVTT_9W19

PEX_IOVDDQ_0 AA4PEX_IOVDDQ_1 AB5PEX_IOVDDQ_2 AB6PEX_IOVDDQ_3 AB7PEX_IOVDDQ_4 AB8PEX_IOVDDQ_5 AB9PEX_IOVDDQ_6 AB12PEX_IOVDDQ_7 AB13PEX_IOVDDQ_8 AB16PEX_IOVDDQ_9 AB17

PEX_IOVDDQ_10 AB18

PEX_PLLAVDD Y6PEX_PLLDVDD AA5

MIOB_VDDQ_0 K5MIOB_VDDQ_1 K6MIOB_VDDQ_2 L6

MIOBCAL_PD_VDDQ J5

IFPA_IOVDD W4IFPB_IOVDD Y4IFPC_IOVDD L4

IFPAB_PLLVDD V5

IFPCD_PLLVDD M4

DACA_VDD AE2DACB_VDD F8

FBVDDQ_0F17FBVDDQ_1F19FBVDDQ_2J19FBVDDQ_3J22FBVDDQ_4L22FBVDDQ_5M19FBVDDQ_6P22FBVDDQ_7T19FBVDDQ_8U22FBVDDQ_9Y22 CLAMP D11

VDD_LP_3W12 VDD_LP_2W11

PEX_IOVDD_6 AB20PEX_IOVDD_7 AB21

PEX_IOVDDQ_11 AB19PEX_IOVDDQ_12 AC9PEX_IOVDDQ_13 AC11PEX_IOVDDQ_14 AC12PEX_IOVDDQ_15 AC16PEX_IOVDDQ_16 AC17PEX_IOVDDQ_17 AC19PEX_IOVDDQ_18 AC20

MIO_A_VDDQ_0 F6MIO_A_VDDQ_1 G6MIO_A_VDDQ_2 J6

C46

90.

1U_0

402_

10V7

K~D

2@

1

2

C29

34.

7U_0

603_

6.3V

6M~D

2@

1

2

C401

220P

_040

2_50

V7K~

D

2@

1

2

C29

54.

7U_0

603_

6.3V

6M~D

2@ 1

2

C42

80.

1U_0

402_

10V7

K~D

2@1

2

C366

2200

P_04

02_5

0V7K

~D

2@

1

2

C33

90.

1U_0

402_

10V7

K~D

2@

1

2

C377

0.1U

_040

2_10

V7K~

D

2@

1

2

C41

00.

1U_0

402_

10V7

K~D

2@

1

2

C34

10.

01U

_040

2_16

V7K~

D

2@

1

2

C299

470P

_040

2_50

V7K~

D

2@

1

2

C350

0.1U

_040

2_10

V7K~

D

2@

1

2

C50

44.

7U_0

603_

6.3V

6M~D

2@

1

2

C41

547

00P_

0402

_25V

7K~D

2@

1

2

C342

4700

P_04

02_2

5V7K

~D

2@

1

2

C51610

U_0

805_

4VAM

~D 2@

1

2

C39

10.

1U_0

402_

10V7

K~D

2@

1

2

C305

4700

P_04

02_2

5V7K

~D

2@

1

2

C37

00.

022U

_040

2_16

V7K~

D

2@1

2

C46

20.

1U_0

402_

10V7

K~D

2@

1

2

C38947

00P_

0402

_25V

7K~D

2@

1

2

C386

0.1U

_040

2_10

V7K~

D

2@

1

2

C288

2.2U

_060

3_6.

3V6K

~D

2@

1

2

C47

20.

022U

_040

2_16

V7K~

D

2@

1

2

L9BLM18PG181SN1_0603~D

2@

12

C43

50.

1U_0

402_

10V7

K~D

2@

1

2

C35

90.

1U_0

402_

10V7

K~D 2@

1

2

R338

10K_0402_5%~D 2@

1 2

C42

547

00P_

0402

_25V

7K~D

2@

1

2

L22BLM11A121S_0603~D

2@

1 2

C392

0.1U

_040

2_10

V7K~

D

2@

1

2

C365

0.02

2U_0

402_

16V7

K~D

2@

1

2

C385

0.1U

_040

2_10

V7K~

D

2@

1

2

C27

610

U_0

805_

10V4

Z~D 2@

1

2

C383

2200

P_04

02_5

0V7K

~D

2@

1

2

C29

747

0P_0

402_

50V7

K~D

2@ 1

2

C42

70.

1U_0

402_

10V7

K~D

2@

1

2

C347

4.7U

_060

3_6.

3V6M

~D

2@

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title



NVG72 GND





GN

D

Part 5 of 5

U8E

G72-N-A1_BGA533~D 2@

GND_0B2GND_1B5GND_2B8GND_3B11GND_4B14GND_5B17GND_6B20GND_7B23GND_8B26GND_9E2GND_10E5GND_11E8GND_12E11GND_13E14GND_14E17GND_15E20GND_16E23GND_17E26GND_18F11GND_19H2GND_20H6GND_21H23GND_22H26GND_23J14GND_24K9GND_25K19GND_26L2GND_27L5GND_28L11GND_29L14GND_30L17GND_31L23GND_32L26GND_33N12GND_34N13GND_35N14GND_36N15GND_37N16GND_38P2GND_39P5GND_40P9GND_41P11GND_42P12GND_43P13GND_44P14GND_45P15GND_46P16GND_47P17GND_48P19GND_49P23GND_50P26GND_51R12GND_52R13GND_53R14GND_54R15GND_55R16GND_56U2GND_57U5GND_58U11GND_59U14

FBCAL_PU_GND E13FBCAL_TERM_GND H22

FBA_PLLGND C15

PLLGND H5

PEX_PLLGND AA6

MIOBCAL_PU_GND M3

IFPAB_PLLGND V6IFPCD_PLLGND M6

GND_85 AF2GND_86 AF3GND_87 AF6GND_88 AF9GND_89 AF12GND_90 AF15GND_91 AF18GND_92 AF21GND_93 AF24GND_94 AF26

GND_60 U17GND_61 U23GND_62 U26GND_63 V9GND_64 V19GND_65 W14GND_66 Y2GND_67 Y5GND_68 Y23GND_69 Y26GND_70 AC2GND_71 AC8GND_72 AC14GND_73 AC23GND_74 AC26GND_75 AD8GND_76 AD9GND_77 AD11GND_78 AD12GND_79 AD14GND_80 AD16GND_81 AD17GND_82 AD19GND_83 AD20GND_84 AC5

R38640.2_0402_1%~D

2@

12

R60240.2_0402_1%~D

2@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBAA3

FBAA0

FBAA2FBAA1

FBAA11FBAA10

FBAA8FBAA9

FBAA6FBAA5

FBAA7

FBAA4

FBA_BA0FBA_BA1

FBAD11

FBAD15

FBAD12

FBAD9

FBAD16

FBAD10

FBAD8

FBAD13FBAD14

FBAD4

FBAD0

FBAD6FBAD5

FBAD3

FBAD7

FBAD24

FBAD31

FBAD26

FBAD29FBAD30

FBAD28

FBAD25

FBAD27

FBAD1FBAD2

FBAD23

FBAD17

FBAD22

FBAD20FBAD21

FBAD18FBAD19

FBA_VDDA0

DQMA#2

DQMA#0

DQSA_WP2

DQSA_WP0

DQMA#3

DQMA#1

DQSA_WP1

DQSA_WP3

FBA_VREF0

FBA_RST#

FBACAS#FBAWE#FBACS0#

FBARAS#

CLKA0CLKA0#

FBACS1#

DQSA_RN[0:7]

DQMA#[0:7]

DQSA_WP[0:7]

FBAA[0:11]

FBAD[0:63]

FBBA[2:5]

DQSA_RN0DQSA_RN1

DQSA_RN3DQSA_RN2

FBA_CKE

DQMA#5

DQMA#4

DQSA_WP5

DQSA_WP4

DQMA#7

DQMA#6

DQSA_WP6

DQSA_WP7

FBA_VREF1

DQSA_RN4DQSA_RN6

DQSA_RN7DQSA_RN5

FBA_RST#FBA_VDDA2FBA_VDDA3FBA_VDDA1

CLKA1#CLKA1

FBARAS#

FBACAS#

FBAWE#

FBA_CKE

FBAA0FBAA1

FBAA11

FBAA8

FBAA10

FBAA9FBAA6

FBAA7

FBBA4

FBBA3

FBBA5

FBBA2

FBA_BA0FBA_BA1

FBACS0#FBACS1#

CLKA0CLKA0#

CLKA1CLKA1#

FBAA4

FBAA5

FBBA2

FBBA4

FBBA3

FBBA5

FBAA3

FBAA2

FBA_VREF2VREF_SW_A1

VREF_SW_A1

FBA_VREF3

VREF_SW_A2

VREF_SW_A2

FBAD46FBAD44

FBAD43

FBAD42

FBAD47

FBAD41

FBAD57FBAD56

FBAD60FBAD59FBAD58

FBAD63FBAD62FBAD61

FBAD40FBAD45

FBAD34

FBAD39

FBAD36

FBAD38

FBAD35

FBAD37

FBAD33FBAD32

FBAD48FBAD50

FBAD51

FBAD49

FBAD52FBAD55

FBAD53

FBAD54

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN +1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN

+1.8V_RUN +1.8V_RUN

FBA_BA0<45>FBA_BA1<45>

FBA_RST#<45>

FBACAS#<45>FBAWE#<45>FBACS0#<45>

FBARAS#<45>

FBA_CKE<45>

FBACS1#<45>

FBAA[0:11] <45>

FBBA[2:5] <45>

FBAD[0:63] <45>

DQSA_WP[0:7] <45>

DQMA#[0:7] <45>

DQSA_RN[0:7] <45>

CLKA1#<45>CLKA0<45>CLKA0#<45>

CLKA1<45>

GPIO1_SW_VREF <44,45> GPIO1_SW_VREF <44,45>

Title



NVG72 External DDR





10mil10mil

For Mirror config

10mil

For Mirror config

10mil

Place below decoupling caps close U11 VDD Pins

Place below decoupling caps close U11 VDDQ Pins

Place below decoupling caps close U14 VDD Pins

Place below decoupling caps close U14 VDDQ Pins

Change to 220ohm/100MHzChange to 220ohm/100MHz

Place close to U11Place close to U14

VREF=VDDQ x Rb(Ra+Rb)

Ra

RbRb

Ra

VREF=1.26V=0.7 x VDDQ

Rb

Ra Ra

Rb

Swap data group for tracelength fine tune

Stuff for G74

Stuff for G74

R446

121_0402_1%~D

2@1 2

C38

4

0.01

U_0

402_

16V7

K~D

2@

1

2

C49

8

0.1U

_040

2_10

V7K~

D

2@

1

2

L46 BLM18PG181SN1_0603~D 2@12

R445

121_0402_1%~D

2@1 2

C54

6

470P

_040

2_50

V7K~

D

2@

1

2

C20

4

0.1U

_040

2_10

V7K~

D

2@

1

2

C19

6

100P

_040

2_50

V8J~

D

2@

1

2

C42

1

100P

_040

2_50

V8J~

D

2@

1

2

C47

9

0.1U

_040

2_10

V7K~

D

2@

1

2

C47

8

0.1U

_040

2_10

V7K~

D

2@

1

2

C56

4

100P

_040

2_50

V8J~

D

2@

1

2

C51

0

1000

P_04

02_5

0V7K

~D

2@

1

2

C50

2

0.01

U_0

402_

16V7

K~D

2@

1

2

R416

511_0402_1%~D

2@ 12

G

D

S

Q57

2N7002_SOT23~D

@

2

13

C57

7

0.1U

_040

2_10

V7K~

D

2@

1

2

G

D

S

Q56

2N7002_SOT23~D

@

2

13

C19

7

0.01

U_0

402_

16V7

K~D

2@

1

2

C53

6

0.01

U_0

402_

16V7

K~D

2@

1

2

C49

1

0.1U

_040

2_10

V7K~

D

2@

1

2

C55

6

100P

_040

2_50

V8J~

D

2@

1

2

C49

9

470P

_040

2_50

V7K~

D

2@

1

2

C46

5

100P

_040

2_50

V8J~

D

2@

1

2

C38

0

0.01

U_0

402_

16V7

K~D

2@

1

2

R437

121_0402_1%~D

2@1 2

R433

121_0402_1%~D

2@1 2

C451 0.047U_0402_16V4Z~D 2@1 2

C56

5

0.01

U_0

402_

16V7

K~D

2@

1

2

C56

6

1000

P_04

02_5

0V7K

~D

2@

1

2

C50

7

100P

_040

2_50

V8J~

D

2@

1

2

C52

1

4.7U

_060

3_6.

3V6M

~D

2@

1

2

C46

6

1000

P_04

02_5

0V7K

~D

2@

1

2

C55

7

100P

_040

2_50

V8J~

D

2@

1

2

C53

5

0.01

U_0

402_

16V7

K~D

2@

1

2

C55

8

1000

P_04

02_5

0V7K

~D

2@

1

2

L12 BLM18PG181SN1_0603~D 2@12

C37

8

4.7U

_060

3_6.

3V6M

~D

2@

1

2

R420

511_0402_1%~D

2@ 12

C16

5

4.7U

_060

3_6.

3V6M

~D

2@

1

2

R449

511_0402_1%~D

2@ 12

R407

60.4_0402_1%~D

2@ 12

R439

121_0402_1%~D

2@1 2

C52

0

4.7U

_060

3_6.

3V6M

~D

2@

1

2

R443

121_0402_1%~D

2@1 2

C20

2

0.01

U_0

402_

16V7

K~D

2@

1

2

R408

60.4_0402_1%~D

2@ 12

R448

121_0402_1%~D

2@1 2

C51

7

100P

_040

2_50

V8J~

D

2@

1

2

R605909_0402_1%~D

@

1 2

R45

0

1.18

K_04

02_1

%~D

2@

12

C43

0

0.01

U_0

402_

16V7

K~D

2@

1

2

C53

8

0.1U

_040

2_10

V7K~

D

2@

1

2

C42

4

1000

P_04

02_5

0V7K

~D

2@

1

2

C53

4

0.1U

_040

2_10

V7K~

D

2@

1

2

C51

1

470P

_040

2_50

V7K~

D

2@

1

2

C132 0.047U_0402_16V4Z~D 2@1 2

R20

6

1.18

K_0

402_

1%~D

2@

12

C57

8

0.1U

_040

2_10

V7K~

D

2@

1

2

R604909_0402_1%~D

@

1 2

R481

60.4_0402_1%~D

2@ 12

R480

60.4_0402_1%~D

2@ 12

C56

3

470P

_040

2_50

V7K~

D

2@

1

2

C40

6

470P

_040

2_50

V7K~

D

2@

1

2

R603909_0402_1%~D

@

1 2

C20

3

0.1U

_040

2_10

V7K~

D

2@

1

2

C54

5

0.01

U_0

402_

16V7

K~D

2@

1

2

U11

K4J55323QG-BC14_FBGA136~D 2@

DQ0 B2DQ1 B3DQ2 C2DQ3 C3DQ4 E2DQ5 F3DQ6 F2DQ7 G3DQ8 B11DQ9 B10

DQ10 C11DQ11 C10DQ12 E11DQ13 F10DQ14 F11DQ15 G10DQ16 M11DQ17 L10DQ18 N11DQ19 M10DQ20 R11DQ21 R10DQ22 T11DQ23 T10DQ24 M2DQ25 L3DQ26 N2DQ27 M3DQ28 R2DQ29 R3DQ30 T2DQ31 T3

A0K4A1H2A2K3A3M4A4K9A5H11A6K10A7L9A8/APK11A9M9A10K2A11L4BA0G4BA1G9

DM0E3DM1E10DM2N10DM3N3

WDQS0D2WDQS1D11WDQS2P11WDQS3P2

VREFH1VREFH12RFU1J2RFU2J3

RAS#H3CAS#F4WE#H9CS#F9

CKEH4CKJ11CK#J10

VDDQ R1VDDQ R4VDDQ R9VDDQ R12VDDQ V1VDDQ V12

VDDA2VDDA11

VDDQ A1VDDQ A12VDDQ C1VDDQ C4VDDQ C9VDDQ C12VDDQ E1VDDQ E4VDDQ E9VDDQ E12VDDQ J4VDDQ J9VDDQ N1VDDQ N4VDDQ N9VDDQ N12

VSSQ

B1VS

SQB4

VSSQ

B9VS

SQB1

2VS

SQD

1VS

SQD

4VS

SQD

9VS

SQD

12VS

SQG

2VS

SQG

11VS

SQL2

VSSQ

L11

VSSQ

P1VS

SQP4

VSSQ

P9VS

SQP1

2VS

SQT1

VSSQ

T4VS

SQT9

VSSQ

T12

VSS

A3VS

SA1

0VS

SG

1VS

SG

12VS

SL1

VSS

L12

VSS

V3VS

SV1

0

VDDF1VDDF12VDDM1VDDM12VDDV2VDDV11

ZQA4MFA9

RDQS0D3RDQS1D10RDQS2P10RDQS3P3

VSSAJ1VSSAJ12

VDDA K1VDDA K12

SENV4RESETV9RFMH10

C53

9

0.1U

_040

2_10

V7K~

D

2@

1

2

L42 BLM18PG181SN1_0603~D 2@12

C44

1

0.1U

_040

2_10

V7K~

D

2@

1

2

C57

6

1000

P_04

02_5

0V7K

~D

2@

1

2

C51

8

0.1U

_040

2_10

V7K~

D

2@

1

2

C53

2

4.7U

_060

3_6.

3V6M

~D

2@

1

2

R41

3

1.18

K_04

02_1

%~D

2@

12

L37 BLM18PG181SN1_0603~D 2@12

R205

511_0402_1%~D

2@ 12

C51

2

0.1U

_040

2_10

V7K~

D

2@

1

2

R442

121_0402_1%~D

2@1 2

R606909_0402_1%~D

@

1 2

C529 0.047U_0402_16V4Z~D 2@1 2

C49

2

470P

_040

2_50

V7K~

D

2@

1

2

C56

0

4.7U

_060

3_6.

3V6M

~D

2@

1

2

R41

5

1.18

K_0

402_

1%~D

2@

12

U14

K4J55323QG-BC14_FBGA136~D 2@

DQ0 B2DQ1 B3DQ2 C2DQ3 C3DQ4 E2DQ5 F3DQ6 F2DQ7 G3DQ8 B11DQ9 B10

DQ10 C11DQ11 C10DQ12 E11DQ13 F10DQ14 F11DQ15 G10DQ16 M11DQ17 L10DQ18 N11DQ19 M10DQ20 R11DQ21 R10DQ22 T11DQ23 T10DQ24 M2DQ25 L3DQ26 N2DQ27 M3DQ28 R2DQ29 R3DQ30 T2DQ31 T3

A0K4A1H2A2K3A3M4A4K9A5H11A6K10A7L9A8/APK11A9M9A10K2A11L4BA0G4BA1G9

DM0E3DM1E10DM2N10DM3N3

WDQS0D2WDQS1D11WDQS2P11WDQS3P2

VREFH1VREFH12RFU1J2RFU2J3

RAS#H3CAS#F4WE#H9CS#F9

CKEH4CKJ11CK#J10

VDDQ R1VDDQ R4VDDQ R9VDDQ R12VDDQ V1VDDQ V12

VDDA2VDDA11

VDDQ A1VDDQ A12VDDQ C1VDDQ C4VDDQ C9VDDQ C12VDDQ E1VDDQ E4VDDQ E9VDDQ E12VDDQ J4VDDQ J9VDDQ N1VDDQ N4VDDQ N9VDDQ N12

VSSQ

B1VS

SQB4

VSSQ

B9VS

SQB1

2VS

SQD

1VS

SQD

4VS

SQD

9VS

SQD

12VS

SQG

2VS

SQG

11VS

SQL2

VSSQ

L11

VSSQ

P1VS

SQP4

VSSQ

P9VS

SQP1

2VS

SQT1

VSSQ

T4VS

SQT9

VSSQ

T12

VSS

A3VS

SA1

0VS

SG

1VS

SG

12VS

SL1

VSS

L12

VSS

V3VS

SV1

0

VDDF1VDDF12VDDM1VDDM12VDDV2VDDV11

ZQA4MFA9

RDQS0D3RDQS1D10RDQS2P10RDQS3P3

VSSAJ1VSSAJ12

VDDA K1VDDA K12

SENV4RESETV9RFMH10

R430

240_0603_5%~D

2@

12

R148240_0603_5%~D

2@

12

C40

4

0.01

U_0

402_

16V7

K~D

2@

1

2

C55

5

470P

_040

2_50

V7K~

D

2@

1

2

C40

7

0.1U

_040

2_10

V7K~

D

2@

1

2

C39

3

0.01

U_0

402_

16V7

K~D

2@

1

2

C53

7

0.1U

_040

2_10

V7K~

D

2@

1

2

R382

10K_0402_5%~D

2@

12

C55

9

470P

_040

2_50

V7K~

D

2@

1

2

C561 0.047U_0402_16V4Z~D 2@1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RAM_CFG3

RAM_CFG1RAM_CFG0

PEX_PLL_EN_TERM100

SUB_VENDOR3GIO_ADR_03GIO_ADR_13GIO_ADR_2

DEVID3DEVID2DEVID1DEVID0

+3VL

RAM_CFG2

+3.3V_RUN

+3.3V_RUN+3.3V_RUN

RAM_CFG0<44>RAM_CFG1<44>

RAM_CFG3<44>

PEX_PLL_EN_TERM100<45>

SUB_VENDOR<45>3GIO_ADR_0<45>3GIO_ADR_1<45>3GIO_ADR_2<45>

DEVID3<44>

XTALSSIN<44>

DEVID2<44>DEVID1<44>DEVID0<44>

XTALOUTBUFF<44>

RAM_CFG2<44>

Title



NVG72 Strapping



VBIOS on card (pull high)0VBIOS with system BIOS (pull down)

0001

1001

ROM_TYPE[1:0]

RAM_CFG[3:0]

G72MV STRAPS

0100

PEX_PLL_TERM MIOAD0

01

ValueSTRAPS PIN DESCRIPTION

MIOBD10 Parallel=00, SERIAL AT25F=01 DEFAULT,Serial SST45VF=10, LPC=11

SUB_VENDOR

0

MIOAD1

1100

0010



*

MIOB_VSYNC

MIOBD0

MIOBD1

MIOBD8

MIOBD9

-1.75% (DOWN)

U3.Pin3

±0.875% (CENTER)

0

1

Internal pull up

0101

0111

0110

8Mx32 DDR monolithic (32bit)

300MHz, 1.8V

1.8V I/O

300MHz, 1.8V

4Mx32 DDR generic (64bit)

300MHz, 1.8V

4Mx32 DDR generic (32bit)

8Mx32 DDR (Samsung K4D55323QF-GC)

8Mx32 DDR monolithic (64bit)

1.8V I/O

For GDDR1

For GDDR3

Infineon 8Mx32

500MHz, 1.8V

Hynix 8Mx32

500MHz, 1.8V

Samsung 8Mx32

500MHz, 1.8V

*

G72xx

DEVID3 DEVID2 DEVID1 DEVID0

G72GLM

G72M

G72MV

1

0

1

1

0

1

0

0

1

0

0

1

U3

P1819GF-08SR_SO8~D

@

XIN/CLKIN1VSS2D_C3ModOUT4 REFCLK 5PD# 6VDD 7XOUT 8

R34

210

K_04

02_5

%~D

2@

12

C24

10U

_080

5_10

V4Z~

D

@

1

2

R82

2K_0

402_

5%~D

@

12

R33

510

K_04

02_5

%~D

@

12

R33

310

K_04

02_5

%~D

@

12

R34

110

K_04

02_5

%~D

@

12

R36

42K

_040

2_5%

~D

@

12

C20

0.1U

_040

2_10

V7K~

D

@

1

2

R71

10K_

0402

_5%

~D

@

12

R33

92K

_040

2_5%

~D

@

12

R72

0_04

02_5

%~D

@

12

R34

02K

_040

2_5%

~D

@

12

R35

02K

_040

2_5%

~D

2@1

2

R32

22K

_040

2_5%

~D

2@

12

R33

210

K_04

02_5

%~D

2@

12

L8BLM11A121S_0603~D

@

1 2

R64

10K_

0402

_5%

~D

2@

12

R80

10K_

0402

_5%

~D

2@

12

R34

72K

_040

2_5%

~D

@

12

R33

62K

_040

2_5%

~D

@

12

R33

410

K_04

02_5

%~D

2@

12

R26

10K_

0402

_5%

~D

@

12

R27

10K_

0402

_5%

~D

@

12

R37

32K

_040

2_5%

~D

2@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+GPU_PWR_SRC

GFX_REF

GFX_REF

GFX_+5V_RUN

GFX_+5V_RUN

GFX_CORE_CNTRL

+VCC_GFX_COREP

+PWR_SRC

+VCC_GFX_COREP

+1.22V_GFX_PCIEP

+5V_SUS

+3.3V_RUN

+VCC_GFX_CORE+VCC_GFX_COREP

+1.22V_GFX_PCIE+1.22V_GFX_PCIEP

+1.8V_SUS

GNDA_GFX

GNDA_GFXGNDA_GFX

GNDA_GFX

GNDA_GFX

GNDA_GFX

GNDA_GFX

GNDA_GFX

GNDA_GFX

+3.3V_RUN

GNDA_GFX

RUN_ON<19,30,32,33,39,40,41>

GFX_CORE_PWRGD<33>

GFX_PCIE_PWRGD<33>

GFX_CORE_CNTRL<44>

GFX_RUN_ON<32>

Title


Date: Sheet o fLA-3001P X02

PWR_NVG72 +VDD_CORE





De-p

op P

D15

for

ISL8

8550

output voltage adjustable network

+VCC_GFX_CORE +-2%Thermal Design Current: 5.6AMaximum current: 8A OCP min: 12A

L-S Rds-on =(Typ) 5.9m ~(max) 7.25m ohm

Graphics Power reference COE Rev A08Graphics Power for HAL31 Discrete only.

Populated PR159, PR160if Page 33 R576, R577 are Unpop.

"Del PR204 100k" HW has same R632 100k (Page 32) between +3.3V_RUN to PU13 Pin_27

PR2030_0402_5%~D

@

1 2

+

PC

151

330U

_D2E

_2.5

VM_R

9~D1

2

PC

147

0.1U

_060

3_50

V4Z~

D

1

2

PR166

0_0402_5%~D

12

PQ34FDS6676AS_SO8~D

365 7 8

2

4

1

PC

149

2.2U

_060

3_6.

3V6K

~D

1

2

PC

153

0.1U

_040

2_10

V7K~

D

1

2

PR

182

69.8

K_04

02_1

%~D

@

12

PC

159

1U_0

603_

10V6

K~D

1

2

PC1500.22U_0603_10V7K~D

1 2

PC

145

10U

_120

6_25

V6M

~D

1

2

PL21FBMA-L11-453215-900LMA60T_1812~D

1 2

PR159

100K_0402_5%~D1 2

PR155

1_0603_5%~D

1 2

PR1540_0402_5%~D

@

1 2

PC

155

1000

P_04

02_5

0V7K

~D

1

2

PJP15

PAD-OPEN 43X118

1 2

PR157

332K_0402_1%~D

12

PC

160

22U

_080

5_6.

3V6M

~D1

2

G

D

S

PQ35BSS138W-7-F_SOT323~D

2

13

PR

161

57.6

K_04

02_1

%~D1

2

PR1621.21K_0402_1%

12

PR167

10K_0402_5%~D

1 2

PR164178K_0402_1%

12

PC15710U_0805_10V4Z~D

1

2

PR

169

100K

_040

2_5%

~D

12

PC

156

0.04

7U_0

402_

16V4

Z~D

1

2

PC

148

2200

P_04

02_5

0V7K

~D

1

2

PC1540.22U_0402_10V4Z~D

1

2

PJP16

PAD-OPEN 43X79

1 2

PC162100P_0402_50V8J~D@

1

2

PC

144

1U_0

603_

10V6

K~D

1

2

PC

163

0.01

U_0

402_

16V7

K~D

1

2

PC

161

22U

_080

5_6.

3V6M

~D1

2

PR

165

4.99

K_04

02_1

%~D

12

PC

146

10U

_120

6_25

V6M

~D

1

2

PC

158

0.01

U_0

402_

16V7

K~D

1

2

PR1530_0402_5%~D@

1 2 PL220.88UH_MPC1040LR88_17A_20%~D

1 2

PR15824.9K_0402_1%~D

12

PU13

MAX8632/ISL88550

TON1

OVP/UVP2

REF3

ILIM4

POK15

POK26

STBY#7

SS8

VTTS

9

VTTR

10

PGN

D2

11

VTT

12

VTTI

13

REF

IN14

FB 15

OUT 16

VIN 17

UGATE 18

PHASE 19

BOOT 20

LGATE 21

VDD

22

PGN

D1

23

GN

D24

SKIP

#25

AVD

D26

SHD

NA#

27

NC

28

EPAD29

PJP20

PAD-OPEN 43X118

1 2

PQ33FDS6612A~D

S3

D6

D5

D7

D8

S2

G4

S1

PR163100K_0402_5%~D

1 2

PR15261.9K_0402_1%~D

12

PJP17

PAD-OPEN 43X79

1 2

PR156249K_0402_1%

1 2

PR160100K_0402_5%~D

1 2

PR16810K_0402_5%~D

12

PD

15C

MD

SH

_SO

D32

3~D

21

PR15110_0805_5%~D1 2

+

PC

152

330U

_D2E

_2.5

VM_R

9~D1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title



Changed-List History 1



Version Change List ( P. I. R. List )Item Date

Request OwnerSolutionDescription

Rev.Page#

1 0.2

Title



H/W

2 H/W 0.2

3 H/W 0.2

4 H/W 0.2

5 H/W 0.2

6 H/W 0.2

7 H/W 0.2

H/W 0.29

8 H/W 0.2

10 H/W 0.2

11 H/W 0.2

H/W14

0.2

0.2

13 0.2H/W

12 0.2H/W

15

0.216 H/W

0.217 H/W

0.2H/W18

19 H/W

0.2

0.2

ALL 9/14 Bill Revision change to X00(0.2) Modify Done.

20 H/W

31 9/14 Bill Update Board ID to 0001 for X00

31 9/14 Bill CoE update. ( EC_A05) Add GPIO USB_CAM_EN# and ADAPT_TRIP_SEL

Stuff R42 and no-stuff R31

19 9/20 BillCoE update. ( CRT, LVDS, SVIDEO and DVIInterfaces_A06) Delete U28, R607. Add R610.

20 9/20 BillCoE update. ( CRT, LVDS, SVIDEO and DVIInterfaces_A06) Update Populattion Note for the RGB and TV out Filter.

32 9/23 RedenCoE update. ( M07 SYSTEM POWERSEQUENCE_A03) Change R58,R540,R567,R447,R558,R564,R597 to 30_0805_5%

23 9/28 Reden Update the ICH7 USB bus connection Add connection of USB4+/- for CCD, USB2+/- for Blue tooth

ALL 9/28 Reden Change Connector for ME request Update J1394, JTP1, JBT1, JLVDS1 connector

14 9/30 Reden Update the note for MCH power Remove the placement note for C489,C525 as COE schematic

Modify OKPull-up on SATA_ACT# (R530) should bepopulatedScott9/3022

Capacitor on THRMTRIP_ICH# (C609) can bede-populatedScott9/3022

Rename net LCM_SMB_CLK to ICH_SMLINK09/3023

Rename net LCM_SMB_DAT to ICH_SMLINK19/3023

Can remove R489 and R490. Leave pins 3 and5 as NC on JMINI1. See A06 Ref Schem.B.McFarland9/3029

Modify OK

Scott

Scott

Modify OK

Modify OK

Remove R368, R380, R385.20 9/30 John LermaPlease check the latest referenceschematics. Delete 75 ohm resistors onTV_C, TV_CVBS, & TV_Y. Filter circuitvalues have been changes and a cap inparallel with each inductor has beenadded.

20 9/30 John Lerma Delete R233, R235, R238, Add R611, R612 (39 Ohm). And move L3 & L4before caps C1 & C2.

H/W

Modify OK

Please check the latest referenceschematics. Delete 75 ohm resistors onRED, GREEN, & BLUE. Add 39 ohms seriesresistors to ouputs of U1 & U2. Move L3 &L4 before caps C1 & C2.

33 9/30Add diode for power leakage in powersequence circuit

Change R129,R482,R466 to 100K,and change Q6,Q30,Q27 to 2N3906,andchange R471,R474,R469 to 4.7K.

47 9/30 RedenChange pull down resistor value to followCOW schematic Change R602,R386 to 37.4_0402_1%

IssueDescription

23 9/30 RedenNo stuff R485 (10k pull high) forM'07 inverter Modify OK

20 10/04 Reden Change S-video filter bead same as COEschematic

Change L29,L32,L34 to 0.47UH_CIL10NR47KNC_10%_0603

John Lerma

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title






Version Change List ( P. I. R. List )

Item Issue DescriptionDateRequest Owner

Solution Description Rev.Page#

1 0.2

Title



H/W

2 H/W 0.2

3 H/W 0.2

4 H/W 0.2

5 H/W 0.2

6 H/W 0.2

7 H/W 0.2

H/W 0.29

8 H/W 0.2

10 H/W 0.3

11 H/W

H/W14

13 H/W

12 H/W

15 H/W

16 H/W

17 H/W

18 H/W

H/W19

20

21H/W

23

24 H/W

25 H/W

26 H/W

29 10/05 John Swap CLKREQ signal between WWAN and WLAN Modify ok.

27 10/05 John Change C236,C238 from 1000p to 300p Modify ok.

29 10/05 John Add debug signals to WLAN connectorConnecting JMINI2 pins 16 - HOST_DEBUG_TX, 17 - HOST_DEBUG_RX, 19 - 8051_TX,& 42 - 8051_RX.

32 10/05 JohnRemove C682 and replace C685 with 4700pFas COE schematic Modify ok.

44 10/05 JohnAdd signal THERMTRIP_VGA# to G72 pin B13from Guardian II Modify ok.

49 10/05 JohnChange R341, R334, R64, & R333 from 2K to10K Modify ok.

20 10/05 JohnChange Caps C331,C325,C351,C349,C381,& C379from 82pF to 47pF and add C705~C707 Modify ok.

44 10/05 JohnAdd 10K pull-down resistor to G72 pins C3,C1, & D7 Modify ok.

31 10/06 RedenAdd signal U18 pin5 (GPIOE4) connectto TP connector for LED. Modify ok.

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

44 11/02 John Add 150ohm terminal resistor on GFx side.Add 150ohm of R619~R624

22 11/02 RedenAdd SNIFFER LED Disable Circuit asCOE schematic Add Q58,R625

30 11/02 Reden Added 0 ohm to EC5004 test pin Modify ok.

29 11/02 RedenAdded circuit to support WoW from S3/S4.Blocking diode and bypass resistor as COE Modify ok.

35 11/02 RedenAdded a circuit (Transistor and Resistors) tokeep BT LED off when the SNIFFER is turned onModify ok.

44 11/02 RedenChange pull up resistor same as COE graphicschematic. Change R370,R376 from 4.7K to 470K.

11/17 RedenChange VCC_CRT Diode D11 to RB500 (rateIo=100mA).20 Modify ok.

44 11/17 Reden

Add series resistor on signal ofTHERMTRIP_VGA#.

Modify ok.H/W

11/1744 Modify ok.Reden

Add series resistor on signal ofPLTRST_DELAY#.

Change Q6,Q27,Q30 to MMBT3906, and deleteD19~D21(RB751V_SOD323~D) same as COEschematic.33 11/18 Reden Modify ok.

32 11/18 Reden

Added 3VRUN Delay RC CKT, to Fix IMVP_PWRGDGlitch issue and add 1.8 VRUN Delay RC CKT,to meet GFX Power Sequence Requirement Modify ok.

32 11/18 RedenAdded Diode Bleed off for 3VRUN and 1.8VRUNfor GFX Power Down Sequence adjustment. Modify ok.

32 11/21 RedenChange the GFX_RUN_ON connection to VR turnon pin as COE A06 version schematic. Modify ok.H/W

20 11/23Change U19 connection from EC to GND asGG list request. Modify ok.

John

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title






Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page#

1 0.3

Title



H/W

2 H/W

3 H/W

4 H/W

5 H/W

6 H/W

7 H/W

H/W9

8 H/W

10 H/W

11 H/W

H/W14

13 H/W

12 H/W

15 H/W

16 H/W

17 H/W

18 H/W

H/W19

H/W20

21 H/W

23

24

H/W

25

H/W

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.4

0.3

0.3

34 11/23Change JTP1 pin 19 from +5V_ALW to +5V_RUNas Dell GG list Modify ok.John

Issue Description

20 11/23 JohnPlace a 0 ohm 1206 place holder betweenD11 pin 1 and JCRT1 pin 9 Modify ok.

29 11/23 JohnChange WWAN USB source from EC to ICH7M/USB5and remove WWLAN USB signal from EC. Modify ok.

44 11/24 JohnAdd connection for signal of YPRPB_DET# toG72 pin A15 through a series resistor. Modify ok.

44 12/01 John Change R615 to no-pop Modify ok.

Request Owner

23/31 12/02Add connection to EC for signalHDDC_EN# and MODC_EN# Modify ok.

6 12/06 RedenChange R456 to 150, R457 to 91 for internalspectrum clock. Modify ok.

20 12/07 Add a diode for U1,U2 power pin. Modify ok.

John

John

20 12/07 Add a cap 0.1uf for JSVID1 pin5John Modify ok.

28 12/07 John Change u13 to G5240B1T1U Modify ok.

Add connection for pin73 for LVDS BIA_PWMthrough resistorJohn12/0730 Modify ok.

Remove the C104 form dell COE team request.20 12/08 John Modify ok.

6/44/49 12/12 RedenRemove external spectrum and swap populatedresistor for internal CLK GEN. Modify ok.

Modify ok.Add pull up resistors to +3.3V_ALW for signalsof HDDC_EN#,MDDC_EN#12/1231 John

23/30 12/13Add damping series resistors (47ohm) forsignal SPI_CS# on EC and ICH7 Modify ok.John

33 12/13Removed 3V/5V power good sequence circuit andchange +1.8V_RUN PWRGD circuit.John Modify ok.

35 12/14 RedenSwap the Sniffer LED (D13) pin define,Pin3=>Yellow, Pin2=>Green. Modify ok.

9 12/14 RedenChange CPU VCORE area caps , 22uF->10uF andreplace 330uF poly with 6m ohm x 4pcs. Modify ok.

31 12/15 RedenChange pull up resistors of HDDC_EN#,MDDC_EN#from 10k to 100K for leakage issue. Modify ok.

49 12/15 Reden Change Device ID from 0111 to 1000 for G72M Modify ok.

0.4

0.4

0.4

32 2006/2/07 RedenChange C154 from 0.01uf to 0.047uf to matchG72 VDD_CORE&1.8V power up sequence Modify ok.

13 2006/2/07 RedenChange L6/L26 TDK to 2nd and use Taiyo formain source Modify ok.

24 2006/2/07 RedenChange L53 TDK to 2nd and use Taiyo for mainsource Modify ok.

20 H/W 2006/2/08 RedenChange TV filter caps valus as dell's suggest

Modify ok.1. Change C331,C351,C381,C325,C349,C378 from47pf to 82pf2. Change C705,C706,C707 from 22pf to 8.2pf

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title






Modify ok.

Modify ok.

Modify ok.

Modify ok.

Modify ok.

Modify ok.

Issue Description

Modify ok.

Modify ok.

Modify ok.

Modify ok.

Modify ok.

Modify ok.

Modify ok.

Version Change List ( P. I. R. List )Item Date Solution Description Rev.Page#

1

Title



H/W

2 H/W

3 H/W

4 H/W

5 H/W

6 H/W

7 H/W

H/W9

8 H/W

10H/W

11

H/W14

13 H/W

12 H/W

15 H/W

16 H/W

17 H/W

18 H/W

H/W19

H/W20

21 H/W

H/W23

24 H/W

25 H/W

26 H/W

Modify ok.

Modify ok.

Modify ok.

Modify ok.

Request Owner

Modify ok.

Modify ok.

35 02/17 RedenTo add logic circuit to control 3.3V_RUN forpower switch board.

19 02/21 RedenAdd SI3457DV P channel mos to dual-stuff for+GFX_PWR_SRC

31 02/21 Reden Change board ID to X02 (0011)

02/21Add voltage drop diode for CMOS power(+5V_RUN), and remove D'05 buffer.Reden

35 02/17 RedenAdd pull down resistor (10K) for signalPLTRST_DELAY# to fix leakage issue

19

22,23,34 02/21 Redenpopulate the 48MHz/bit_clk/keyboard signaltermination for EMI issue

0.4

0.4

0.4

0.4

0.4

0.4

02/21Change population option for BACKLITEON,stuffR610 for DSC and stuff R639 for UMA. 0.4Reden19

20 02/21 RedenChange R611,R612 resister to 0 for signalquality.

23 02/22 Reden Stuff R485 for Bits issue WI52653

16 02/22 RedenChange thermal setpoint from 85 degrees to 88degrees, change R242 from 147K ohm to 322K ohm1% and R247 from 41.2K ohm to 118K ohm 1%.

0.4

0.4

0.4

19 02/28 RedenAdd R652 overlap on D26 for CMOS power popoption

31 04/03 Reden

0.4

0.5

0.5

0.5

0.5

0.5

0.5

0.5

0.5

0.5

0.5

0.5

0.5

Modify ok.

Modify ok.

Modify ok.

Modify ok.

Change board ID to X03 (0100)

16 04/11 Reden Switch Q7,Q24 Pin S,D connection

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title



Power-Changed-List History



Version Change List ( P. I. R. List ) for Power Circuit

Solution Description Rev.Page#

1

TitleItem Issue DescriptionDateRequestOwner



P39

8

7

6

5

3

2

4

9

10

12

14

15

16

13

+3.3VALW Dell0926/2005 Dell request to change PC30 from 4.7U_1206 to 10U_1206 PC30 change to 10U_1206_10VX00

P40 0926/2005 Dell +1.5V OCP min = 7.4A, +1.05V OCP min = 9.3A

1.) +1.5V OCP: PR56 change to 124K, PR46 change to 1.43K

2.) +1.05V OCP: PR57 change to 124K, PR47 change to 1.87K

X00

P41

+1.5V / +1.05V OCP

P39

+1.8V_SUS

+15V_SUS

0926/2005

0926/2005

Dell

Compal

Add PR202 0 ohm 0603 between FB pin with AVDD pin of PU5 MAX8632 Contact the FB pin of the controller to the AVDD pin via zero ohm resister

Follows COE +15V reference schematics Unpop PR179 10K_0805

P50 +VCC_GFX 0926/2005Improve +1.22V_GFX_PCIEP pin7 STBY# and pin5 POK1 pull high resister of PU13 MAX8632. Depop PR159, PR160 100K_0402Compal

X00

X00

X00

P40 +1.5V / +1.05V 1004/2005 Dell Improve better phase margin PC46 change to 330pf/0402/50v

P41 +1.8V_SUSP OCP 1004/2005 Dell Improve 1.8V_SUSP OCP PR78 change to 84.5K

P39 +3.3VALW 1004/2005 Dell Dell request to populate PC11 at the input to the 3V requlator Populate PC11 10uf/1206/25V

X00

X00

X00

P50 +VCC_GFX 1007/2005 Dell Dell request to Change PR167 pin 1 contact to +3.3V_RUN PR167 pin1 contact to +3.3V_RUN

P50

P41

+VCC_GFX

+1.8V_SUSPDell

MAX8632 Just connect pin 24 directly to the exposed pad without using zero ohm resistor . DEL PR186 and PR79

P41 +1.8V_SUSP

1007/2005

1007/2005 DellDell request to populate PR74. ( PU5 MAX8632 f from 300K change to 450khz) Add PR74

P43 Charger 1007/2005 Dell Dell request to change PR174 to 1_0603. PR174 from 1_0805 change to 1_0603(refer to COE Rev A09)

1107/2005 DellP41 +1.8V_SUSP Dell Coe DDR Rev A05 request to del PR70DEL PR70Change PR69 from 0 ohm to 1 ohm.

X00

X00

X00

X00

X01

X01P43 Charger 1107/2005 Dell Dell Coe Cgarger Rev A07 requested

1. Change PR174 from 0_0805 to 1_0603.2. Add PC175 220P_04023. Del PR200, Add PR199 100_0402, PC189 0.01U_0603 PU10 Pin 15 & Pin16 shorted.4. Add PR144 4.3M 0402.5. Del PR201.6. Change PR149 from 59K to 56.2K 04027. Change PR150 from 33.2K to 27.4K 0402.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title






Version Change List ( P. I. R. List ) forPower Circuit

SolutionDescription

Rev.Page#

17

TitleItem IssueDescription

DateRequest Owner



P50 +VDD_CORE Dell1108/2005 Dell COE Graphics Power reference A07 requested

1. Change PR155 to 1 ohm.2. Change PR161 from 69.8K to 57.6K.3. Change PR164 from 118K to 178K.4. Change PR166 from 301 to 0 ohm.5. Change PR162 from 1.1K to 1.21K6. All +5V_RUN change to +5V_SUS.7. All +3V_RUN change to +3V_SUS.

X01

18 P50 +VDD_CORE 1108/2005 Dell

Follow Coe ref De-pop PR203.Del PR204, H/W has same R632 100k on Page 32 between +3.3V_RUN to PU13 Pin_27. Del PR203

Del PR204 X01

X01

20 P43 Charger 1120/2005 Dell Dell COE Charger reference A09 requested De pop PC189Add PC191

X01

21 P42 +VCC_CORE 1120/2005 CompalImprove VCC-CORE OCP to 55A.( original design X00 PR109 191K OCP point 45A only.) Change PR109 to 160K X01

22P37P38P39P40P41P42P43P50

EMI Bead 1122/2005 Compal Change Footprint 'L_1812' to "L-1812-S" for 2nd source

Change PL2, PL5, PL6, PL9, PL12, PL14, PL19, PL21 footprint to L_1812-S for 2nd source X01

23 P39 3.3VSRC 1124/2005 Dell Nopop PQ39 since this will not be needed once the EC HUB is removed.X01

Unpop PQ39

24 P42 +VCC_CORE 1130/2005 Compal Tokin inductor 0.45uH/27A rusted on surface after storage test. change PL15, PL16, PL17 to Panasonic ETQP4LR45XFC (0.45uH 10% Lead Free) X01

25 P50 +VDD_CORE 1201/2005 Dell Improve +3.3V_RUN leakage at S3 mode1. Change PR167 Pin_1 net name from +3.3V_SUS change to +3.3V_RUN2. Change PR159, PR160 Pin_1 net name from +3.3V_SUS change to +3.3V_RUN X01

26 P43 Charger 1201/2005 Dell CoE Charger Ref A10 request: Deeply discharged battery problem. Add PR208, PD20 X01

27 P50 +VDD_CORE Change PR167 to 4.7K to fix stair step issue seen on signal. Change PR167 to 4.7KDell1202/2005

19 P37 +DC_IN 1202/2005 Dell Add solder jumper pads in parallel with PL2 & PL3.Add PJP21, PJP22

28 P40 +1.5V_RUN 1202/2005 Dell Add PC192 0.1uF cap to pin 21 of PU4 for power-up sequencing. Also add PD20 diode in parallel with PR59 for power-down sequencing.

Add PC192, PD21

X01

X01

29 P37 DC_IN 1206/2005 Dell ChangePR9 from 4.7K to 10K. The exising 4.7K exceeds power dissipation rating of 0603 size at 20V.

Change PR9 from 4.7K to 10K

30 P43 Charger 1206/2005 Dell Unpop PQ27, PR126 Unpop PQ27, PR126

31P44

+15VP 1206/2005 Dell Add a PR209 150 ohm between PD19 Pin_3 and PD18 Pin_2 to prevent +15V_SUSP short cause PD18 damage. Add PR209 150 ohm

X01

X01

X01

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title






Version Change List ( P. I. R.List ) for Power Circuit

SolutionDescription

Rev.Page#

32

TitleItem IssueDescription

DateRequest Owner



P49 +VDD_CORE Dell1207/2005 Dell require to update.Change PC98 from 680PF to 390PF

X01

33P38P40

Battery Conn+1.5VRUNP/+VCCP_1P05VP 1212/2005 Dell Dell require to update.

1.Add 2200pF_0402 and 0.1uF_0402 unpop Cap at PJBAT1 pin 5 to GND.2.Change PC192 from 0.1U to 0.47 uF. 3.Pop PC48. X01

X02

34 P39 +15V_CHAGRE PUMP 0215/2006 Dell Dell require to update.

1.PU15 AND Gate change to SN74LVC1G08 (+-32mA)2.Iccrease cap value PC190 at the AND gate Vcc from 0.1uf to 0.47uf.3. Change PR209 to 0 ohm (There are already 100k resister for protection against excessive short current.)4. Add new PR210 7.5k in series with AND Gate input to PWM path from U20.5. Change out gate resister PR207 from 300 ohm to 120 ohm.

P39 +5V_SUSP 0215/2006 Compal Power components PL8 interfere with log low PL8 from 4.7u_STQB125A-4722PF 8A (5.7mm) change to STQB1250-4722APF 7A (5mm). X0236

+VCC_COREP42 0223/2006 Compal Acoustic noise concern Populate PC76 220uF AL Cap X0235

Unpop all 15v charge pump components

37 P40 +1.5V_RUNP 0215/2006 Dell Power components PL10 interfere with log low (pad short risk)PL10 change to SIL1045K-3R8-R 8A

X02

38 +VCC_CORE 0407/2006 Dell Acoustic noise concern PC98 from 390pf change to 470pf X02

39 P42 +VCC_CORE 0412/2006 Dell Dell require to depoplation. Depop PR119 and PR122

dell xps m1210

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