degree in computer science iv sem

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INDIRA GANDHI NATIONAL OPEN UNIVERSITY SCHOOL OF ENGINEERING AND TECHNOLOGY MAIDAN GARHI, NEW DELHI-110 068 Programme Structure of Vertically Integrated Engineering programmes Level of Programme : Degree Discipline : Computer Science & Engineering PROGRAMME CODE : BTCSVI First Semester Sl. No. Course Code Course Description Credit Load per Week Remarks 1. ET-0101A Mathematics-I 4 4 2. ET-105A Physics 4 4 3. BAS-003 Communication Skills 3 3 4. ET-202A Engineering Mechanics 4 4 5. BAS-005 Engineering Drawing 3 3 6. BASL-001 Lab-I (Applied Science) 1 2 7. BASL-002 Lab-II (Engineering Mechanics) 1 2 TOTAL 20 22 Second Semester Sl. No. Course Code Course Description Credit Load per Week Remarks 1. BIEL-001 Basics Of Electronics Engineering 4 4 2. BME-003 Manufacturing Technology 4 4 3. BICE-001 Elements of Engineering Science 4 4 4. BICS-003 Object Oriented Programming 4 4 5. BIEE-001 Basics Of Electrical Engineering 4 4 6. BIELL-001 Lab-IV (Basics Of Electrical Engineering) 1 2 7. BASL-003 Lab-III (Workshop Practice) 1 3 TOTAL 22 25

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Page 1: Degree in Computer Science IV Sem

INDIRA GANDHI NATIONAL OPEN UNIVERSITYSCHOOL OF ENGINEERING AND TECHNOLOGYMAIDAN GARHI, NEW DELHI-110 068

Programme Structure ofVertically Integrated Engineering programmes

Level of Programme : DegreeDiscipline : Computer Science & Engineering

PROGRAMME CODE : BTCSVI

First Semester

Sl. No.

Course Code

Course Description CreditLoad per

WeekRemarks

1. ET-0101A Mathematics-I 4 4

2. ET-105A Physics 4 4

3. BAS-003 Communication Skills 3 3

4. ET-202A Engineering Mechanics 4 4

5. BAS-005 Engineering Drawing 3 3

6. BASL-001 Lab-I (Applied Science) 1 2

7. BASL-002 Lab-II (Engineering Mechanics) 1 2

TOTAL 20 22

Second Semester

Sl. No.

Course Code

Course Description CreditLoad per

WeekRemarks

1. BIEL-001 Basics Of Electronics Engineering 4 4

2. BME-003 Manufacturing Technology 4 4

3. BICE-001 Elements of Engineering Science 4 4

4. BICS-003 Object Oriented Programming 4 4

5. BIEE-001 Basics Of Electrical Engineering 4 4

6. BIELL-001 Lab-IV (Basics Of Electrical Engineering)

1 2

7. BASL-003 Lab-III (Workshop Practice) 1 3

TOTAL 22 25

Page 2: Degree in Computer Science IV Sem

Third Semester

Sl. No.

Course Code

Course Description CreditLoad per

WeekRemarks

1. ET-101B Mathematics-II 4 4

2. BME-009 Computer Programming and Applications

4 4

3. BME-017 Strength of Materials 4 4

4. ET-524A Principles of Engineering Management and Economics

4 4

5. BICS-005 Software Engineering 4 4

6. BASL-006 Lab-V (Computer Programming) 1 2

7. BIMEL-002 Lab-VI (Strength of Materials) 1 2

TOTAL 22 24

Fourth SemesterSl. No.

Course Code

Course Description CreditLoad per

WeekRemarks

1 BICE-007 Mathematics-III 4 4

2 BICS-007 Data Structures 4 4

3 BICS-008 Discreet Maths Structure 4 4

4 BICS-009 Logic Design 4 4

5 BICS-010 Formal Languages and Automata 4 4

6 BICSL-003 Lab VII(Data Structures) 1 2

7 BICSL-004 Lab VIII (Logic Design) 1 2

Total 22 24

Page 3: Degree in Computer Science IV Sem

BICE-007 : MATHEMATICS III

Unit I: Function of Complex variableAnalytic function, C-R derivatives ofEvaluation of real integrals of the type and Unit II: Statistical Techniques - IMoments, Moment generating functions, Skewness, Kurtosis, Curve fitting, Method of least squares, fitting of straight lines, Polynomials, Exponential curves etc., Correlation, Linear, non linear and multiple regression analysis, Probability theory. Unit III: Statistical Techniques - IIBinomial, Poisson and Normal distributions, sampling theory (small and large), Tests of significations: Chisquare test, t-test, Analysis of variance (one way), Application to engineering, medicine, agriculture etc. Time series and forecasting (moving and semi-averages), Statistical quality control methods, Control charts, R, p, np, and c charts. Unit IV: Numerical Techniques IZeroes of transcendental and polynomial equation using Bisection method, Regula-falsi method and Newton- Raphson method, Rate of convergence of above methods.

Unit V : Numerical Techniques IISolution of system of linear equations, Gauss- Seidal method, Crout method. Numerical

-eight rules, Solution of ordinary differential (first order, second order and simultaneous) equations by

-order Runge- Kutta mehthods. Reference Books:-

1.2. Jain, Iyenger & Jain, Numerical Methods for Scientific and Engineering Computation,

New AgeInternational, New Delhi, 2003.3. J.N. Kapur, Mathematical Statistics, S. Chand & company Ltd.,20004. R.K. Jain & S.R.K. Iyenger, Advance Engineering Mathematics, Narosa Publication

House, 2002.5. Chandrika Prasad, Advanced Mathematics for Engineers, Prasad Mudralaya, 1996.6. E. Kreysig, Advanced Engineering Mathematics, John Wiley & Sons, 2005.7. B.S. Grewal, Higher Engineering Mathematics, Khanna Publishers, 2005.8. Devi Prasad, An introduction to Numerical Analysis, Narosa Publication house, New

Delhi 2006.9. T. Veerajan & T. Ramchandrandran, Theory & Problems in Numerical Methods, TMH,

New Delhi, 2004.10. S.P.Gupta, Statistical Methods, Sultan and Sons, New Delhi, 2004.11. Devore, Probability and Statistics, Thomson(Cengage) Learning, 2007.12. Walpole, Myers, Myers & Ye, Probability and Statistics for Engineers & Scientists,

Pearson Education, 2003.

Lectures Tutorials Practicals Credits Marks

3 1 -- 4

External: 70+Internal: 30.Students are required to score 45%

marks individually in both External & Internal and 50% marks in total.

Page 4: Degree in Computer Science IV Sem

BICS-007 :DATA STRUCTURES

Lectures Tutorials Practicals Credits Marks

3 1 -- 4

External: 70+Internal: 30.Students are required to score 45% marks

individually in both External & Internal and 50% marks in total.

UNIT 1:Introduction to data structures, algorithm evaluation, arrays, ordered lists, operations inordered list, sparse matrices, multi-dimensional arrays, linked lists, operations on linkedlist, storage pools, garbage collection, doubly linked list and its operations, generalizedlinked lists.UNIT II:Stacks and Operations in a stack, applications of Stacks and queues, difference betweenStacks and queues, Operations in a queue & its application, Circular queues, Mazingproblem, Prefix, postfix, infix notationsUNIT IIITrees: applications and representation in memory, binary tree : operations on binary treeSpanning tree, cut sets, graphs: Traversing and properties, Hamiltonian path and circuitsEularian paths and circuits, Planner graphs and its applicationsUNIT IVSymbol table: types and use, Static tree table, Dynamic tree table, Hashing, Hash tableRepresentation of sets: using list, Representation of sets: using bit vector & treesOperations on setsUNIT VSequential Search, Binary Search, Other search techniques, Time complexity & memoryrequirements, Bubble Sort, Insertion sort, Quick sort, Selection sort, Merge sort, Heapsort, maxima and minima heap.

References:1) Data Structure by Tanenbaum2) Data Structure by Horowitz & Sahani3)Classic data structures by D.samanta,PHIRESOURCES : http://nptel.iitm.ac.in/courses/Webcourse-contents/IIT-%20Guwahati/data_str_algo/frameset.htm

http://nptel.iitm.ac.in/video.php?courseId=1074

Page 5: Degree in Computer Science IV Sem

BICS-008 :DISCRETE MATHEMATICAL STRUCTURES

Lectures Tutorials Practicals Credits Marks

3 1 -- 4

External: 70+Internal: 30.Students are required to score 45% marks

individually in both External & Internal and 50% marks in total.

Unit-I Set Theory: Introduction, Combination of sets, Multisets, Ordered pairs. Proofs of some general identities on sets. Relations: Definition, Operations on relations, Properties of relations, Composite Relations, Equality of relations, Recursive definition of relation, Order of relations. Functions: Definition, Classification of functions, Operations on functions, Recursively defined functions. Growth of Functions. Natural Numbers: Introduction, Mathematical Induction, Variants of Induction, Induction with Nonzero Base cases. Proof Methods, Proof by counter example, Proof by contradiction.

Unit-II Algebraic Structures: Definition, Groups, Subgroups and order, Cyclic Groups, Cosets, Lagrange's theorem, Normal Subgroups, Permutation and Symmetric groups, Group Homomorphisms, Definition and elementary properties of Rings and Fields, Integers Modulon.

Unit-III Partial order sets: Definition, Partial order sets, Combination of partial order sets, Hasse diagram. Lattices: Definition, Properties of lattices Bounded, Complemented, Modular and Complete lattice. Boolean Algebra: Introduction, Axioms and Theorems of Boolean algebra, Algebraic manipulation of Boolean expressions. Simplification of Boolean Functions, Karnaugh maps, Logic gates, Digital circuits and Boolean algebra.

Unit-IV Propositional Logic: Proposition, well formed formula, Truth tables, Tautology, Satisfiability, Contradiction, Algebra of proposition, Theory of Inference. Predicate Logic: First order predicate, well formed formula of predicate, quantifiers, Inference theory of predicate logic.

Unit-V Trees : Definition, Binary tree, Binary tree traversal, Binary search tree. Graphs: Definition and terminology, Representation of graphs, Multigraphs, Bipartite graphs, Planar graphs, Isomorphism and Homeomorphism of graphs, Euler and Hamiltonian paths, Graph coloring, Recurrence Relation & Generating function: Recursive definition of functions, Recursive algorithms, Method of solving recurrences.

Page 6: Degree in Computer Science IV Sem

Combinatorics: Introduction, Counting TechniquTheory. References:

1. Koshy, Discrete Structures, Elsevier Pub. 2008

2. Kenneth H. Rosen, Discrete Mathematics and Its Applications, 6/e, McGraw-Hill, 2006.

3. B. Kolman, R.C. Busby, and S.C. Ross, Discrete Mathematical Structures, 5/e, Prentice Hall, 2004.

4. E.R. Scheinerman, Mathematics: A Discrete Introduction, Brooks/Cole, 2000.

5. R.P. Grimaldi, Discrete and Combinatorial Mathematics, 5/e, Addison Wesley, 2004.

6. Jean Paul Trembley, R Manohar, Discrete Mathematical Structures with Application to Computer Science, McGraw-Hill, Inc. New York, NY, 1975.

RESOURCES :

Page 7: Degree in Computer Science IV Sem

BICS-009 :LOGIC DESIGN

Lectures Tutorials Practicals Credits Marks

3 1 -- 4

External: 70+Internal: 30.Students are required to score 45% marks

individually in both External & Internal and 50% marks in total.

UNIT I

Digital Logic: Overview of Basic Gates and Universal Logic Gates, AND-OR-Invert Gates, Positive and Negative Logic, Introduction to HDL

Combinational Logic Circuits: Boolean Laws and Theorems, Sum-of-products Method, Truth Table to Karnaugh Map, Pairs, Quads, and Octets, KCare Conditions, Product-of-sums Method, Product-of-sums Simplification, Simplification by Quine-McClusky Method, Hazards and Hazard Covers, HDL Implementation Models

UNIT II

Data-Processing Circuits: Multiplexers, Demultiplexers, 1-of-16 Decoder, BCD-to-Decimal Decoders, Seven-segment Decoders, Encoders, EX-OR gates, Parity Generators and Checkers, Magnitude Comparator, Read-only memory, Programmable Array Logic, Programmable Logic, Troubleshooting with a Logic Probe, HDL Implementation of Data Processing Circuits

UNIT III

Arithmetic Circuits: Binary Addition, Binary Subtraction, Unsigned Binary Numbers, Sign-Arithmetic Building Blocks, The Adder-Subtractor, Fast Adder, Arithmetic Logic Unit, Binary Multiplication and Division, Arithmetic Circuits using HDL

UNIT IV

Clocks and Timing Circuits: Clock Waveforms, TTL Clock, Schmitt Trigger, Monostables with Input Logic, Pulse-forming Circuits

Flip-Flops: RS Flip-flops, Gated Flip-flops, Edge-triggered RS, D, JK Flip-flops, Flip-flop timing, JK Master-slave Flip-flops, Switch Contact Bounce Circuits, Various Representations of Flip-flops, Analysis of Sequential Circuits, Conversion of Flip-flops a synthesis example, HDL implementation of Flip-flop

UNIT V

Page 8: Degree in Computer Science IV Sem

Registers: Types of Registers, Serial In-Serial Out, Serial In-Parallel Out, Parallel In-Serial Out, Parallel In-Parallel Out, Applications of Shift Registers, Register Implementation in HDL

Counters: Asynchronous Counters, Decoding Gates, Synchronous Counters, Changing the Counter Modulus, Decade Counters, Presettable Counters, Counter Design as a Synthesis Problem, A Digital Clock, Counter Design Using HDL

UNIT VI

Design of Sequential Circuit: Model Selection, State Transition Diagram, State Synthesis Table, Design Equations and Circuit Diagram, Implementation using Read Only Memory, Algorithmic State Machine, State Reduction Technique, Analysis of Asynchronous Sequential Circuit, Problems with Asynchronous Sequential Circuits, Design of Asynchronous Sequential Circuit

UNIT VII

D/A Conversion and A/D Conversion: Variable, Resistor Networks, Binary Ladders, D/A Converters, D/A Accuracy and Resolution, A/D Converter-Simultaneous Conversion, A/D Converter-Counter Method, Continuous A/D Conversion, A/D Techniques, Dual-Slope A/D Conversion, A/D Accuracy and Resolution

UNIT VIII

Digital Integrated Circuits: Switching Circuits, 7400 TTL, TTL Parameters, TTL Overview, Open-collector Gates, Three-state TTL Devices, External Drive for TTL Loads, TTL Driving External Loads, 74C00 CMOS, CMOS Characteristics, TTL-to-CMOS Interface, CMOS-to TTL Interface

References Books :

1. Digital Principles and Applications, Donald P Leach, Albert Paul Malvino & Goutam Saha, 6th Edition, TMH, 2006.

2. Fundamentals of Digital Logic with Verilog Design, Stephen Brown, Zvonko Vranesic, TMH, 2006.

3. Fundamentals of Logic Design, Charles H. Roth, Jr., 5th Edition, Thomson, 2004. 4. Digital Systems Principles and Applications, Ronald J. Tocci, Neal S. Widmer, Gregory

L. Moss, 10th Edition, PHI/Pearson Education, 2007.

Page 9: Degree in Computer Science IV Sem

BICS-010 :FORMAL LANGUAGES AND AUTOMATA

Lectures Tutorials Practicals Credits Marks

3 1 -- 4

External: 70+Internal: 30.Students are required to score 45% marks

individually in both External & Internal and 50% marks in total.

UNIT I Basic concepts of Languages, Automata and Grammar.Regular Languages - Regular expression - finite automata equivalence, Myhill Nerode theorem and DFA State Minimization, Pumping Lemma and proof for existence of non-regular languages.

UNIT II Context Free languages, CFL-PDA equivalence, Pumping Lemma and prooffor existence of non- Context Free languages, CYK Algorithm,Deterministic CFLs.

UNIT III Turing Machines: recursive and recursively enumerable languages,Universality of Turing Machine, Church Thesis

UNIT IV Chomsky Hierarchy, Undecidability, Reducibility.

References:

1. M. Sipser, Introduction to the Theory of Computation, Thomson, 2001.

2. Hopcroft J. E., Rajeev Motwani, and Ullman J. D., Introduction to Automata Theory, Languages and Computation, Pearson Education Asia,2001.

3. J. C. Martin, Introduction to Languages and the Theory of Computation, Mc Graw Hill, 2002.

4 P. Linz, Introduction to Formal Languages and Automata, Narosa,1998RESOURCES : http://nptel.iitm.ac.in/courses/Webcourse-contents/IIT-%20Guwahati/afl/index.htm

Page 10: Degree in Computer Science IV Sem

BICSL-003 :LAB-VII (DATA STRUCTURES LAB)

1. Stack and Queue: Implementation using arrays and Linked lists 2. Searching Methods: Binary search and Hashing 3. Sorting: Recursive implementation of Quick Sort and Merge Sort

4. Binary Search Tree: Implementation with insertion, deletion and traversal 5. Infix Expression Evaluation: Using expression tree

6. Graph Search Algorithms: DFS and BFS on a connected directed graph 7. Minimal Sp 8. Shortest Path Algorithms: Dijkstra and Floyd Warshall Algorithms

9. Disjoint Set operations: Union and Find using rank and path compression. 10. Applications of Heap: Priority Queue and Heap Sort.

References Books :1. T. H. Cormen, C. E. Lieserson, R. L. Rivest, Introduction to Algorithms, PHI, 19982. S. Sahni, Data structures, Algorithms, and Applications in C++, McGraw Hill, 1998

Page 11: Degree in Computer Science IV Sem

BICSL-004 :LAB-VIII (LOGIC DESIGN LABORATORY)

1. a. Given any 4-variable logic expression, simplify using Entered Variable Map and realize the simplified logic expression using 8:1 multiplexer IC.

b. Write the Verilog /VHDL code for an 8:1 multiplexer. Simulate and verify its working.

2. a. Realize a full adder using 3-to-8 decoder IC and 4 input NAND gates.

b. Write the Verilog/VHDL code for a full adder. Simulate and verify its working.

3. a. Realize a J-K Master/Slave Flip-Flop using NAND gates and verify its truth table.

b. Write the Verilog/VHDL code for D Flip-Flop with positive-edge triggering. Simulate and verify its working.

4. a. Design and implement a mod-n (n<8) synchronous up counter using J-K Flip-Flop ICs.

b. Write the Verilog/VHDL code for mod-8 up counter. Simulate and verify its working.

5. a. Design and implement a ring counter using 4-bit shift register.

b. Write the Verilog/VHDL code for switched tail counter. Simulate and verify its working.

6. Design and implement an asynchronous counter using decade counter IC to count up from 0 to n (n<=9).

7. Design a 4-bit R-2R ladder D/A converter using Op-Amp. Determine its accuracy and resolution.

Note 1. Any simulation package like MultiSim/Pspice etc. may be used.