Impact of GND-PTH Stitches in

DDR3/GDDR3/GDDR5 Memory Controller

Packages

Hany Ahmad and Amolak Badesha

Agilent Technologies Inc.

5301 Stevens Greek Boulevard, Santa Clara, California, 95050

Abstract— DDR3 and GDDR3/5 memory technology running in

the Giga-bit range require 3D EM accurate modeling of RF

phenomena such as the impact of GND-PTH stitches (Ground

Plated Through Hole) used to connect reference ground-planes in

the Memory controller packages (MCH-PKG). Cost-reduction

requires minimizing the number of layers and vias on MCH-

PKG (micro-vias and PTH). Layout-Designers usually revert to

reduce the GND-PTH without studying the impact on the

performance. In this paper, Method of Moments (MoM) is used

to study the impact of GND-PTH on data eye-opening as well as

on Radiated-Emission of a DDR3 two-SODIMMs/channel

running at 1.33GB/s.

Keywords-component; DDR3, GDDR3/5, Memory-controller-

package, Method of Moments, GND-PTH, Radiated-Emission, eye-

diagram, Radiated-Emission of memory-channel, Antenna-Gain,

Convolution time-domain ADS engine.

I. INTRODUCTION

High-Speed-Digital Designers face every day a

tremendous challenge of high-performance interconnect-

channel design constrained by low-cost products while

pushing for speed-of-light time to market. Top-notch memory

technology (Rambus, DDR3, GDDR3 and GDDR5) running at

above 1.067GB/s with mm-wave spectral-content (<100ps

rise/fall-times) needs full-wave EM modeling of Return-path-

discontinuity (RPD) such as the impact of data-signals

changing layers and changing reference ground-planes in the

MCH-PKG. Layout-Designers tend to reduce the cost of

MCH-PKG by reducing the number of layers and also the

number of vias including GND-PTH. No single

process/method can model the complete memory channel

accurately: Frequency-domain full-wave EM modeling is

required to capture RF effects of the memory channel and is

used to optimize the channel performance in terms of ISI, x-

talk, jitter, monotonicity, eye-opening as well as Radiated-

Emission. Method of Moments (MoM) is best to model

accurately the interconnects on multi-layer structures in the

MCH/SDRAM package, Motherboard (MB), and Memory-

modules (DIMM) while FEM or VNA measurements are best

for modeling DIMM connectors. Transistor models (BSIM4)

are best to capture the I/O buffers’ critical parameters

including dynamic-I/O-buffer impedance. In this paper, we

combine the different technology-models (MoM S-parameters

of MCH-PKG, MB & DIMM + BSIM4 models of the I/Os +

VNA measured S-parameters of DIMM-connector) in the

time-domain convolution-engine of ADS (Agilent EEsof

Advanced Design System) to study the impact of GND-PTH

on data eye-opening as well as on Radiated-Emission of a

DDR3 two-SODIMMs/channel running at 1.33GB/s.

II. METHOD OF MOMENTS PROVIDING DESIGN-

GUIDELINES FOR MEMORY-CONTROLLER LOW-COST

PACKAGES

A. Memory System Definition and Establishing Correlation

Cutting corners, caused by speed-of-light products,

during the design process may result in neglecting to model

critical phenomena such as GND-PTH causing eye-collapse

and loss of memory performance due to Return-Path-

Discontinuity (RPD). In this paper we will show the

importance of GND-PTH on MCH-PKG for DDR3 two-

SODIMMs/channel in a notebook memory system as shown in

Figure 1. We used frequency-domain MoM [1] to study the

sensitivity of RPD in terms of proximity and number of GND-

PTH. As a result, we can develop routing guidelines for the

minimum GND-PTH requirements on MCH-PKGs for data

signals of the memory channel enabling cost-reduction.

Fig. 1 Notebook with two-SODIMMs/channel. Increased Density and pressure

for cost-reduction leads to high-risk design especially for memory-channel.

First, a correlation of the MoM S-parameter model

for a GDDR3 data-signal on 12-layer PCB is performed:

comparing to VNA measurements up to 20GHz on the data-

signals as shown in Fig. 2-a.

Fig. 2-a S-parameter Insertion-Loss Correlation of VNA measurements with Momentum Simulations on a data-signal for the GPU-card up to 20GHz.

Establishing correlation for S-parameter modeling of passive-interconnects sets up the required discretization parameters of MoM to extract accurate models for PCBs and packages in the frequency range of interest.

The interconnecting system of the memory channel in

Figure 2-b is consisted of: The controller package,

Motherboard (MB) and SODIMMs (each is 8-layers) are all

modeled using S-parameters with MoM. The connector S-

parameter is obtained from VNA measurements noting that it

can be also modeled accurately using FEM [2].

Fig. 2-b Interconnecting system for two-SODIMMs/ch. MOM used for the

multi-layer PCBs while VNA measurements is used for the connector.

B. Memory-Controller Package Modeling

A 3D EM modeling of the package is performed using

MoM as shown in Figure 3. We selected a portion of the

package encompassing a byte-lane (11-signals: 8-data-signals

and Strobe-deff-signals: DQS/DQS# and Data-Mask: DM)

that is at least 5λ away from all signals and vias where λ is

computed at the main harmonic of the channel (0.8GB/s:

minimum frequency of DDR3 technology). Data nets are

routed from the die-bump on layer-1 to layer-3 as shown in

Figure 4 where the ports are extended from the signal nets to

the ground-bumps on layer-1. Data nets are majorly routed as

symmetric-stripline with 30um referencing both ground-planes

on layers 2 and 4 to achieve the required impedance target of

40-ohms.

Fig 3 cookie cutter of the 8-layers controller package with MOM.

Fig. 4 data signals (blue 11-signals) routed from die-bumps on layer-1 to

layer-3 as symmetric-Stripline referencing ground planes layers-2 (red plane)

and 4 (brown plane).

Then the data nets are routed on layer-6 changing

reference ground-plane from layers-2/4 to ground-plane layer-

5 with ground stitches GND-PTH as shown in Figure 5 where

the core of 800um is located between layers-4 and 5.

Fig 5 data nets change routing from layer-3 to layer-6 (blue routing) and

changing referencing from ground-planes layers-2/4 to ground-plane layer-5

(red plane). GND-PTH are shown as blue-squares on the brown ground-plane

layer-4.

Accurate 3D EM modeling of the pads, micro-vias, GND-

PTH, interconnects, reference ground planes with layer

transition along with ground stitching are all required in such

data rates where the rise/fall times are in the range of mm-

wave power-spectral-density < 100ps at the die-bump.

III. GND-PTH IMPACT ON INSERTION-LOSS, NEXT (NEAR-

END CROSS-TALK0 AND FEXT (FAR-END CROSS-TALK)

We will study the impact of ground stitching required

on the controller package when data-nets change reference

planes across the core of the MCH-PKG to reach the MCH-

balls from the die-bumps as these signals are routed as single-

ended even running at such Giga-bit data rates to drive low-

cost memory technology. How many ground stitching is

required around signal transitions? How far need they be

away from signal transition? This is an important design

guideline for memory channel designers as it has a direct

implication on the performance (eye-opening and radiated-

emission) and cost of the controller package.

Figure 6 shows the Insertion-Loss (IL) of the data-

nets for the controller package when all GND-PTH stitches

(15 GND-PTH) exist (red signals) compared to the case of all

GND-PTH removed (pink) and compared to the case of only

3-PTH exist (blue). We can see almost 0.5dB delta when all

GND-PTH removed for the IL at 2.5GHz which may seem

fine compared to the cost-saving of removal of 15 GND-PTH

for an 8-layers 800um package technology. However, a look at

the near-end (NEXT) and far-end x-talk (FEXT) as shown in

Figures 7 and 8 clarifies the destructive impact of lack of

GND-PTH on the x-talk.

2 4 6 8 10 12 14 16 180 20

-6

-5

-4

-3

-2

-1

-7

0

freq, GHzdB(M

CH_PKG_0_PTH_Feb_16_2011_4pm

_a..S(1,2))

dB(S

(1,2))

dB(M

CP89E_S1_1437BGA35mm8L_073109_fin

al_release_Feb_25_2011_800um_3PTH_m

om_a..S(1

,2))

Fig. 6 Insertion-Loss and near-end/far-end x-talk studying the effect of GND-

PTH stitches around signal transitions.

2 4 6 8 10 12 14 16 180 20

-80

-60

-40

-20

-100

0

freq, GHzdB(M

CH

_PKG

_0_PTH

_Feb_16_2011_4pm

_a..S(1

,3))

m3

dB(S

(1,3

)) m5

dB(M

CP89E_S1_1437BG

A35m

m8L_073109_fin

al_

rele

ase_Feb_25_2011_800um

_3PTH

_m

om

_a..S(1

,3))

m4

m3ind Delta=dep Delta=27.733Delta Mode ON

-1.916E8m4ind Delta=dep Delta=10.111Delta Mode ON

-3.151E8

m5freq=dB(S(1,3))=-46.210

3.155GHz

Fig. 7 near-end x-talk studying the impact of GND-PTH stitching showing ~

30dB x-talk increase due to lack of GND-stitching at 3GHz.

2 4 6 8 10 12 14 16 180 20

-80

-60

-40

-20

-100

0

freq, GHzdB

(MC

H_P

KG

_0_P

TH

_Feb_16_2011_4pm

_a..S

(1,4

))

m6

dB

(S(1

,4)) m8

dB

(MC

P89E

_S

1_1437B

GA

35m

m8L_073109_fin

al_

rele

ase_Feb_25_2011_800um

_3P

TH

_m

om

_a..S

(1,4

))

m7

m6ind Delta=dep Delta=22.955Delta Mode ON

-5.144E6

m7ind Delta=dep Delta=9.876Delta Mode ON

-1.543E8

m8freq=dB(S(1,4))=-45.739

2.994GHz

Fig. 8 far-end x-talk destructive impact of lack of GND-PTH stitches showing

~ 20dB more x-talk at 3GHz.

Running 3D EM modeling was critical to capture the

destructive impact of lack of GND-PTH stitches pushed by

cost-reduction of the MCH-PKG that shows excessive x-talk

reaching 30dB for near-end and almost 20dB for far-end (at

3GHz). Why does the x-talk deteriorate a lot due to lack of

GND-PTH when signals change layer from layer-3 to layer-6

going to the MCH-balls? Plotting the surface current density

Js (Js = n x H) on the reference planes shows the reason

behind such explosion of the x-talk as we found the return-

current uses the closeby signal-PTHs (least-inductive-path) of

the neighbor data nets to move from ground-plane layer-4 to

ground-plane layer-5. The surface electric-current Js on

GND-plane layer-4 changes into displacement current Jd in

the gap between GND-Plane of layer-4 to the pad of the

Signal-PTH then to surface electric-current Js again on the

Signal-PTH of the signal down to Layer-5 and then move back

with similar mechanism to layer-5 reference GND-plane as

shown in Figures 9-a and 9-b below.

Fig. 9-a shows the surface electric-current Js couples to displacement current

Jd to the PTH of the closeby signal-PTH causing excessive x-talk caused by

the lack of GND-PTH.

Fig. 9-b The surface current on the excited signal-PTH as well as on neighbor

signal-PTH as well as on GND-PTH vias.

IV. EYE-OPENING IMPACT OF EXCESSIVE CROSS-TALK BY

LACK OF GND-PTH ON MEMORY-CONTROLLER-PACKAGES

MoM is also used for 3D EM modeling of the MB

routing as well as the SODIMMs R/C-F which is a heavy

loading memory configuration as shown in Figure 10 below.

Fig. 10 MOM S-parameter modeling of MB and SODIMMs R/C-F

The different technology models (S-parameters MoM

of MCH-PKG, MB and SODIMMs as well as VNA

measurement of the SODIMM connector) along with BSIM4

modeling of the I/Os are combined in a ADS-schematic editor

enabling to perform: A- voltage transfer function analysis

(AC-sweep) to study the complete channel performance up to

10GHz as shown in Figure 11 below and B-eye-diagram

analysis as shown in Figures 12-a and 12-b .

Fig. 11: Voltage-transfer function for two-SODIMMs/channel with R/C-F

populating both slots.

Figures 12-a & 12-b shows the comparison of eye-

opening impact of GND-PTH running at 1.33GB/s. We can

see clearly the impact of excessive x-talk on eye-opening in

terms of both voltage-margin and timing-margin.

0.2 0.4 0.6 0.8 1.0 1.2 1.40.0 1.6

0.6

0.8

1.0

0.4

1.2

time, nsec

Eye_P

robe1.D

ensity

Eye_P

robe2.D

ensity

Eye_P

robe3.D

ensity

Eye_P

robe4.D

ensity

Eye_P

robe5.D

ensity

Eye_P

robe6.D

ensity

Eye_P

robe7.D

ensity

Eye_P

robe8.D

ensity

Eye_P

robe9.D

ensity

0.2 0.4 0.6 0.8 1.0 1.2 1.40.0 1.6

-0.5

0.0

0.5

-1.0

1.0

time, nsec

EyeD

iff_

Pro

be1.D

ensity

Fig. 12-a showing the eye-opening for the original MCH-PKG with 15 GND-

PTH at 1.33GB/s.

0.2 0.4 0.6 0.8 1.0 1.2 1.40.0 1.6

0.5

0.6

0.7

0.8

0.9

1.0

1.1

0.4

1.2

time, nsec

Eye_P

robe1.D

ensity

Eye_P

robe2.D

ensity

Eye_P

robe3.D

ensity

Eye_P

robe4.D

ensity

Eye_P

robe5.D

ensity

Eye_P

robe6.D

ensity

Eye_P

robe7.D

ensity

Eye_P

robe8.D

ensity

Eye_P

robe9.D

ensity

0.2 0.4 0.6 0.8 1.0 1.2 1.40.0 1.6

-0.5

0.0

0.5

-1.0

1.0

time, nsec

EyeD

iff_

Pro

be1.D

ensity

Fig. 12-b showing the eye-opening for the modified MCH-PKG without

GND-PTH at 1.33GB/s.

Using the JEDEC standard [3] eye-mask for DDR3

memory channel (trapezoid from ViH/L(AC)=Vref+/=175mV

to ViH/L(DC)=Vref+/=100mV) shows that the original

package (15 GND-PTH) passes eye-mask requirements at

1.33GB/s with a minimum of 95ps for DQ-2-DQS setup

margin (Figure 13-a) while the lack of GND-PTH causes

failure of eye-mask which can lead to memory speed down-

binning to 1.067GB/s (as shown in Figures 13-b with worst-

case hold-margin of -30ps), therefore, a big loss of

competitive advantage.

1.5 2.0 2.5 3.0 3.51.0 4.0

100

120

140

160

180

200

220

240

80

260

Index

DQ_DQSSkewHoldRise.D

IMM1_63

m1

m1Index=DQ_DQSSkewSetupFall.DIMM1_62=96.929

2.000

Fig. 13-a DDR3-1.333GB/s eye-mask Setup/Hold margins shows worst setup

margin of ~ 95s with 15 GND-PTH.

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.80.0 2.0

0.5

0.6

0.7

0.8

0.9

1.0

1.1

0.4

1.2

time, nsec

Eye_P

robe1.D

ensity

Eye_P

robe2.D

ensity

Eye_P

robe3.D

ensity

Eye_P

robe4.D

ensity

Eye_P

robe5.D

ensity

Eye_P

robe6.D

ensity

Eye_P

robe7.D

ensity

Eye_P

robe8.D

ensity

Eye_P

robe9.D

ensity

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.80.0 2.0

-0.5

0.0

0.5

-1.0

1.0

time, nsec

EyeD

iff_

Pro

be1.D

ensity

Fig. 13-b DDR3-1.067GB/s data eye for the case of lack of GND-PTH

showing marginality even down-binning at 1.067GB/s.

GND-PTH on MCH-PKG are shown to be very

critical for enabling DDR3 memory system operation at high-

data rates such as 1.33GB/s. What is the minimum number of

GND-PTH to enable 1.33GB/s operation while performing

cost-reduction on the original-package? Figures 14-a and 14-b

show successful operation at 1.33GB/s with three GND-PTH

reduction down from fifteen GND-PTH with worst-case hold-

margin of 55ps with a loss of 40ps compared to the worst-

setup margin of 95ps with fifteen GND-PTH vias. Figure 16

shows that the GND-PTH is able to carry the return-path

current therefore reducing the amount of x-talk caused by such

return-path current travel through the signal-PTH.

0.2 0.4 0.6 0.8 1.0 1.2 1.40.0 1.6

0.5

0.6

0.7

0.8

0.9

1.0

1.1

0.4

1.2

time, nsec

Eye_P

robe1.D

ensity

Eye_P

robe2.D

ensity

Eye_P

robe3.D

ensity

Eye_P

robe4.D

ensity

Eye_P

robe5.D

ensity

Eye_P

robe6.D

ensity

Eye_P

robe7.D

ensity

Eye_P

robe8.D

ensity

Eye_P

robe9.D

ensity

0.2 0.4 0.6 0.8 1.0 1.2 1.40.0 1.6

-0.5

0.0

0.5

-1.0

1.0

time, nsec

EyeD

iff_

Pro

be1.D

ensity

Fig. 14-a DDR3-1.33GB/s eye diagram for three GND-PTH cost-reduction

down from 15 GND-PTH vias.

1.5 2.0 2.5 3.0 3.51.0 4.0

100

150

200

250

50

300

Index

DQ_DQSSkewHoldRise.D

IMM1_63

m1

m1Index=DQ_DQSSkewHoldRise.DIMM1_61=55.984

4.000

Fig. 14-b DDR3-1.33GB/s eye-mask Setup/Hold margin with worst-case

hold-margin of 55ps.

Figure 15 shows the location of the three GND-PTH

that led to successful operation at 1.33GB/s and also enabled

cost-reduction of twelve GND-PTH per byte-lane, therefore, a

total reduction of ninety-six GND-PTH for the DDR3 memory

channel routing on MCH-PKG (eight-byte-lanes). The cost

reduction can be seen further with multiple channels on the

MCH-PKG.

Fig. 15 showing the location of the most critical GND-PTH per byte lane

reducing 12 GND-PTH vias.

Fig. 16 Surface current on Signal-PTH and return-current on the neighbor

GND-PTH that is enough to provide successful operation with 3 GND-PTH

instead of 15 GND-PTH per byte lane.

Further analysis using MoM will show the comparison of

the Antenna-Gain of the MCH-PKG with 15 GND-PTH vs.

lack of GND-PTH vs. 3 GND-PTH to study the impact on

Radiated-Emission.

V. CONCLUSION

The paper shows the importance of driving design-

guidelines for GND-PTH on MCH-PKG as it has a destructive

impact on x-talk due to the return-current uses the neighbor

Signal-PTH as least-inductive return-path hence causing

excessive x-talk that collapse the data eye at high-data rates.

VI. ACKNOWLEDGEMENT

Special thanks to Giga-Test labs for S-parameter VNA

measurements.

VII. REFRENCES

[1] Harrington RF, Field Computation by Moment Methods, The MacMillan

Co., New York, 1968 .

[2] Yue Yan Pramanick, P., “Finite-element analysis of generalized V- and

W-shaped edge and broadside-edge-coupled shielded microstrip lines on

anisotropic medium,” IEEE-MTT transactions, vol. 49, issue # 9, 2001, pp.

1649-1657.

[3] DDR3 SDRAM JEDEC Standard, JESD79-3E