dc-bus capacitor rating of the back-to-back npc converters
DESCRIPTION
Alcalá University. Department of Electronics. DC-BUS capacitor rating of the back-to-back NPC converters. Emilio J. Bueno, Santiago Cóbreces, Francisco J. Rodríguez, Marta Alonso , Álvar Mayor, Francisco Huerta, Carlos Girón Department of Electronics. Alcalá University - PowerPoint PPT PresentationTRANSCRIPT
DC-BUS capacitor rating of the back-to-back NPC converters
Emilio J. Bueno, Santiago Cóbreces, Francisco J. Rodríguez, Marta Alonso, Álvar Mayor, Francisco
Huerta, Carlos GirónDepartment of Electronics. Alcalá University
[email protected] [email protected]
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Contents
• Introduction• Relation between DC-bus capacitors in converters
of two-levels and three-levels• INP calculation• Calculation of DC-bus capacitors:
– NPC VSC– Back to back NPC VSC
• Simulation and experimental results• Conclusions
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Contents
• Introduction• Relation between DC-bus capacitors in converters
of two-levels and three-levels• INP calculation• Calculation of DC-bus capacitors:
– NPC VSC– Back to back NPC VSC
• Simulation and experimental results• Conclusions
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Introduction• Converter structures for variable-speed wind turbines
back to back VSC• Increase of wind turbine power multilevel converters as
interface between generator and the utility grid• Multilevel topologyNPC
SAAEI 2006
Alcalá University Department of Electronics
Critical Design
DC-bus capacitors
Researching group in Control and Power Electronics Systems
Introduction
• DC-bus capacitors
• Efects of unbalance
• Aims of this presentation
SAAEI 2006
Alcalá University Department of Electronics
•Same factors of two-levels topology
•Low frequency ripple due iNPunbalance
•Over-voltages in power electronics devices and DC-bus capacitors
•Decrease of quality of currents
•Even an inappropiate operation
•Unbalance in the DC-bus capacitors due to iNP on a back-to-back converter
•Relating the ripples due to iNP e iDC
•Obtaining analytical equations for each ripple of a back-to-back converter
Researching group in Control and Power Electronics Systems
Contents
• Introduction• Relation between DC-bus capacitors in
converters of two-levels and three-levels• INP calculation• Calculation of DC-bus capacitors:
– NPC VSC– Back to back NPC VSC
• Simulation and experimental results• Conclusions
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Relation between DC-bus capacitors in two-levels and three-levels converters
• Two-levels converter– Working as PWM rectifier
• ΔuDC Maximum allowed ripple
• TSW IGBTs switching period
– Working as active filter
SAAEI 2006
Alcalá University Department of Electronics
DCDCbase
nDC uu
SC
2
DCDC
nSW
DC
SWDCDC uu
ST
u
TiC
22
(These expressions are valid for VSC connected to the grid with passive an active load)
ΔuDC 10%uDC
Sn 100kVA
TSW 400μs
Udc 610V
CDC≥537.5μF
CDC≥4277.2μF
Very conservative!Rectifier
Filter
Researching group in Control and Power Electronics Systems
Relation between DC-bus capacitors in two-levels and three-levels converters
SAAEI 2006
Alcalá University Department of Electronics
• Three-levels converter– CDC dependes on the low frequency ripple due to the NP current – fiNP = 3·fm
– Dynamic circuit of NP connection:
• Assumptions:– Each converter independently controlled– CP=CN=2CDC
– Only fundamental harmonics are considered 2P
NP
NPDCequiv
C
CC
CCC
DCNPNPequiv CCCC 2
Researching group in Control and Power Electronics Systems
Contents
• Introduction• Relation between DC-bus capacitors in converters
of two-levels and three-levels• INP calculation• Calculation of DC-bus capacitors:
– NPC VSC– Back to back NPC VSC
• Simulation and experimental results• Conclusions
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
INP Calculation• SVPWM: ma=1 and DPF=0
• SPWM: ma=1 and DPF=0
SAAEI 2006
Alcalá University Department of Electronics
0 50 100 150 200 250 300 350-150
-100
-50
0
50
100
150
inp
1(A
)
0 50 100 150 200 250 300 350-150
-100
-50
0
50
100
150
inp
2(A
)
0 50 100 150 200 250 300 350-150
-100
-50
0
50
100
150
inp
3(A
)
ang(deg)0 50 100 150 200 250 300 350
-150
-100
-50
0
50
100
150
inp
4(A
)
ang(deg)
titi basephaseNPbase
3cosˆ823
phasei74,0 • THSPWM
– Under the same condition the third order component is relatively smaller
Researching group in Control and Power Electronics Systems
Contents
• Introduction• Relation between DC-bus capacitors in converters
of two-levels and three-levels• INP calculation• Calculation of DC-bus capacitors:
– NPC VSC– Back to back NPC VSC
• Simulation and experimental results• Conclusions
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Calculation of DC-bus capacitors
• Harmonics components of the ripple of the DC-bus capacitors:
SAAEI 2006
Alcalá University Department of Electronics
Zero frequency
Conmutation frequency or high frequency ripple
Unbalance grid voltages or harmonics
(2 ωbase)
Two-levels converter
3 ω mod or low frequency ripple due to
iNP
The most restrictive!
Researching group in Control and Power Electronics Systems
Due to unbalances in the voltage of the two banks. (Depends on modulation
technique.)
If modulation signal has no offset
Equalization resistances
Three-levels converter
Calculation of DC-bus capacitors: NPC VSC
• Analysing the VSC1 working as active rectifier
SAAEI 2006
Alcalá University Department of Electronics
iDC ripple are exactly the same in CP and CNNO unbalance
iNP ripple is absorbed by CP and CN unbalance
ΔvP= ΔvN
10 10.002 10.004 10.006 10.008 10.01 10.012 10.014 10.016 10.018 10.02
-100
-50
0
50
100
I(A
)
10 10.002 10.004 10.006 10.008 10.01 10.012 10.014 10.016 10.018 10.02
450
500
550
V(V
)
10 10.002 10.004 10.006 10.008 10.01 10.012 10.014 10.016 10.018 10.02
-100
-50
0
50
100
time(s)
V(V
)
iNP
iP iN
vP vN
vNP
Variation of the voltages in the two banks of capacitors of a NPC in function of iNP
If iNP triangular baseNPTiQ ˆ24
1
If iNP sinusoidalbase
NPbaseNP
iTiQ
3
ˆˆ
6
1
Worst case
P
basephaseDC v
TiC
ˆ
3
23
CDC due to iNP
DC
baseNP
i
NPiNiP C
Tivvv
NP
NPNP 2
ˆ
6
1
2
phaseNP ii
base
ˆ8ˆ23
Researching group in Control and Power Electronics Systems
Calculation of DC-bus capacitors: NPC VSC
SAAEI 2006
Alcalá University Department of Electronics
CDC due to iDC
DCDC
SWnDC uu
TSC
2
Total ripple ripple iNP + ripple iDC Negligible
DCDC
SWnSW
DC
DCiDC
iNiP Cu
TST
C
iuvv DC
DCDC 422
1
2
DCDC
SWn
DC
basen
Cu
TS
C
Ti
42
ˆ8
6
1 2
0 10 20 30 40 50 60 70 80 90 1000
100
200
300
400
500
600
700
800
900
1000
uD
C (
V)
mf
Main ripple due to iNP
Main ripple due to iDC
Researching group in Control and Power Electronics Systems
f
baseDC m
Uu
28
33 3
Calculation of DC-bus capacitors: back-to-back NPC VSC
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
tititi NPINPRNP
iNPR and iNPI have different frequency capacitors for each frequency
iNPR = iNPI with the same frequency iNP = 0 0NPNP iNiP
vv
The worst situation iNP=2iNPI NPINPR iiP
basephaseDC v
TiC
ˆ
3
43
Contents
• Introduction• Relation between DC-bus capacitors in converters
of two-levels and three-levels• INP calculation• Calculation of DC-bus capacitors:
– NPC VSC– Back to back NPC VSC
• Simulation and experimental results• Conclusions
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Simulation and experimental results
Fsw 2.5kHz
Cp =CN 1000μF
Ri 0.075Ω
LI 0.75mH
fbase 25 Hz
Ubase 400V
Ri 0.075Ω
LI 0.75mH
fbase 50 Hz
Ubase 400V
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Inverter VSC2
Rectifier VSC1
ModulationTHSPWM
VvP 30
Simulation
23THSPWMam
VvP 30
Simulation and experimental results
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Experimental
VvP 30
Contents
• Introduction• Relation between DC-bus capacitors in converters
of two-levels and three-levels• INP calculation• Calculation of DC-bus capacitors:
– NPC VSC– Back to back NPC VSC
• Simulation and experimental results• Conclusions
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
Conclusions
• The analytical expressions to calculate DC-bus capacitors of a back-to-back three-level NPC converter are not only obtain but also verified through simulations and practical results.
• If a NP voltage controller is added, the DC-bus capacitors decrease.
• The highest value in CDC is obtained when grid voltage unbalances appearusing controllers is possible decrease this value too
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems
ACKNOWLEDGMENT
This work has been financied by the Spanish administration (ENE2005-08721-C04-01)
DC-BUS capacitor rating of the back-to-back NPC converters
Emilio J. Bueno, Santiago Cóbreces, Francisco J. Rodríguez, Marta Alonso, Álvar Mayor, Francisco
Huerta, Carlos GirónDepartment of Electronics. Alcalá University
[email protected] [email protected]
SAAEI 2006
Alcalá University Department of Electronics
Researching group in Control and Power Electronics Systems