dbh automotive program - dongbu hitek automotive...2 / 16 dbh automotive program dbh automotive...
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DBH Automotive Program
Aug, 2012
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DBH Automotive Program
DBH Automotive Quality Policy
– Driving Continuous Improvement to Supply Long-term Reliable Product
– Achieving Quality Level in All that We Do to Exceed Customer Expectations
– Screening Controls with Visibility & Traceability in the Manufacturing Process
All DBH Fabs Certified ISO/TS16949 since 2003
– Integrated Quality Management System
DBH Automotive Program
– Robust Technology & Design Kit
– Rigorous Process Qualification Criteria
– Closed-loop CIP (Continuous Improvement Plan) Flow
– Tightened Defect Management and Yield Performance
– FMEA (Failure Mode and Effect Analysis)
– 15 Years Record Retention
– Fully Equipped Failure Analysis & 8D Problem Solving
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Many Concentration Areas
Dongbu HiTek
Automotive
Package
Process Technology
Rich Component Set
Good Mis-Matching
Low Noise
Best-in-Class Ron
Design Kit
180C SPICE Models
IP Characterization
NVM Characterization
Robust ESD
Automotive IP
Differentiated Blocks
Proven IP Providers
IP Tailored to Process
Wafer Fabs
Rigorous Change Control
DPPM & Cpk Focus
Certifications
Dual-Fab Strategy
Reliability
Grade-0 Mission Profile
150C Characterization
Integral to Process Dev’t
Safe Operating Area
Ecosystem Partners
Automotive Expertise
Design Houses
Package Houses
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Technology Features
Baseline: 1P3M (up to 4M)
M1 Pitch: 1.0 µm
Top Metal: 3 μm Al (Option)
LVCMOS: 3.3V or 5V
HVCMOS: 8V
CMOS: Low-VT
CMOS: Isolated
BD350 – 0.35um, 60V Automotive Process
V-NPN LSD LDMOS 3.3V CMOS
NLDMOS: 7V – 60V
PLDMOS: 8V – 60V
DECMOS: 12V – 60V
NPN: 15V, 25V
RES: Poly 320, 2K Ω/sq
CAP: 5V MIM 1.87 fF/µm2
NVM: Fuse, MTP
PDK: Cadence, Others
Available: Now
Dev’d for Automotive
Char’d for Automotive
Qual’d for Automotive
P+ Substrate
NBL, Epi, & Deep N+
Guard Rings
Multiple Fabs
200 WAS Parameters
K’s of Wafers/Month
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Technology Features
MS180 – 0.18um, 1.8V/3.3V Automotive Process
0.18µm 1Poly 6Metal Dual Gox Process for Mixed Signal
Certified by Automotive Customer for Automotive Ethernet Solution
Devices
LV CMOS: 1.8V, HV CMOS : 3.3V
Isolated CMOS by Deep-Nwell (+1 mask)
PNP: 1.8V Vertical/Lateral, 3.3V Vertical
NPN: 1.8V Vertical
Capacitor: 3.3V MIM 1.0 fF/µm2 (+1 mask)
High-R Resistor: 1Kohm/sq (+1 mask)
Cadence Process Design Kits (PDK)
Standard Cell Library, IO, Memory Compiler
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DBH Certification Roadmap
Quality Management System
ISO/TS16949 (Dec.09, 2003, BSI / IATF) for Automotive
Occupational Health & Safety Management System
OHSAS18001 (Nov.03, 2004, URS / UKAS)
Information Security
ISO27001 (Oct.02, 2006, BSI / UKAS)
Environmental Management System
ISO14001(Jan.24, 2002, URS / UKAS)
Quality Management System
ISO9001(Dec.09, 2003, BSI / IATF)
ISO/TS16949
OHSAS18001
ISO27001
Sony GP
ISO9001
Green Partner Environmental
- Sony GP (Jun.12, 2006)
- Samsung S-P (Oct.15, 2010)
- QC 080000 HSPM
(Jun.19.2011)
ISO14001
Samsung S-P QC 080000
Quality Management
System
- ISO13485 for Medical
(Dec.13,2011, BSI/UKAS)
ISO13485
US Defense Military DLA Qualified Fab Supplier
- Nov.30,2011, US DLA (Defense Logistics Agency)
- Applicable Spec : MIL-PRF-38535 & MIL-STD-883
- Certified Fab Process : 0.18um Mixed Signal
& 0.35um BCD Process
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Automotive Market Product Areas
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Automotive Production Performance
Proven Track Record of Driving DPPM
Levels Down Over Time
Based on Data from Multiple Tier-1
Automotive Customers
US & Japan Regions
DPPM Focus During Development,
then into Production
• The data is provided by the DBH’s major customer.
• The DBH’s major customer provides this data to DBH
through the Quarterly Quality Review Meeting.
0
2
4
6
8
10
12
14
2005 2006 2007 2008 2009 2010 2011 2012
DPPM Trend (Tier-1)
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Automotive IP from Ecosystem Partners
The Analog POWERHouse™ Connection
World Class Technologies for
Analog and Power
Automotive Programs for Robust
Solutions
500+ Years Experience ISO 9001 Certified
LIN Transceiver • Compatible to LIN Spec Rev 2.1
• Operating voltage up to 27V
• Slew control for good EMI behavior
• LIN Bus pin DC range -40V to +40V
• Fully integrated input receiver filter
• Integrated power FET protection clamps on both gate and drain terminals
• Gate pre-drive control input is CMOS compatible, high impedance port with hysteresis
• Gate pre-drive monitors for On-state shorted-load and Off-state open-load fault protection
Low-Side FET Pre-driver
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Rigorous Process Qualification Criteria
Automotive Process Qualification
Quick WLR PLR
• Accelerated Lifetime Stress
- EFR, HTOL, THB
• Accelerated Environment
Stress
- HTS, LTS, PCT, TC
• Electrical Verification
- ESD, Latch-up
Intrinsic Component Level Reliability
Quick validation of devices during process development
• MOS HCI Reliability
• Interconnect Reliability
• Resistor Reliability
• Bipolar Reliability
• Diode Integrity
• Dielectric Integrity
• PMOS BTI
• IMD Integrity
• Transistor Reliability
- HCI @ NMOS
- BTI @ PMOS
- HE-SOA @ NLDMOS
& DENMOS
- Thermal SOA
- HTRB @ N/P LDMOS
& N/P DEMOS
• Gate Oxide Integrity @ N/PMOS
• EM @ Contact/Via, Metal
Test Vehicle Reliability for Process Development
Full WLR
• Quick WLR: quick wafer level reliability • Full WLR: component base reliability (wafer level / package level) • PLR: product level reliability (package level reliability )
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Extensive WLR Characterization
Weibull plot for TDDB
TTF plot for TDDB
HCI Lifetime HCI
Characterization
1 10 100 1000
1
10
40
70
95
99.5
99.999
Via fed lead_Metal 1 (width=0.4um)
Via fed lead_Metal 2 (width=0.4um)
Via fed lead_Metal 3 (width=0.4um)
Via fed lead_Metal 1 (width=3.0um)
Via fed lead_Metal 2 (width=3.0um)
Via fed lead_Metal 3 (width=3.1um)
Cu
m.
Fa
ilu
re (
%)
Design Dependency ( Hrs )
EM Characterization
exp( * ) * exp( )Ea
TTF A γ EkT
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Closed-Loop Continuous Improvement Plan
In-line Defect
SPC
PCM (WAT)
Yield
Incoming
Reliability
Monitoring Failure
Event Data analysis
Root
cause
verification
Corrective
action
8D report
1 page report
Control plan FMEA
CIP
Periodic CpK review
DM sampling
RPN prioritization
SEV, OCC, DET
8D approach
EFA, PFA
Abnormal
Quality issue
PCM (WAT) scrap
Low yield
Field return
Audit
Readiness
RPN* = Risk Priority Number SEV* = Severity , OCC* = Occurrence, DET* = Detection EFA* = Electrical Failure Analysis, PFA* = Physical FA
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DBH Automotive Audit Success
Tier-1 Supplier Audit
Audit Results:
1) Grade: A
2) Rating: “Strategic Component Supplier”
Audit Comments:
1) Very Clean Fab
2) Very Well Disciplined
3) Preparation for Our Audit Was Evident
4) Training Program Looks Excellent
5) Dongbu Has Been Very Cooperative
6) Excellent Job Responding to Open Items
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AEC-Q100 Qualification Requirements
Group A
Accelerated Environment Stress Tests
PC, THB, TC, HTSL
Group B
Life Tests
HTOL, ELFR, NVM
Group C
Package Assembly Integrity Tests
Bond Shear, Bond Pull, Solderability,
Solder Ball Shear, Lead Integrity
Group E
Electrical Verification Tests
Pre/Post Stress Test, ESD,
Latchup, Characterization
Group D
Die Fabrication Reliability Tests
EM, TDDB, HCI, NBTI, SM
Definitions:
PC = Pre-Conditioning
THB = Temperature Humidity Bias
TC = Temperature Cycling
HTSL = High Temperature Storage Life
HTOL = High Temperature Operating Life
ELFR = Early Life Failure Rate
NVM = Non-Volatile Memory (Endurance, Data Retention)
EM = Electro-Migration
TDDB = Time Dependent Dielectric Breakdown
HCI = Hot Carrier Injection
NBTI = Negative Bias Temperature Instability
SM = Stress Migration
Product Qualification Process Qualification
Group D Tests Are Fully
Supported by DBH
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15 years data retention
Document Period
Contract review document and record Indefinitely
Qualification document Indefinitely
Customer specification Indefinitely
Inspection and test data Min. 15 years
Product identification and traceability Min. 15 years
Lot history records Min. 15 years
Incoming inspection record Min. 15 years
Shipping report Min. 15 years
Internal audit recall and corrective action record Min. 15 years
Record retention
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Thank you