d65025l

NEC ELECTRONICS INC.

July 1999TRQ-99-07-330

QUARTERLY ASIC

RELIABILITY REPORTThis report contains reliability data on the following

Application-Specific Integrated Circuit familiesassembled by NEC Electronics Inc. in Roseville, California

(fabricated by NEC Japan or NEC Electronics Roseville as specified).

BiCMOS-4 CMOS-5 CB-C9

CMOS-3 CMOS-6 CB-C9VX/VM

CMOS-4 CMOS-6A UC-II

Prepared & Checked by: Approved by:

Signature on file Signature on file B. Howell K. MuranakaNEC Electronics Inc. NEC Electronics Inc.R&QC Department R&QC Department

Please refer all inquiries to:NEC Electronics Inc.

Reliability and Quality Control Department7501 Foothills Boulevard

Roseville, CA 95747Tel: (916) 786-3900

The information in this document is subject to change without notice. No part of this document may be copied or reproduced in any form orby any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors that mayappear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights, or other intellectualproperty rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. Nolicense, either express, implied, or otherwise, is granted under any patents, copyrights, or other intellectual property rights of NECCorporation or others. While NEC Corporation has been making a continuous effort to enhance the reliability of its semiconductor devices,the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect inan NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment,and anti-failure features. NEC devices are classified into the following three quality grades: "Standard," "Special," and "Specific." TheSpecific quality grade applies only to devices developed based on a customer-designated "quality assurance program" for a specificapplication. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the qualitygrade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, testand measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment, andindustrial robots. Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment, and medical equipment (not specifically designed for life support). Specific: Aircraft, aerospaceequipment, submersible repeaters, nuclear reactor control systems, and life-support systems or medical equipment for life support, etc.The quality grade of NEC devices is Standard unless otherwise specified in NEC's data sheets or data books. If customers intend to useNEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative inadvance. Anti-radioactive design is not implemented in this product.

NEC Electronics Inc. Roseville Manufacturing

2

Contents

Page

Failure Rate Prediction Philosophy .............................................................................................. 3

Table 1. Reliability Test Conditions ............................................................................................. 5

Table 2. Pretreatment Conditions for T/H, T/C, and PCT Tests ................................................... 6

Table 3. HTB Life Test Summary and Failure Rate Predictions ........................................................ 7

Table 4. Other Life Test Summaries (HTSL, HHSL, T/H) ................................................................. 12

Table 5. Environmental and Mechanical Test Summaries (T/C, PCT) .............................................. 17

Table 6. Environmental and Mechanical Test Summaries (LI, SD, TS) ............................................ 22

Table 7. Failure Summaries ................................................................................................................. 26

Table 8. CMOS-8L Process Family, Quarterly Reliability Data ......................................................... 27

Table 9. CB-C9 Process Family, Quarterly Reliability Data .............................................................. 27

Table 10. CB-C9VX/VM Process Family, Quarterly Reliability Data ............................................... 28

Table 11. UC-II Process Family, Quarterly Reliability Data .............................................................. 28

NEC Electronics Inc. is dedicated to the QCD principle

of providing the highest Quality product at the lowest

possible Cost with on-time Delivery to our customers.


3

This report contains reliability test results of ASICproducts subjected to routine Monitor Reliability Testing(MRT) at NEC. The products in this report wereassembled in Roseville and fabricated in either Rosevilleor Japan as specified. They are all representative ofNEC's manufacturing processes for ASIC products. Thisreport also contains failure rate predictions, which werecalculated using the Arrhenius method shown below.

Failure Rate Prediction Philosophy

When predicting the failure rate at a certain temperaturefrom accelerated life test data, various values of activationenergy corresponding to failure mechanisms should beconsidered. This is done whenever exact causes of failuresare known by performing failure analysis. In some cases,however, an average activation energy is assumed in orderto accomplish a quick first-order approximation. In thecase of ASIC devices, NEC assumes an activation energyof 0.5 eV for such approximations. This value has beenassessed from extensive reliability test results and yields aconservative failure rate.

Since most semiconductor failures are temperaturedependent, the Arrhenius relationship is used to normalizefailure rate predictions at a system operation temperatureof 55°C. The Arrhenius model includes the effects oftemperature and activation energy of the failuremechanisms. This model assumes that the degradation of aperformance parameter is linear with time. Thetemperature dependence is taken to be an exponentialfunction that defines the probability of occurrence. TheArrhenius equation for high-temperature stress is given asthe following:

A(T) =-Ea (

1jT -2jT )

k (1jT )(

2jT )e (1)

Where: A(T) ≡ Temperature acceleration factor

Ea ≡ Activation energy

Tj1 ≡ Junction temperature (in K)

at Ta1 = 55°C

Tj2 ≡ Junction temperature (in K) at Ta2 = 125°C

k ≡ Boltzmann's constant = 8.62 x 10-5 eV/K

The temperature contribution of the device's internalpower dissipation is significant enough that it cannot beignored. Therefore, the junction temperatures (Tj1 and Tj2)are used instead of the ambient temperatures (Ta1 and Ta2).If the thermal resistance of the device (junction to ambient)is known, it is possible to calculate the junctiontemperatures as follows:

jT = aT +( ja Pd)θ ⋅ (2)

Where: θja = Thermal resistance

Pd = Power dissipation

With this information, we can therefore calculate atemperature acceleration factor.

Having now predicted the overall acceleration factor forthe high-temperature operating life test, the failure rate canbe predicted at a 60% confidence level using the followingequation:

L =510

2T

χ2 ⋅(3)

Where: L ≡ Failure rate in %/1000 hours

χ2 ≡ The tabular value of chi-squared distribution at a given confidence level and calculated degrees of freedom (n = 2f + 2, where f = number of failures)

T ≡ Number of equivalent device hours = (Number of devices) x (number of test

hours) x (acceleration factor)

Exhibit Table: χ2 value for confidence level of 60% and90%

f 0 1 2 3

n 2 4 6 8

χ2 C.L. = 60% 1.83 4.04 6.21 8.35

C.L. = 90% 4.61 7.78 10.6 13.4


4

Exhibit Table: Acceleration factor for different Tj2 / Tj1

with different activation energy

Tj2 (°C)/Tj1 (°C) Acceleration Factor

0.3eV 0.5eV

(Typ)

0.7eV

125/55

125/70

125/80

125/90

125/100

125/110

125/120

6.47

4.07

3.05

2.32

1.80

1.41

1.12

22.5

10.4

6.42

4.08

2.66

1.77

1.20

78.0

26.4

13.5

7.16

3.93

2.22

1.30

150/55

150/70

150/80

150/90

150/100

150/110

150/120

10.8

6.82

5.12

3.90

3.01

2.36

1.87

53.2

24.5

15.2

9.66

6.29

4.19

2.85

261

88.2

45.1

24.0

13.1

7.43

4.33

Another method of expressing failures is as FIT (failures intime). One FIT is equal to one failure in 109 hours. SinceL is already expressed as %/1000 hours (10-5 failure/hr), aneasy conversion from %/1000 hours to FIT would be tomultiply the value of L by 109.

In conclusion, the failure rate of the whole process familyis expressed as follows:

L(FIT)2 109

2 T= ⋅

∑χ

(4)

Where summation ΣT is taken for all reliability testsperformed on the process family.

Note: Some of the estimated FIT rates are higher thanwould be expected due to small sample sizes; however,they are expected to lower as reliability monitor data isaccumulated.

Example

A sample of 960 devices was subjected to 1000 hours of125°C burn-in at 7.0 volts. One reject was observed. Giventhat the acceleration factor was calculated to be 34.6 (usingEquation 1), what is the failure rate, normalized to 55°C,using a confidence level of 60%? Express the failure ratein FIT.

Solution

For n = 2f + 2 = 2(1) + 2 = 4 X 2 = 4.04 (for 60%confidence level). Then,

LX 10

2T

X 10 (% /1000 hrs)

2(total device hrs)(accel factor)

2 5 2 5

= =· ·

= =·(4.04) 10

2(960)(1000)(34.6)0.0061 % /1000 hrs

5

Therefore,

FIT = 0.0061% 10

1000 hrs61

9·=


5

Table 1. Reliability Test Conditions

The reliability tests performed by NEC consist of high-temperature bias life (HTB), high-temperature storage life (HTSL), high-humidity storage life (HHSL), and high-temperature, high-humidity life (T/H = HHSL + bias). Additionally, variousenvironmental and mechanical tests are performed. The table below shows the conditions of various life tests, environmentaltests, and mechanical tests.

Test Item SymbolMIL-STD 883C

Method Test Conditions Remarks

High-temperature bias life HTB1

HTB2

1005 TA = 125°C

TA = 150°C

VDD

= VDD max.

Note 1

High-temperature storagelife

HTSL1

HTSL2

HTSL3

HTSL4

1008 TA = 150°C

TA = 175°C

TA = 200°C

TA = 250°C

Note 1

High-temperature/high-humidity bias life

T/H TA = 85°C; RH = 85%;

VDD

= VDD max.

Pretreatment as specified in Table 2, if any.

Note 1

High-humidity storage life HHSL TA = 85°C; RH = 85%


Note 1

Pressure cooker PCT TA = 125°C; P = 2.3 atm


Note 1

Temperature cycle T/C 1010 −65°C to 150°C


Note 1

Lead fatigue LI 2004 90° bends; 3 bends without breaking Note 2

Solderability SD 2003 230°C; 5 sec; rosin base flux Note 3

Soldering heat TS Note 4 260°C; 10 sec; rosin base flux

Temperature cycle 1010 10 cyc; 1 hr/cyc; −65°C to 150°C

Thermal shock 1011 15 cyc; 10 min/cyc; 0°C to 100°C Note 1

Notes: 1. Electrical test per data sheet is performed. Devices that exceed the data sheet limits are considered rejects.2. Broken lead is considered a reject.3. Less than 95% coverage is considered a reject.4. MIL-STD-750A, Method 2031.


6

Table 2. Pretreatment Conditions for T/H, T/C, and PCT Tests

Pretreatment Condition

A Infrared Reflow (230°C Peak)

B Vapor Phase Soldering (215°C Peak)

C Temp Humidity Bake (125°C, 4 hrs) + IR

C16 Cycling + Storage + Bake (125°C, 16 hrs) + IR

D (−65°C to 150°C, 20 cyc) (85°C/85% RH, 72 hrs) Bake (125°C, 4 hrs) + VPS

D16 Bake (125°C, 16 hrs) + VPS

E Lead Soldering (260°C, 10 sec)

◊◊!-1 Temp Humidity

Cycling + Bake + Storage +

Infrared Reflow (240°C Peak)

1 time

◊◊!-2 (-65°C to 150°C, (125°C, (30°C/70% RH,

20 cyc) ◊◊ hrs) ! days + 10 hrs)Infrared Reflow (240°C Peak)

2 times

◊◊!-3Infrared Reflow (240°C Peak)

3 times

◊◊ : Bake time! : Storage time:

2 → 58 hours

3 → 82 hours

7 → 178 hours

Example PCT with pretreatment 207–2 = T/C (20 cycles) → Bake (20 hours) → Humidity Storage (178 hours) → IR Reflow (2 times) → PCT


7

Table 3. HTB Life Test Summary and Failure Rate Predictions

This table summarizes the reliability test results of processes extensively used by most NEC ASIC products. The failure ratepredictions are based on both 125°C and 150°C high-temperature bias life test results. Failure rate predictions are shown forthe current period of available data and for past periods of cumulative data.

ProcessType

ProcessPeriod

AmbientTemp.

Numberof Devices

Accum.DeviceHours

No. ofFailures(Note 1)

Accel.Factor(Note 2)

Equiv.DeviceHours

Failure Rate55°C and 60%Confidence Level(Note 3)

3A. FABRICATED IN JAPAN, ASSEMBLED IN ROSEVILLE

D67070GF(100-pin QFP)

Jan 89–Jun 97 125°C 88 8.8 x 104 0 47


Oct 88–Jun 97 125°C 72 7.2 x 104 0 47

D67010L(68-pin PLCC)

Jan 89–Jun 97 125°C 136 1.36 x 105 0 47


Jul 91–Jun 97 125°C 24 2.4 x 104 0 47

BiCMOS Jan 89–Jun 99

(cumulative)

125°C 320 3.20 x 105 0 47 1.5 x 10

7 0.0061%/1000= 61 FIT

3B. FABRICATED IN JAPAN, ASSEMBLED IN ROSEVILLE


Jan 89–Jun 97 125°C 236 2.36 x 105 0 49

3C. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE


Jan 89–Jun 97 125°C 72 7.20 x 104 0 49

CMOS-3 Jan 89–Jun 99

(cumulative)

125°C 308 3.08 x 105 0 49 1.5 x 10

7 0.0061%/1000= 61 FIT

3D. FABRICATED IN JAPAN, ASSEMBLED IN ROSEVILLE


Jul 88–Jun 97 125°C 156 1.56 x 105 0 13.5


Jul 88–Jun 97 125°C 198 1.98 x 105 0 13.5


Apr 89–Jun 97 125°C 24 2.4 x 104 0 13.5


Oct 91–Jun 97 125°C 24 2.4 x 104 0 13.5


Oct 89–Jun 97 125°C 24 2.4 x 104 0 13.5


Apr 88–Jun 97 125°C 276 2.76 x 105 0 13.5


Apr 88–Jun 97 125°C 88 8.8 x 104 0 13.5


Jul 88–Jun 97 125°C 40 4.0 x 104 0 13.5


Jul 88–Jun 97 125°C 48 4.8 x 104 0 13.5

3E. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE


Oct 92–Jun 97 125°C 48 4.8 x 104 0 13.5


Jan 93–Jun 97 125°C 48 4.8 x 104 0 13.5


8

Table 3. HTB Life Test Summary (continued)

ProcessType

ProcessPeriod

AmbientTemp.

Numberof Devices

Accum.DeviceHours

No. ofFailures(Note 1)


Equiv.DeviceHours



Jan 93–Sep 98 125°C 144 1.44 x 105 0 13.5


Apr 91–Jun 97 125°C 312 3.12 x 105 0 13.5


Jan 92–Jun 97 125°C 48 4.8 x 104 0 13.5


Jan 96–Mar 98 125°C 72 7.2 x 104 0 13.5


Jan 93–Jun 98 125°C 168 1.68 x 105 0 13.5


Oct 91–Jun 98 125°C 120 1.20 x 105 0 13.5


Jul 91–Jun 97 125°C 48 4.8 x 104 0 13.5


Jan 92–Jun 97 125°C 72 7.1 x 104 2 13.5


Apr 88–Jun 97 125°C 144 1.44 x 105 0 13.5


Jan 93–Jun 97 125°C 24 2.4 x 104 0 13.5


Jan 93–Jun 97 125°C 48 4.8 x 104 0 13.5


Jan 95–Sep 98 125°C 72 9.6 x 104 0 13.5


Apr 90–Jun97 125°C 96 9.6 x 104 0 13.5


Apr 94–Jun 97 125°C 120 1.2 x 105 0 13.5

CMOS-4 Apr 88–Jun 99

(cumulative)

125°C 2462 3.10 x 106 2 13.5 4.19 x 10

7 0.00742%/1000

= 74 FIT

3F. FABRICATED IN JAPAN, ASSEMBLED IN ROSEVILLE


Jan 90–Jun 97 125°C 168 1.68 x 105 0 13.5


Jan 89–Jun 97 125°C 264 2.64 x 105 0 13.5


Jan 90–Jun 97 125°C 120 1.20 x 105 0 13.5


Apr 91–Jun 97 125°C 24 2.4 x 104 0 13.5

3G. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE


Oct 93–Jun 97 125°C 168 1.68 x 105 0 13.5

D65016GD(120-pin QFP)

Jan 96–Jun 97 125°C 24 2.4 x 104 0 13.5


Oct 92–Jun 97 125°C 144 1.44 x 105 0 13.5


Jul 91–Jun 97 125°C 48 4.8 x 104 0 13.5


9


Process

Type

Process

Period

AmbientTemp.

Numberof Devices

Accum.DeviceHours

No. ofFailures

(Note 1)


Equiv.DeviceHours

Failure Rate

55°°°°C and 60%Confidence Level(Note 3)


Apr 90–Jun 97 125°C 120 1.2 x 105 0 13.5


Jul 91–Jun 97 125°C 24 2.4 x 104 0 13.5


Jul 92–Jun 97 125°C 24 2.4 x 104 0 13.5


Jan 92–Jun 97 125°C 24 2.4 x 104 0 13.5


Jan 91–Dec 97 125°C 192 2.16 x 105 0 13.5


Oct 91–Jun 97 125°C 240 2.4 x 105 0 13.5

D65044L

(68-pin PLCC)

Jul 94–Jun 97 125°C 48 4.8 x 104 0 13.5

D65044L

(84-pin PLCC)

Oct 98–Dec 98 125°C 24 4.0 x 103 0 13.5


Jan 92–Jun 97 125°C 245 2.45 x 105 0 13.5


Oct 92–Jun 97 125°C 168 1.68 x 105 0 13.5

D65046GD

(160-pin QFP)

Apr 91–Mar 98 125°C 192 1.92 x 105 0 13.5


Jan 96–Sep 98 125°C 144 1.44 x 105 0 13.5


Jul 97–Sep 97 125°C 24 2.4 x 104 0 13.5

D65061L (68-pin PLCC)

Oct 96–Sep 98 125°C 72 7.2 x 104 0 13.5


Jan 90–Jun 97 125°C 120 1.2 x 105 0 13.5


Jan 91–Jun 97 125°C 240 2.4 x 105 0 13.5


Jul 93–Jun 97 125°C 24 2.4 x 104 0 13.5


Apr 93–Jun 97 125°C 48 4.8 x 104 0 13.5


Apr 93–Jun 97 125°C 24 2.4 x 104 0 13.5


Apr 90–Jun 98 125°C 480 5.04 x 105 0 13.5

D65103GD

(160-pin QFP)

Jan 93–Jun 97 125°C 48 4.8 x 104 0 13.5

D65103GD

(80-pin QFP)

Jul 97–Dec 97 125°C 48 4.8 x 104 0 13.5


Jan 90–Jun 97 125°C 144 1.44 x 105 0 13.5

CMOS-5 Jan 89–Jun 99(cumulative)

125°C 3677 3.70 x 106 0 13.5 5.00 x 10

7 0.00183%/1000

= 18 FIT


10


ProcessType

ProcessPeriod

AmbientTemp.

Numberof Devices

Accum.DeviceHours

No. ofFailure(Note 1)


Equiv.DeviceHours


3H. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE


Apr 96–Jun 97 125°C 24 2.4 x 104 0 22.5

D65632

(100-pin QFP)

Sep 97–Dec 97 125°C 24 2.4 x 104 0 22.5


Apr 97–Jun 98 125°C 96 1.20 x 105 0 22.5


Jan 94–Sep 98 125°C 264 2.64 x 105 0 22.5


Apr 94–Sep 98 125°C 316 3.16 x 105 0 22.5


Jul 94–Jun 97 125°C 48 4.8 x 104 0 22.5


Jul 94–Jun 97 125°C 24 2.4 x 104 0 22.5


Jul 92–Jun 97 125°C 72 7.2 x 104 0 22.5


Jul 93–Jun 97 125°C 48 4.8 x 104 0 22.5


Jan 92–Sep 97 125°C 384 3.84 x 105 0 22.5


Oct 93–Jun 97 125°C 96 9.6 x 104 0 22.5


Jan 92–Dec 98 125°C 264 2.44 x 105 0 22.5


Jan 91–Dec 97 125°C 216 2.16 x 105 0 22.5


Apr 95–Jun 98 125°C 120 1.20 x 105 0 22.5

CMOS-6A Nov 90–Jun 99

(cumulative)

125°C 1996 1.99 x 106 0 22.5 4.49 x 10

7 0.00204%/1000

= 20 FIT

3I. FABRICATED IN ROSEVILLE, ASSEMBLED IN JAPAN

D65841GJ

(144-pin QFP)

Mar 96–Aug 96 150°C 576 5.76 x 105 0 53.2

3J. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE

D65832GD

(208-pin QFP)

Jan 99–Jun 99 150°C 72 7.2 x 104 0 53.2

CMOS-8L Mar 96–Jun 99

(cumulative)

150°C 648 6.48 x 105 0 53.2 3.45 x 10

7 0.00265%/1000

= 27 FIT

3K. FABRICATED IN ROSEVILLE, ASSEMBLED IN JAPAN

TEG 1

(304-pin QFP)

May 97–Sep 97 125°C 24 4.8 x 104 0 22.5

TEG 2

(352-pin TBGA)

May 97–Sep 97 125°C 24 2.4 x 104 0 22.5


11


ProcessType

ProcessPeriod

AmbientTemp.

Numberof Devices

Accum.DeviceHours

No. ofFailure(Note 1)


Equiv.DeviceHours


3L. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE


Oct 98–Dec 98 125°C 48 4.8 x 104 0 22.5

CB-C9 May 97–Jun 99

(cumulative)

125°C 96 1.2 x 105 0 22.5 2.70 x 10

6 Note 4

3M. FABRICATED IN ROSEVILLE, ASSEMBLED IN JAPAN

TEG 1

(304-pin QFP)

Apr 98–Jun 98 150°C 47 4.7 x 104 0 53.2

3N. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE

D82286S1(272-pin PBGA)

Oct 98–Dec 98 150°C 72 7.2 x 104 0 53.2

D82287S1

(272-pin PBGA)

Jan 99–Mar 99 150°C

125°C

112

481.12 x 10

5

4.8 x 104

0

0

53.2

22.5

CB-C9VX/VM Apr 98–Jun 99

(cumulative)

150°C

125°C

231

482.31 x 10

5

4.8 x 104

0 53.2

22.51.34 x 10

7 0.00684%/1000

= 68 FIT

3O. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE


Apr 99–Jun 99 150°C 48 4.8 x 104 0 53.2

UC-II Apr 99–Jun 99

(cumulative)

150°C 48 4.8 x 104 0 53.2 2.55 x 10

6 Note 4

Notes: 1. Details of failures are given in Table 7.

2. The acceleration factor was calculated using the Arrhenius mathematical model shown on page 3.

3. FIT was derived from HTB data for all available time periods (devices included in this and all previous ASIC reports issued by NEC Electronics on Japan- and Roseville-made devices).

4. Some of the FIT rates were not calculated due to small sample sizes. In these cases, the FIT rates would not be meaningful. NEC expects a FIT rate of less than 100 for ASIC device types (target not to exceed 150).


12

Table 4. Other Life Test Summaries (HTSL, HHSL, T/H)

This table summarizes the reliability test results of the different process types during 150°C storage and 85°C/85% RHstorage and bias tests. The data is summarized for the current period of available data and for past periods of cumulativedata.

Process

Type

Process

Period

HTSL Failures Hours

HHSL Failures Hours

T/H FailuresHours

Qty 168 500 1000 Qty 168 500 1000 Qty 168 500 1000



Jan 89–Jun 97 80 0 0 0 0 - - - 64 0 0 0


Oct 88–Jun 97 60 0 0 0 0 - - - 72 0 0 0


Jan 89–Jun 97 120 0 0 0 0 - - - 136 0 0 0


Jul 91–Jun 97 20 0 0 0 0 - - - 24 0 0 0

BiCMOS Jan 89–Jun 99

(cumulative)

280 0 0 0 0 - - - 296 0 0 0



Jan 89–Jun 97 200 0 0 0 0 - - - 235 0 0 0



Jul 90–Jun 97 60 0 0 0 0 - - - 72 0 0 0


(cumulative)

260 0 0 0 0 - - - 307 0 0 0



Jul 88–Jun 97 140 0 0 0 0 - - - 156 0 0 0


Jul 88–Jun 97 182 1 0 0 0 - - - 206 0 0 0


Apr 89–Jun 97 20 0 0 0 0 - - - 24 0 0 0


Oct 91–Jun 97 20 0 0 0 0 - - - 24 0 0 0


Oct 89–Jun 97 20 0 0 0 0 - - - 24 0 0 0


Apr 88–Jun 97 240 0 0 0 0 - - - 276 0 0 0


Apr 88–Jun 97 80 0 0 0 0 - - - 87 0 0 0


Jul 88–Jun 97 20 1 0 0 0 - - - 20 0 0 0



Oct 92–Jun 97 40 0 0 0 0 - - - 48 0 0 0

D65012L(80-pin QFP)

Jan 93–Jun 97 40 0 0 0 0 - - - 48 0 0 0

Note: Details of failures are given in Table 7.


13

Table 4. Other Life Test Summaries (HTSL, HHSL, T/H) (continued)

Process

Type

Process

Period

HTSL Failures Hours

HHSL Failures Hours

T/H FailuresHours

Qty 168 500 1000 Qty 168 500 1000 Qty 168 500 1000


Jan 93–Sep 98 120 0 0 0 0 - - - 144 0 0 0


Apr 91–Jun 97 240 0 0 0 0 - - - 288 0 0 0


Jan 92–Jun 97 40 0 0 0 0 - - - 48 0 0 0


Feb 96–Mar 98 60 0 0 0 0 - - - 72 0 0 0


Apr 95–Jun 98 140 1 0 0 0 - - - 168 0 0 0


Oct 91–Jun 98 100 0 0 0 0 - - - 120 0 0 0


Jul 91–Jun 97 40 0 0 0 0 - - - 48 0 0 0


Jan 92–Jun 97 80 0 0 0 0 - - - 96 0 0 0


Apr 88–Jun 97 120 0 0 0 0 - - - 144 0 0 0


Jan 93–Jun 97 20 0 0 0 0 - - - 24 0 0 0


Jan 93–Jun 97 40 0 0 0 0 - - - 24 1 0 0


Jan 95–Sep 98 60 0 0 0 0 - - - 72 0 0 0


Apr 90–Jun 97 80 0 0 0 0 - - - 96 0 0 0


Apr 94–Jun 97 100 0 0 0 0 - - - 120 0 0 0


(cumulative)

2042 3 0 0 0 - - - 2377 1 0 0



Jan 90–Jun 97 140 0 0 0 0 - - - 168 0 0 1


Jan 89–Jun 97 220 0 0 0 0 - - - 184 0 0 0

D65061GF

(100-pin QFP)

Jan 90–Jun 97 100 0 0 0 0 - - - 120 0 0 0


Apr 91–Jun 97 20 0 0 0 0 - - - 24 0 0 0



Oct 93–Jun 97 120 0 0 0 125 0 0 0 144 0 0 1


Jan 96–Jun 97 20 0 0 0 25 0 0 0 24 0 0 0



14


Process

Type

Process

Period

HTSL Failures Hours

HHSL Failures Hours

T/H FailuresHours

Qty 168 500 1000 Qty 168 500 1000 Qty 168 500 1000


Oct 92–Jun 97 100 0 0 0 150 0 0 0 144 0 0 0


Jul 95–Jun 97 40 0 0 0 50 0 0 0 48 0 0 0


Apr 90–Jun 97 120 0 0 0 100 0 0 0 96 0 0 0


Jul 92–Jun 97 20 0 0 0 25 0 0 0 24 1 0 0


Jul 92–Jun 97 20 0 0 0 25 0 0 0 24 0 0 0


Jan 92–Jun 97 20 0 0 0 25 0 0 0 24 0 0 0


Jan 91–Dec 97 1420 0 0 0 200 0 0 0 192 0 0 0

D65032G(100-pin QFP)

Oct 91–Jun 97 200 0 0 0 250 0 0 0 240 0 0 0


Jul 94–Jun 97 40 0 0 0 50 0 0 0 48 0 0 0


Oct 98–Dec 98 20 0 - - 25 0 - - 24 0 - -


Jan 92–Jun 97 180 0 0 0 220 0 0 0 216 1 0 1


Oct 92–Jun 97 140 0 0 0 150 0 0 0 164 0 0 0


Apr 91–Mar 98 160 0 0 0 200 0 0 0 192 0 0 0


Jan 96–Sep 98 120 0 0 0 150 0 0 0 144 0 0 0


Jul 97–Sep 97 20 0 0 0 25 0 0 0 24 0 0 0


Apr 97–Sep 98 40 0 0 0 50 0 0 0 48 0 0 0


Jan 90–Jun 97 100 0 0 0 150 0 0 0 120 0 0 0

D65061GD

(136-pin QFP)

Jan 92–Jun 97 180 0 0 0 250 0 0 0 240 0 0 0


Jul 93–Jun 97 20 0 0 0 25 0 0 0 24 0 0 0


Apr 93–Jun 97 40 0 0 0 50 0 0 0 48 0 0 0


Oct 92–Jun 97 20 0 0 0 25 0 0 0 24 0 0 0


Apr 93–Jun 97 20 0 0 0 25 0 0 0 24 0 0 0


Apr 90–Jun 98 440 0 0 0 450 0 0 0 432 0 0 0



15


Process

Type

Process

Period

HTSL Failures Hours

HHSL Failures Hours

T/H FailuresHours

Qty 168 500 1000 Qty 168 500 1000 Qty 168 500 1000


Jul 97– Dec 97 40 0 0 0 50 0 0 0 48 0 0 0


Jan 93–Jun 97 40 0 0 0 50 0 0 0 48 0 0 0


Jan 90–Jun 97 120 0 0 0 150 0 0 0 144 0 0 0


(cumulative)

3040 0 0 0 3070 0 0 0 3468 2 0 3



Apr 96–Jun 97 20 0 0 0 24 0 0 0 24 0 0 0

D65632

(100-pin QFP)

Sep 97–Dec 97 20 0 0 0 25 0 0 0 24 0 0 0


Apr 97–Jun 98 80 0 0 0 100 0 0 0 96 1 0 0


Jan 95–Sep 98 180 0 0 0 225 0 0 0 216 0 0 0


Apr 94–Sep 98 260 0 0 0 320 0 0 0 312 0 0 0


Jul 94–Jun 97 40 0 0 0 50 0 0 0 48 0 0 0


Jul 95–Jun 97 20 0 0 0 25 0 0 0 24 0 0 0


Jul 92–Jun 97 60 1 0 0 75 0 0 0 72 0 0 0


Jul 93–Jun 97 40 0 0 0 50 0 0 0 48 0 0 0


Jan 92–Sep 97 320 0 0 0 400 0 0 0 384 0 0 0


Oct 93–Jun 97 80 0 0 0 100 0 0 0 96 0 0 0


Jan 92–Dec 98 220 0 0 0 275 0 0 0 264 0 0 0


Jan 91–Dec 97 179 0 0 0 225 0 0 0 216 0 0 1


Apr 95–Jun 98 100 0 0 0 100 0 0 1 120 0 0 0

CMOS-6, 6A Jan 88–Jun 99

(cumulative)

1619 1 0 0 1994 0 0 1 1944 1 0 1


D65841GJ

(144-pin QFP)

Mar 96–Jan 97 0 - - - 0 - - - 264 0 0 0

D65848GN

(240-pin TAB QFP)

Mar 96–Jan 97 0 - - - 0 - - - 264 0 0 0

D65895GL

(304-pin QFP FP)

Mar 96–Dec 96 0 - - - 0 - - - 240 0 0 0



16


Process

Type

Process

Period

HTSL Failures Hours

HHSL Failures Hours

T/H FailuresHours

Qty 168 500 1000 Qty 168 500 1000 Qty 168 500 1000

D65895S1

(352-pin PBGA)

Mar 96–Dec 96 0 - - - 0 - - - 240 0 0 0


D65832GD

(208-pin QFP)

Jan 99–Jun 99 60 0 0 0 0 - - - 72 0 0 0

CMOS-8L Mar 96–Jun 99

(cumulative)

60 0 0 0 0 - - - 1080 0 0 0


TEG 1

(304-pin QFP)

May 97-Sep 97 20 0 0 0 0 - - - 24 0 0 0

TEG 2

(352-pin TBGA)

May 97-Sep 97 24 0 0 0 0 - - - 24 0 0 0


D82174GD

(160-pin QFP)

Jan 99–Mar 99 0 - - - 0 - - - 48 0 0 0

CB-C9 May 97–Jun 99

(cumulative)44 0 0 0 0 - - - 96 0 0 0

4M. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE


Oct 98–Dec 98 0 - - - 0 - - - 144 0 0 0


Jan 99–Mar 99 20 0 0 0 0 - - - 72 0 0 0

CB-C9VX/VM Oct 98–Jun 99

(cumulative)20 0 0 0 0 - - - 216 0 0 0



Apr 99–Jun 99 0 - - - 0 - - - 48 0 0 0

UC-II Apr 99–Jun 99

(cumulative)0 - - - 0 - - - 48 0 0 0



17

Table 5. Environmental and Mechanical Test Summaries (T/C, PCT)

This table summarizes the environmental and mechanical test results of the different process types. The datais summarized for the current period and for past periods of cumulative data.

Process

Type

Process

Period

T/C Failures

Cycles

PCT Failures

Hours

Qty 100 300 Qty 96 192



Jan 89–Jun 97 90 0 0 60 0 0


Oct 88–Jun 97 72 0 0 60 0 0


Jan 89–Jun 97 166 0 0 40 0 0


Jul 91–Jun 97 25 0 0 20 0 0

BiCMOS Oct 88–Jun 99(cumulative)

353 0 0 180 0 0



Jan 89–Jun 97 219 0 0 0 - -



Jan 89–Jun 97 75 0 0 0 - -

CMOS-3 Jan 89–Jun 99(cumulative)

294 0 0 0 - -



Jul 88–Jun 97 158 0 0 0 - -


Jul 88–Jun 97 130 0 0 0 - -


Apr 89–Jun 97 25 0 0 0 - -


Oct 91–Jun 97 25 0 0 0 - -


Oct 89–Jun 97 25 0 0 0 - -


Apr 88–Jun 97 280 0 1 0 - -


Apr 88–Jun 97 65 0 0 0 - -


Jul 88–Jun 97 20 0 0 0 - -


Jul 88–Jun 97 48 0 - 0 - -



Oct 92–Jun 97 50 0 0 40 0 0


Jan 92–Jun 97 50 0 0 40 0 0


Jan 93–Sep 98 150 0 0 120 0 0


18

Table 5. Environmental and Mechanical Test Summaries (T/C, PCT) (continued)

Process

Type

Process

Period

T/C FailuresCycles

PCT FailuresHours

Qty 100 300 Qty 96 192


Apr 91–Jun 97 300 0 0 180 0 0


Jan 92–Jun 97 50 0 0 40 0 0


Feb 96–Mar 98 75 0 0 60 0 0


Apr 95–Jun 98 175 0 0 140 8 0


Oct 91–Jun 98 125 0 0 100 1 0


Jul 91–Jun 97 50 0 0 40 0 0


Jan 92–Jun 97 75 0 0 60 0 0


Apr 88–Jun 97 150 0 0 0 - -


Jan 92–Jun 97 25 0 0 20 0 0


Jan 93–Jun 97 50 0 0 40 2 0


Jan 95–Sep 98 75 0 0 60 0 0


Apr 90–Jun 97 100 0 0 80 0 0


Apr 94–Jun 97 125 0 0 100 0 0

CMOS-4 Apr 88–Jun 99

(cumulative)

2401 0 1 1120 11 0



Jan 90–Jun 97 175 0 0 0 - -


Jan 89–Jun 97 275 0 0 0 - -


Jan 90–Jun 97 120 0 0 0 - -


Apr 91–Jun 97 25 0 0 0 - -



Oct 93–Jun 97 150 1 0 120 0 0


Jan 96–Jun 97 25 0 0 20 0 0


Oct 92–Jun 97 144 0 0 80 0 0


Oct 93–Jun 97 50 0 0 40 0 0


Apr 90–Jun 97 120 0 0 0 - -


19


Process

Type

Process

Period

T/C FailuresCycles

PCT FailuresHours

Qty 100 300 Qty 96 192


Jul 91–Jun 97 25 0 0 20 0 0


Jul 92–Jun 97 25 0 0 20 0 0


Jan 92–Jun 97 25 0 0 20 0 0


Jan 91–Dec 97 200 0 0 80 1 0


Oct 91–Jun 97 250 0 0 180 0 0


Jul 94–Jun 97 50 0 0 40 0 0


Oct 98–Dec 98 25 0 0 20 0 0


Jan 92–Jun 97 250 0 0 120 0 0


Oct 92–Jun 97 150 0 0 140 0 0


Apr 91–Mar 98 200 0 1 60 0 0


Jan 96–Sep 98 150 0 0 120 0 0


Jul 97–Sep 97 25 0 0 20 0 0


Oct 96–Sep 98 75 0 0 60 0 2


Jan 90–Jun 97 120 0 0 100 0 0


Jan 91–Jun 97 225 0 1 120 0 0


Jul 93–Jun 97 25 0 0 20 0 0


Apr 93–Jun 97 50 0 0 40 0 0


Oct 92–Jun 97 25 0 0 20 0 0


Apr 93–Jun 97 25 0 0 20 0 0


Apr 90–Jun 98 496 2 2 300 1 1


Jul 97–Dec 97 50 0 0 40 0 0


Jan 93–Jun 97 50 0 0 40 0 0

D65180GF

(160-pin QFP)

Jan 90–Jun 97 120 0 0 80 0 0


20


Process

Type

Process

Period

T/C FailuresCycles

PCT FailuresHours

Qty 100 300 Qty 96 192

CMOS-5 Jul 88–Jun 99 (cumulative)

3720 3 4 1940 2 3



Apr 96–Jun 96 25 0 0 20 0 0

D65632

(100-pin QFP)

Sep 97–Dec 97 25 0 0 20 0 0


Apr 97–Jun 98 100 0 0 80 0 0


Jan 94–Sep 98 300 0 1 200 1 0


Apr 94–Sep 98 275 0 0 220 0 0


Jul 94–Jun 97 50 0 0 40 0 0


Jul 95–Jun 97 25 0 0 20 0 0


Jul 91–Jun 97 75 0 0 70 0 0


Jul 93–Jun 97 50 0 0 40 0 0


Jan 92–Sep 97 375 0 0 320 0 0


Oct 93–Jun 97 100 0 0 80 0 0


Jan 92–Dec 98 270 0 0 220 0 0


Jan 91–Dec 97 225 0 0 160 1 0


Apr 95–Jun 98 125 0 0 100 0 0

CMOS-6, 6A Jul 91–Jun 99(cumulative)

2020 0 1 1590 2 0


D65841GJ

(144-pin QFP)

Mar 96–Jan 97 250 0 0 240 0 0

D65848GN

(240-pin TAB QFP)

Mar 96–Jan 97 125 0 0 120 0 0

D65895GL

(304-pin QFP FP)

Mar 96–Dec 96 150 0 0 144 0 0

D65895S1

(352-pin PBGA)

Mar 96–Dec 96 100 0 0 72 0 0


D65832GD

(208-pin QFP)

Jan 99–Jun 99 150 0 0 60 0 0


21


Process

Type

Process

Period

T/C FailuresCycles

PCT FailuresHours

Qty 100 300 Qty 96 192

CMOS-8L Mar 96–Jun 99(cumulative)

775 0 0 636 0 0


TEG 1

(304-pin QFP)

May 97–Sep 97 25 0 0 20 0 0

TEG 2

(352-pin TBGA)

May 97–Sep 97 25 0 0 0 - -


D82174GD

(160-pin QFP)

Jan 99–Mar 99 50 0 0 40 0 0

CB-C9 May 97–Jun 99(cumulative)

100 0 0 60 0 0

5M. FABRICATED IN ROSEVILLE, ASSEMBLED IN JAPAN

TEG 1

(304-pin QFP)

Apr 98-Jun 98 25 0 0 0 - -


D82286S1

(272-pin PBGA)

Oct 98–Dec 98 231 0 0 231 0 0

D82287S1

(272-pin PBGA)

Jan 99–Mar 99 25 0 0 20 0 0

CB-C9VX/VM Apr 98–Jun 99(cumulative)

281 0 0 251 0 0

5O. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE

D83901S1

(320-pin PBGA)

Apr 99–Jun 99 154 0 0 52 0 0

UC-II Apr 99–Jun 99(cumulative)

154 0 0 52 0 0



22

Table 6. Environmental and Mechanical Test Summaries (LI, SD, TS)

This table summarizes the environmental and mechanical test results of the different process types. The datais summarized for the current period and for past periods of cumulative data.

Process Process LI SD TS

Type Period Qty No. of Fail Qty No. of Fail Qty No. of Fail



Jan 89–Jun 97 0 - 0 - 82 0


Jul 91–Jun 97 0 - 0 - 18 0

BICMOS Jan 89–Jun 99

(cumulative)

0 - 0 - 100 0



Jul 88–Jun 97 0 - 0 - 76 0


Jul 88–Jun 97 0 - 0 - 58 0


Oct 91–Jun 97 0 - 0 - 18 0


Oct 89–Jun 97 0 - 0 - 18 0


Apr 88–Jun 97 0 - 0 - 138 0


Apr 88–Jun 97 0 - 0 - 48 0


Jul 88–Jun 97 0 - 0 - 10 0



Oct 92–Jun 97 0 - 5 0 18 0


Jan 92–Jun 97 10 0 10 0 36 0


Jan 93–Dec 97 0 - 10 0 0 -


Apr 91–Sep 98 55 0 55 0 180 0


Jan 92–Jun 97 0 - 5 0 18 0

D65031(68-pin PLCC)

Sep 97–Mar 98 0 - 10 0 0 -


Apr 95–Jun 98 0 - 40 0 126 0


Oct 91–Jun 98 20 0 25 0 72 0


Jul 91–Jun 97 0 - 5 0 54 0


23

Table 6. Environmental and Mechanical Test Summaries (LI, SD, TS) (continued)




Jan 92–Jun 97 0 - 10 0 36 1


Jan 93–Jun 97 5 0 5 0 18 0


Jan 93–Jun 97 5 0 5 0 36 0

D65070L

(84-pin PLCC)

Jan 95–Sep 98 0 - 15 0 36 0


Apr 90–Jun 97 0 - 10 0 54 0


Apr 94–Jun 97 10 0 10 0 72 0

CMOS-4 Apr 88–Jun 99(cumulative)

105 0 225 0 1140 1



Jan 90–Jun 97 0 - 0 - 126 0


Jan 89–Jun 97 0 - 0 - 72 0


Apr 91–Jun 97 0 - 0 - 18 0



Oct 93–Jun 97 20 0 20 0 90 0


Jan 96–Jun 97 5 0 4 0 18 0


Oct 92–Jun 97 0 - 15 0 90 0


Jul 95–Jun 97 10 0 10 0 36 0


Jul 91–Jun 97 5 0 5 0 18 0


Jan 92–Jun 97 5 0 5 0 18 0


Jan 91–Dec 97 0 - 20 0 108 0


Jul 94–Jun 97 0 - 0 - 36 0


Oct 98–Dec 98 0 - 5 0 0 -


Jan 92–Jun 97 40 0 40 0 126 0


24





Oct 92–Jun 97 35 0 35 0 126 0


Apr 91–Mar 98 10 0 15 0 120 0


Jan 96–Sep 98 25 0 25 0 54 0


Oct 96–Sep 98 0 - 5 0 36 0


Jan 90–Jun 97 5 0 5 0 18 0


Jan 91–Jun 97 50 0 50 0 180 0


Jul 93–Jun 97 5 0 5 0 18 0


Apr 93–Jun 97 10 0 10 0 36 0


Apr 93–Jun 97 5 0 5 0 18 0


Apr 90–Jun 98 0 - 45 0 216 0


Jul 97–Dec 97 5 0 10 0 18 1


Jan 93–Jun 97 5 0 5 0 36 0


Jan 90–Jun 97 5 0 5 0 54 0

CMOS-5 Jul 88–Jun 99(cumulative)

245 0 349 0 1710 1

6F. FABRICATED IN ROSEVILLE, ASSEMBLED IN ROSEVILLE


Apr 96–Jun 97 5 0 5 0 18 0

D65632(100-pin QFP)

Sep 97–Dec 97 0 - 5 0 0 -


Apr 97–Jun 98 10 0 15 0 36 0


Jan 94–Sep 98 40 0 40 0 144 0


Apr 92–Sep 98 50 0 60 0 162 0


Jul 94–Jun 97 10 0 10 0 36 0


Jul 95–Jun 97 5 0 5 0 18 0


25





Jul 91–Jun 97 15 0 15 0 54 0


Jul 93–Jun 97 10 0 10 0 36 0


Jan 92–Sep 97 45 0 45 0 234 0


Oct 93–Jun 97 20 0 20 0 72 0


Jan 92–Dec 98 40 0 39 0 126 0


Jan 91–Dec 97 30 0 35 0 108 0


Apr 95–Jun 97 15 0 25 0 108 0

CMOS-6, 6A Jul 88–Jun 99(cumulative)

295 0 329 0 1152 0



26

Table 7. Failure Summaries

CMOS-4

Test Item Duration Period Failure

HTSL 168 hrs Jul 88–Oct 88 1 Functional Failure

HTSL 168 hrs Jul 88–Oct 88 1 Functional Failure

HTB 168 hrs Jul 91–Sep 91 1 Functional Failure

T/H 168 hrs Jan 93–Apr 93 1 Functional Failure

T/C 300 cyc Apr 88–Jun 88 1 Functional Failure

HTB 1000 hrs Apr 96–Jun 96 1 Functional Failure

TS 15 cyc Apr 96–Jun 96 1 DC Failure

HTSL 168 hrs Jul 96–Sep 96 1 Functional Failure

PCT 96 hrs Oct 96–Dec 96 1 DC Failure

PCT 96 hrs Apr 97–Jun 97 7 Functional, 1 DC Failures

CMOS-5


T/H 1000 hrs Jan 91–Apr 91 1 DC Failure

T/H 1000 hrs Oct 95–Dec 95 1 DC Failure

T/H 168 hrs Jul 93–Sep 93 1 DC Failure

T/H 1000 hrs Jul 92–Sep 92 1 DC Failure

T/C 300 cyc Jan 92–Mar 92 2 DC Failures

T/C 300 cyc Jan 94–Mar 94 1 Functional Failure

T/C 300 cyc Jan 93–Mar 93 1 Functional Failure

T/C 100 cyc Oct 96–Dec 96 1 DC Failure

PCT 192 hrs Oct 96–Dec 96 1 DC Failure

T/C 100 cyc Oct 96–Dec 96 1 DC Failure

PCT 96 hrs Apr 97–Jun 97 1 DC Failure

TS 15 cyc Jul 97–Sep 97 1 DC Failure

CMOS-6, 6A


HTSL 168 hrs Jul 92–Sep 92 1 DC Failure

PCT 96 hrs Oct 93–Dec 93 1 Functional Failure

HHSL 1000 hrs Jan 93–Apr 93 1 Functional Failure

PCT 96 hrs Jul 96–Sep 96 1 DC Failure

T/C 300 cyc Oct 96–Dec 96 1 Functional Failure

T/H 1000 hrs Oct 96–Dec 96 1 DC Failure

T/H 168 hrs Apr 97–Jun 97 1 Functional Failure


27

Table 8. CMOS-8L Process Family, Quarterly Reliability Data (Jan - Jun 99)

The following device types in all package types are covered in the CMOS-8L process family:

HTB Failures (Hours)

HTSL Failures(Hours)

Device Type Time Period Qty 168 500 1000 Qty 168 500 1000

D65832GD

(208-pin QFP)

Jan 99–Jun 99 72 0 0 0 60 0 0 0

PCT Failures(Hours)

T/C Failures(Cycles)

T/H Failures(Hours)

Device Type Time Period Qty 96 192 Qty 100 300 Qty 168 500 1000

D65832GD

(208-pin QFP)

Jan 99–Jun 99 60 0 0 150 0 0 72 0 0 0

Table 9. CB-C9 Process Family, Quarterly Reliability Data (Jan - Mar 99)

The following device types in all package types are covered in the CB-C9 process family:




D82174GD

(160-pin QFP)

Jan 99–Mar 99 0 - - - 0 - - -

PCT Failures(Hours)


T/H Failures(Hours)


D82174GD

(160-pin QFP)

Jan 99–Mar 99 40 0 0 50 0 0 48 0 0 0


28

Table 10. CB-C9VX/VM Process Family, Quarterly Reliability Data (Jan - Jun 99)

The following device types in all package types are covered in the CB-C9VX/VM process family:




D82287S1

(272-pin PBGA)

Jan 99–Jun 99 160 0 0 0 20 0 0 0

PCT Failures(Hours)


T/H Failures(Hours)


D82287S1

(272-pin PBGA)

Jan 99–Jun 99 20 0 0 25 0 0 72 0 0 0

Table 11. UC-II Process Family, Quarterly Reliability Data (Apr - Jun 99)

The following device types in all package types are covered in the UC-II process family:




D83901S1

(320-pin PBGA)

Apr 99–Jun 99 48 0 0 0 0 - - -

PCT Failures(Hours)


T/H Failures(Hours)


D83901S1

(320-pin PBGA)

Apr 99–Jun 99 52 0 0 154 0 0 48 0 0 0

d65025l

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