d cube testing

7/30/2019 D CUBE TESTING

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Roths D -Algorithm


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Truly Great workFirst algorithm for test generation that is programmable on acomputer

Previous methods before D-Algorithm inception are :Truth-table method

Method by complements

Pruning

Tracing

Introduced D notation (called D-cubes)

D - 1 in the good circuit, 0 in the faultyD - 0 in the good circuit, 1 in the faulty (Dbar)

Defined the calculus and algorithms for ATPG using Dcubes


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Singular cover Minimal set of input signal assignments needed to represent essentialprime implicants in Karnaugh map

The cube 0X0 (in the table) stands for the two vertices ; 000 & 010

For the circuit shown below,0X0 + 001 => 0X001 is one example of singular cover

AND a b d NOR d e F

1 0 X 0 4 1 X 0

2 X 0 0 5 X 1 0

3 1 1 1 6 0 0 1


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D-CubeCollapsed truth table entry

For example, combine rows 3 and 1 of theAND gate singular cover, and express it inRoth's 5-valued algebra (row 3 is goodmachine)

D 1 D

Rows 3 and 2 yield 1 D D ; A third is DDD

Inverting D to D in each of these yieldsthe other 3 D-cubes for the AND gate.

3 of the NOR gate D-cubes are:D 0 D ; 0 D D ; D D D

Is there any differencebetween X and D

1xxl0 x ; each x can take 0or 1 on, independent of anyother x ;2 3 combinations

But, D1D0D D represents

only two vertices


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D-intersection Defines how different D-cubes can coexist for different gates

0 0 = 0 X = X 0 = 0 1 1 = 1 X = X 1 = 1

X X = X

Rule : If one cube assigns a specific signal value, the other cubes must assign either the same signal or X

For example, 0XX intersect 1XX is the empty cube (incompatible).

D-intersection 0 1 X D D

0 0 0 1 1 1

X 0 1 X D D

D D

D D


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D- Intersection Rules and represent incompatible assignments.

If the values are incompatible during propagation or implications, theassignment is called inconsistent and backtracking is necessary.

If both and occur, then the cubes are incompatible

If only occurs, then D D = D and D D = D

If only occurs, then convert D -> D and D -> D and continue withthe above rule

D-contains : Cube A D -contains cube B if the set of A cube verticescontains (is a superset of) the B cube vertices.


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Primitive D-cubes of failure (PDF) PDF - Primitive D cube of failure - a set of inputs to a module that willsensitize a specific fault within the module

These model faults including:SA0 (represented by D)

SA1 (represented by D)Bridging faults (short circuits)Arbitrary change in logic gate function (e.g., from AND to OR).

For the AND gate, the PDF for output SA0 is 1 1 D ; SA1 are 0 X D, X 0 D

Note the PDFs are distinct from the propagation D -cubes The former models a failure at the gate.The latter models the conditions for fault effect propagation


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Construction of PDFMake cube set a 1 when good machine output is 1 and set a 0 whengood machine output is 0

Make cube set b1 when failing machine output is 1 and b0 when it is0

Change a 1 outputs to 0 and D-intersect each cube with every b0. If intersection works, change output of cube to D

Change a 0 outputs to 1 and D-intersect each cube with every b1. If intersection works, change output of cube to D


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PDF Example - 1

Wired-OR bridging fault short-circuiting wires a and b


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PDF Example - 2

AND Converted to OR

Cube-set

a 0

a 1b0b1

a

0X101X

b

X010X1

c

001011

Cube-set

PDFs for AND changing

to OR

a

0

1

b

1

0

c

D

D


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D- Algorithm ProcedureNumber all circuit lines in increasing level order from PIs to POs;Model the fault with the appropriate PDF

Select propagation D-cubes to propagate fault- effect to PO(s) ( D-drive procedure )

Select singular cover cubes to justify internal circuit signals ( consistency

procedure )

The main limitation of D -algorithm is that it selects cubes and singular covers arbitrarily during test generation


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Example - 1A B C d e F1 1 10 0

0 01 1 00 1

0 11 0

1 00 0 1

A B C F0 0 0 00 0 1 00 1 0 0

0 1 1 11 0 0 01 0 1 01 1 0 01 1 1 0

A B C d e FD 1 D1 D DD D D

D 1 D'1 D D'D D D

D 0 D 0 D D D D D

Truth Table Singular Cover ( Usedfor justifying lines )

D-cubes

Step A B C d e F Type of Cube

1 1 1 D PDF for AND gate

2 D 0 D'Propagation D-cube for NOR gate

3 1 1 0Singular cover of NAND gate

Steps in D-Algorithm


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Flowchart

*Picked from chintan Patel slides


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Example - 2


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Step 1 D-Drive Set A = 1

Step 2 D-Drive Set f = 0

Step 3 D-Drive Set k = 1

Step 4 Consistency Set g = 1

Step 5 Consistency f = 0 Already set

Step 6 Consistency Set c = 0, Set e = 0


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Example 3 ; Primitive D-cube of Failure

Fault s sa1


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Propagation D-cube for v


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Forward & Backward Implications


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Limitations of D-AlgorithmInsists on propagating the D-frontier strictly in the order of increasingcircuit signal numbers listed in the D-frontier

Insists on justifying unjustified internal signals in the order of decreasing signal numbers in the active test cube

These methods are often counterproductive; better heuristics areneeded for deciding which signals are best to manipulate at each stageof the computation

Algorithm selects a singular cover to set an input to 1 first, rather thanto 0

Better heuristic is needed for selecting the value of the assignment

Insists on propagating all D-frontier fault effects to POs, wheneverpossible. This is unnecessary, since only one fault effect propagated toa PO is sufficient for a test


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PODEMPath oriented Decision making


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Into the history books TEST generation for combinational circuits has traditionally beenconsidered a solved problem

In late '70s, IBM introduced error correction and translation (ECAT) totheir DRAM to increase reliability

Error correction and translation (ECAT)A logic circuit is characterized as being ECAT type if portions of it areconstituted by XOR (EXCLUSIVE-OR) gates with reconvergent fan-out

DALG is extremely inefficient ECAT type functions


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ECAT ProblemD-ALG fails on attempts to generate tests for these circuits because thesearch is not directed

D-ALG will eventually determine that n = q is not realizable by thiscircuit


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Other Limitations of D-AlgorithmInsists on propagating the D-frontier strictly in the order of increasingcircuit signal numbers listed in the D-frontier

Insists on justifying unjustified internal signals in the order of decreasing signal numbers in the active test cube

These methods are often counterproductive; better heuristics are needed

for deciding which signals are best to manipulate at each stage of thecomputation

Algorithm selects a singular cover to set an input to 1 first, rather than to 0 Most important wrt ECAT circuits

Better heuristic is needed for selecting the value of the assignment

Insists on propagating all D-frontier fault effects to POs, wheneverpossible. This is unnecessary, since only one fault effect propagated toa PO is sufficient for a test


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PODEM Several new ConceptsExpands the binary decision tree around the PIs, not around all circuitsignals ; Reduces the size of the tree from 2 n to 2 num_PIs.

D-ALG tended to continue intersecting D-cubes even when the D- frontier disappeared.

PODEM introduced a subroutine to test if D-frontier still existed.

PODEM introduced objectives and realized that choosing PIs to set wasimportant in efficiently realizing objectives.

Backtracing was used to obtain a PI assignment given an initial objective.

PODEM considered the length of the path between the objective andthe POs and used controllability measures to guide the ATPGalgorithm.


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PODEM High-Level FlowAssign binary value tounassigned PI

Determine implications of allPIs

Test Generated? If so, done.

Test possible with moreassigned PIs? If maybe, go toStep 1

Is there untried combinationof values on assigned PIs? If not, exit: untestable fault

Set untried combination of values on assigned PIs usingobjectives and backtrace.Then, go to Step 2


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Assumptions MadeSets the gate objective of obtaining

a 1 on that gate output if it was an AND or an OR gate

a 0 if it was a NAND or a NOR gate

to propagate the D forward

During Backtracing,If all logic gate inputs had to be set to achieve the objective, PODEMbacktraced through the hardest-to-control input first. That way, if controlling that input failed, it wasted no time trying easier-to-control inputs.If only one logic gate input needed to be set to achieve theobjective, PODEM backtraced through the easiest-to-control input.


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PODEMs objectives/ Implication stack

Example


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Select path s Y for faultpropagation


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Initial objective: Set r to 1 to excitefault


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Backtrace from r


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Set A = 0 in implication stack


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Forward implications: d = 0, X = 1


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Initial objective: set r to 1


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Backtrace from r again


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Set B to 1. Implications in stack: A =0, B = 1


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Forward implications: k = 1, m = 0, r = 1,q = 1, Y = 1, s = D, u = D, v = D, Z = 1


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X-PATH-CHECK shows paths s Y and s u v Z blocked (D-frontier disappeared)


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Backtrack

Forward implications: d = 0, X = 1, m = 1, r = 0, s = 1, q = 0, Y = 1, v = 0, Z = 1.Fault not sensitized


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Set A = 1 (alternate assignment)


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Backtrace from r again


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Set B = 0. Implications in stack: A =1, B = 0


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Forward implications: d = 0, X = 1, m = 1, r = 0.Conflict: fault not sensitized. Backtrack


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Set B = 1 (alternate assignment)


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Forward implications: d = 1 , m = 1 , r = 1 , q =0, s = D , v = D , X = 0 , Y = D

Fault Tested


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History of Algorithm Speedups

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