CSS 432 1

CSS432 Point-to-Point LinksTextbook Ch2.1.2 – 2.5

Professor: Munehiro Fukuda

CSS 432 2

Basic Knowledge about Links Full-duplex versus Half-duplex

Full Half

Local cable types Category 5 twisted pair Coax Multimode fiber LED-based, 2km Single-mode fiber laser-diode-based, 40km

Carrier-supported cables/fibers DS1 (T1): 1.544Mbps, 24-digital voice circuits of 64 Kbps each DS3 (T3): 44.736Mbps, 28 DS1 links STS-1 (OC-1): Synchronous Transport signal, the base link speed=

51.840Mbps STS-3, 12, 48, 192 (OC-3, OC-12, OC-48, OC-192)

at time t at time u

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Basic Knowledge (Cont’d) Last-Mile Links

POTS: Plain Old Telephone Service

ISDN: Integrated Services Digital Network

ADSL: Asynchronous Digital Subscriber Line

VDSL: Very high data rate Digital Subscriber Line

Wireless Links AMPS, PCS, GSM: Wide-area analog/digital-based mobile phone

services IEEE 802.11: wireless LAN with up to 54Mbps transfer rate

BlueTooth radio interface: 1Mpbs piconet in 10m

CODEC

Voice line28.8~56Kbps

Digital line64-128Kbps

1.554-8.448Mbps16-640Kbps

STS-N12.96~55.2Mbps

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Focusing on ADSL

To telephone switch

Residence A Residence B

255 frequencies for downstream31 use for upsreams

2 taken for control

Long distance

• Preparing 286 frequencies and agreeing at the available frequencies between two modems

• Fitting to most usages where a user tends to retrieve Internet information.

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Encoding Signals propagate over a physical medium

modulate electromagnetic waves e.g., vary voltage

Encode binary data onto signals e.g., 0 as low signal and 1 as high signal known as Non-Return to zero (NRZ)

Consecutive 1s and 0s Baseline wander: if the receiver averages signals to decide

a threshold Clock recovery: both sides must be strictly synchronized

Bits

NRZ

0 0 1 0 1 1 1 1 0 1 0 0 0 0 1 0

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Alternative Encodings Non-return to Zero Inverted (NRZI)

Encode 1: make a transition from current signal Encode 0: stay at current signal to encode a zero solves the problem of consecutive 1s

Signal flips every 1 is encountered.

Manchester Transmit XOR of the NRZ encoded data and the clock Only 50% efficient. Used by Ethernet/Token Ring

0 1

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4B/5B Encoding Every 4 bits of data encoded in a 5-bit code

5-bit codes selected to have no more than one leading 0

no more than two trailing 0s

See textbook Table 2.4 on page 79

Thus, never get more than three consecutive 0s

Resulting 5-bit codes are transmitted using NRZI

Achieves 80% efficiency Because 5th bit is redundant.

Used by FDDI

01??? but not 001??

??100 but not ?1000

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Encoding Example

Bits

NRZ

Clock

Manchester

NRZI

0 0 1 0 1 1 1 1 0 1 0 0 0 0 1 0

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Framing Break sequence of bits into a frame Typically implemented by a network adaptor

Frame

BitsAdaptor Adaptor Node BNode A

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Approaches

Header Body

8 16 16 8

CRCBeginningsequence

Endingsequence

SY

N

Header Body

8 8 4214 168S

YN

Cla

ssCRCCount

Sentinel-based delineate frame with special pattern: 01111110 e.g., HDLC, SDLC, PPP

problem: ending sequence appears in the payload solution: bit stuffing

sender: insert 0 after five consecutive 1s receiver: delete 0 that follows five consecutive 1s

Counter-based include payload length in header e.g., DDCMP

Frame error

Frame error

problem: count field corrupted (frame error) solution:

Wait for the next beginning sequence Catch when CRC fails

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Approaches (cont) Clock-based

each frame is 125us long e.g., SONET: Synchronous Optical Network STS-n (STS-1 = 51.84 Mbps)

Overhead Payload

90 columns

9 rows

STS-1Hdr STS-1Hdr STS-1Hdr

STS-3cHdr

Interleaved every byte: keep 51Mbps for each STS-1

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Error Detections

Add k bits of redundant data to an n-bit message want k << n (i.e. k is extremely small as compared to n) e.g., k = 32 and n = 12,000 (1500 bytes) in CRC-32

Parity Bit Internet Checksum Algorithm Cyclic Redundancy Check

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Parity

Odd parity Even parity Two-dimensional parity

0101001 1

1101001 0

1011110 1

0001110 1

0110100 1

1011111 0

1111011 0

Paritybits

Paritybyte

Data

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Internet Checksum Algorithm View message as a sequence of 16-bit integers; Convert each 16-bit integer into a ones-complement arithmetic Sum up each integer Increment the result upon a carryout Example:

u_shortcksum(u_short *buf, int count){ register u_long sum = 0; while (count--) { sum += *buf++; if (sum & 0xFFFF0000) { // carry occurred, so wrap around sum &= 0xFFFF; sum++; } } return ~(sum & 0xFFFF);}

5: 0 00000000 000001013: 0 00000000 00000011

-5: 0 11111111 11111010-3: 0 11111111 11111100-5 + (-3): 1 11111111 11110110w/ carry: 0 11111111 11110111This corresponds to -8

Ones-complement message

What if 5 and 3 were changedIn 6 and 2 ?

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Cyclic Redundancy Check

Represent n-bit message as n-1 degree polynomial e.g., MSG=10011010 as M(x) = x7 + x4 + x3 + x1

Let k be the degree of some divisor polynomial e.g., C(x) = x3 + x2 + 1

sender receiver

M(x)2k – M(x) 2k % C(x) = C(x)-divisible message: P(x)If P(x) % C(x) == 0

P(x) was sent successfully

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CRC (cont) Sender polynomial M(x)

M(x) = 10011010, C(x) = 1101, thus k = 3 M(x)23 = 10011010000 (<< 3) M(x)23 % C(x) = 101 M(x)23– M(x)23 % C(x) = 10011010101 = P(x)

Noise polynomial E(x) Receiver polynomial P(x) + E(x)

E(x) = 0 implies no errors

(P(x) + E(x)) % C(x) == 0 if: E(x) was zero (no error), or E(x) is exactly divisible by C(x)

To retrieve M(x): P(x) + 101 / 23, (truncate the last 3 bits)

Just appended

The last 3 bits of P(x)

10011010000 eor1101 1001 eor 1101 1000 eor 1101 1011 eor 1101 1100 eor 1101 1000 eor 1101 101

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CRC Calculation Using Shift Registersender receive

r

M(x)

CRCCRC + M(x) M(x)

CRC’If CRC == CRC’, no errors

000 01011001

x0 x1 x2x0 x1 x2

0 0 0

000 01011001 0 0

000 0101100 1 0

000 010110 0 1

000 01010 0 1

000 0100 0 1

000 011 0 1

000 00 1 1

Example: M(x) = 10011010

C(x) = 1101

1 0 0

0 1 0

0 0 1

1 0 1

000

00

0

101 will be transferred.

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Acknowledgements & TimeoutsSender Receiver

Frame

ACK

Tim

eout

Tim

e

Sender Receiver

Frame

ACK

Tim

eout

Frame

ACKTim

eout

Sender Receiver

Frame

ACKTim

eout

Frame

ACKTim

eout

Sender Receiver

Frame

Tim

eout

Frame

ACKTim

eout

(a) (c)

(b) (d)

Receiver can’t distinguishif the 1st and 2nd frames are identical

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Stop-and-Wait

Stop a transmission and wait for ack to return or timeout

Add 1-bit sequence number to detect a duplication of the same frame

Problem: Can’t utilize the link’s capacity Example

1.5Mbps link x 45ms RTT = 67.5Kb (8KB) If the frame size is 1KB and the sender waits

for 45ms RTT 1KB for 45ms RTT 1/8th link utilization

Sender Receiver

Frame 0

Frame 1

Frame 0

Ack 0

Ack 0

Ack 1

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Sliding Window Allow multiple outstanding (un-ACKed)

frames Upper bound on un-ACKed frames, called

windowSender Receiver

Tim

e

……

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SW: Sender Assign sequence number to each frame (SeqNum) Maintain three state variables:

Send window size (SWS) Last acknowledgment received (LAR) Last frame sent (LFS)

Maintain invariant: LFS - LAR <= SWS

Advance LAR when ACK arrives Buffer/Back up to SWS frames for future

retransmission

SWS

LAR LFS

… …

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SW: Receiver Maintain three state variables

Receive window size (RWS) Largest frame acceptable (LFA) Last frame received (LFR)

Maintain invariant: LFA - LFR <= RWS

Frame SeqNum arrives: if LFR < SeqNum < = LFA accept if SeqNum < = LFR or SeqNum > LFA discarded

Send cumulative ACKs

RWS

LFR LFA

… …

Send a comulativeAck

discard

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Sequence Number Space SeqNum field is finite; sequence numbers wrap around Sequence number space must be larger than # outstanding

frames SWS <= MaxSeqNum-1 is not sufficient

suppose 3-bit SeqNum field (0..7) SWS=RWS=7 sender transmit frames 0..6 arrive successfully, but ACKs lost sender retransmits 0..6 receiver expecting 7, 0..5, but receives second incarnation of 0..5

SWS < (MaxSeqNum+1)/2 is a correct rule Intuitively, SeqNum “slides” between two halves of sequence

number space

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Reviews Encoding (NRZ, NRZI, Manchester, and 4B/5B) Framing (Sentinel and counter-based) Error Detections (Parity, Internet checksum, and

CRC) Stop-and-wait Sliding window

Exercises in Chapter 2 Ex. 2 and 5 (4B/5B, NRZI, and bit stuffing) Ex. 16 (Internet Checksum) Ex. 18 (CRC) Ex. 24 (Sliding Window: Apply Ex. 25’s cases (a) and

(b) to Ex. 24)