cse 240a - university of california, san diegocseweb.ucsd.edu/.../pdf/01/cse240a-mbt-l1.ppt.pdf ·...
TRANSCRIPT
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UCSD Department of Computer Science & Engineering
http://www.cse.ucsd.edu/classes/fa10/cse240a/
Professor: Michael Taylor
RF
0
CSE 240A:
Principles of Computer Architecture
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Computer Architecture from 10,000 feet foo(int x)
{ .. } Class of application
Physics
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Computer Architecture from 10,000 feet foo(int x)
{ .. } Class of application
Physics
An impossibly large gap!
In the olden days:
“In 1942, just after the United States entered World War II, hundreds of women were employed around the country as computers...” (source: IEEE)
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The Great Battles in Computer Architecture Are About How to Refine the Abstraction Layers
foo(int x) { .. } Computation
Language Compiler ISA Micro Architecture Register-Transfer Level Circuits Devices Materials Science
Physics
IBM 360, VLIW RISC, T’meta
Fortran
Mead & Conway
Superscalar, caches
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Language Compiler ISA Micro Architecture Register-Transfer Level Circuits Devices Materials Science
Abstractions protect us from change -- but must also change as the world changes
More Power/cm^2!
Denser VLSI gates!
More pins!
Slower Wires!
Changes in fabrication capabilities
Computation
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Abstraction Layers – reflected in organization of research communities
Computation
Language Compiler ISA Micro Architecture Reg-Transfer Level Circuits Devices Materials Science
Physics
International Symposium on Computer Architecture (ISCA)
High Performance Computer Architecture (HPCA)
Architectural Support for Programming Languages and OS (ASPLOS)
International Symposium on Microarchitecture (MICRO)
Design Automation Conference (DAC) Int. Conf. Computer Aided Design (ICCAD)
International Solid State Circuit Conference (ISSCC)
International Electron Devices Meeting (IEDM)
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Classic ISSCC (Circuits) Paper: “How we designed a chip and how fast / low power it is.”
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Classic Int. Electron Device Meeting (IEDM) Paper: How we designed a single transistor
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Classic Int. Electron Device Meeting (IEDM) Paper: “How we designed a wire”
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The focus of this class
Language Compiler ISA Micro Architecture Reg-Transfer Level Circuits Devices Materials Science
International Symposium on Computer Architecture (ISCA)
High Performance Computer Architecture (HPCA)
Architectural Support for Programming Languages and OS (ASPLOS)
International Symposium on Microarchitecture (MICRO)
Design Automation Conference (DAC) Int. Conf. Computer Aided Design (ICCAD)
International Solid State Circuit Conference (ISSCC)
International Electron Devices Meeting (IEDM)
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Change: Power Santa Clara, we have a problem
More pipeline stages, less efficient, more power.
Just can’t remove > 100 watts without great expense on a desktop.
All computing is now Low Power Computing!
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Wat
ts/c
m 2
1
10
100
1000
1.5µ 1µ 0.7µ 0.5µ 0.35µ 0.25µ 0.18µ 0.13µ 0.1µ 0.07µ
Power Density
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7 yr / 10x (39%)
5 yr / 10x (58%)
20 yr / 10x (12%)
Change: microprocessor frequency versus time
3800
Power Limited
Faster Circuits, Faster + Smaller Transistors, Fast Microarchitecture
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Intel
P3: 12 stages P4 (b4 paper): 20 stages P4/prescott: 31 stages P5/Tejas: >> 31 stages
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Intel
P3: 12 stages P4 (b4 paper): 20 stages P4/prescott: 31 stages P5/Tejas: >> 31 stages
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Intel
P3: 12 stages P4 (b4 paper): 20 stages P4/prescott: 31 stages P5/Tejas: >> 31 stages
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Back to the future P3:
12 stages P4 (b4 paper): 20 stages
P4/prescott: 31 stages
P5/Tejas: >> 31 stages
Same as 1996 – I can’t sell that. I must call it something new --- Pentium...Mmmm... Great Scott,
I’ve got it!
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And forward to multi-core
Intel Core Duo
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Future outlook
Old Trend: Frequency
New Trend: Parallel processing
Processors stuck at 3.8 GHz. Intel and others are pushing multi-core instead
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Language Compiler ISA Micro Architecture Register-Transfer Level Circuits Devices Materials Science
Abstractions protect us from change -- but must also change as the world changes
Telepathic Photographic memory
Virtual Homicide (Quake) Changes in application space
Physics
Mathematical Genius Etc…
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And on that note: PC’s are not the only important class of computer – in fact they are in the minority (~2%)!
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Course Work and Grading • See website!
http://www-cse.ucsd.edu/classes/fa10/cse240a/
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Text vs. Lectures vs. CSE 141
Textbook
CSE 141
- Resource limitations prevent us from addressing material from the prerequisite, CSE 141, in office hours…but we are happy to refer you to the book or your classmates.
- Lectures will include material not in the text…text will include material not in the lectures. (Midterms and homework will give you an opportunity to calibrate what you need to know.)
Lectures
Assigned readings for each lecture posted on website!
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Text vs. Lectures vs. CSE 141
Textbook
CSE 141
- Resource limitations prevent us from addressing material from the prerequisite, CSE 141, in office hours…but we are happy to refer you to the book or your classmates.
- Lectures will include material not in the text…text will include material not in the lectures. (Midterms and homework will give you an opportunity to calibrate what you need to know.)
Lectures
Pitfall #1: Believing everything you read in Hennessy & Patterson!
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Course Staff Instructor: Michael Taylor
Email: [email protected] Office Hours:
EBU 3b 4110 Tuesday right after class
TA: Sravanthi Kota Venkata Email: tba Office Hours:
tba
http://www-cse.ucsd.edu/classes/fa10/cse240a/
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About Me
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About Me
~120 million transistors
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Course Outline 1. Technology 2. Measuring Goodness 3. Out-of-Order Superscalar 4. Memory Hierarchy 5. Power 6. Multiprocessors 7. UCSD Arch Greatest Hits
Please watch the website for course updates, reading assignments and homework assignments!