cs 345project 5 – virtual memory1/24 project 5 – virtual memory student explores the concepts...

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CS 345 Project 5 – Virtual Memory 1/24 Project 5 – Virtual Memory Student explores the concepts of swap space, main memory, and virtual memory. Understand the details of page faulting and page replacement algorithms, what hit and miss counts are, and how to track them. Student implements a virtual address translation system (MMU) to project 4 using a two-level hierarchical page table system. An LC-3 processor is provided that makes all memory accesses through one function. That’s right! You only need to implement one function for Project 5, namely, getMemAdr(). Project 5

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Page 1: CS 345Project 5 – Virtual Memory1/24 Project 5 – Virtual Memory  Student explores the concepts of swap space, main memory, and virtual memory.  Understand

CS 345 Project 5 – Virtual Memory 1/24

Project 5 – Virtual Memory Student explores the concepts of swap space, main

memory, and virtual memory. Understand the details of page faulting and page

replacement algorithms, what hit and miss counts are, and how to track them.

Student implements a virtual address translation system (MMU) to project 4 using a two-level hierarchical page table system.

An LC-3 processor is provided that makes all memory accesses through one function.

That’s right! You only need to implement one function for Project 5, namely, getMemAdr().

Project 5

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CS 345 Project 5 – Virtual Memory 2/24

Virtual Memory

VirtualAddress f (va) Physical

Address

LC-3

PC-RelativeIndirectBase+OffsetIR, TRAPLD, LDR, LDIST, STR, STI

LC-3Memory216 Words

OS ClockReplacement Algorithm Paged

Swap Space

MMUgetMemAdr()(Hardware)

Project 5

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CS 345 Project 5 – Virtual Memory 3/24

LC-3 SimulatorADD 0001 DR SR1 00 SR20

ADD 0001 DR SR1 imm51

AND 0101 DR SR1 00 SR20

AND 0101 DR SR1 imm51

BR 0000 n z p PCoffset9

JSR 0100 1

JMP 1100 0 00000000 BaseR

LD 0010 PCoffset9DR

LDI 1010 PCoffset9DR

LDR 0110 offset6DR BaseR

LEA 1110 PCoffset9DR

NOT 1001 DR SR 111111

RET 1101

RTI 1000 000000000000

STR 0111 offset6SR BaseR

TRAP 1111 trapvect80000

ST

STI

0011 PCoffset9SR

1011 PCoffset9SR

PCoffset11

1100 0 00000000 111 reserved

JSRR 0100 0 00000000 BaseR

Project 5

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CS 345 Project 5 – Virtual Memory 4/24

LC-3 Simulator

MAR access thru getMemAdr(va, rwflg)

MDR access thru getMemData(va)setMemData(va)

Project 5

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CS 345 Project 5 – Virtual Memory 5/24

Virtual Memory Guidelines1) Add the project routines (OS345p5.c), LC-3 interpreter

(OS345lc3.c, OS345lc3.h) and MMU (OS345mmu.c) modules to your project 4 operating system by enabling PROJECT = 5.

2) Modify the getMemAdr() function to handle virtual memory addressing.

3) Implement a clock page replacement algorithm to pick which frame is unloaded, if necessary, on a page fault.

4) Implement a 0.5MB page swap table routine to simulate paged disk storage.

5) Use crawler.hex and memtest.hex to validate your virtual memory implementation.

6) Add other CLI commands to examine/monitor virtual memory functions and display memory statistics.

Project 5

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CS 345 Project 5 – Virtual Memory 6/24

LC-3 Crawler, Memtest Crawler

Copies itself to random location in memory

Branches to new copyRepeats 100 times

MemtestWrites 1000 random numbers to

1000 random locationsResets random seedReads and verifies written dataRepeats 10 times

Project 5

Welcome to OS345 Rev 1.10>>crawler178068>>Crawler R1.1Process 1: Move #1 to xE29EProcess 1: Move #2 to x6B3F…Process 1: Move #99 to x932EProcess 1: Move #100 to xDA8FProcess #1 Halted at 0x937e1807827>>memtestMemTest R1.0a(1) Round 1, Writing to memory...(1) Round 1, Verifying...(1) Round 2, Writing to memory...…(1) Round 10, Writing to memory...(1) Round 10, Verifying...Process #1 Halted at 0x305c

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CS 345 Project 5 – Virtual Memory 7/24

Flags / Frame #

Frame<<6

User Page Table

+

Two-Level Paging System

RPTE # UPTE # Frame Offset

15 … 11 10 … 6 5 … 0Virtual Address

RPT

Flags / UPT #

Root Page Table

One per process

+

Project 5

LC-3 Main Memory

Offset15 … 6 5 … 0

Physical Address

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CS 345 Project 5 – Virtual Memory 8/24

Virtual Memory

All tables in LC-3 memory.

All memory accesses thru getMemAdr().

RPT’s pinned.Each process has an RPT

pointer (swapped on context switch).

x2400RPT’s (Pinned)

x2000 Frame Table

UPT’s

(Swappable Frames)

User Frames

x3000

xFFFF

x0000

Memory Limit(Variable)

Virtual Address

System (unmapped)

PagedSwapSpace

Project 5

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CS 345 Project 5 – Virtual Memory 9/24

OS345lc3.h#define LC3_MAX_MEMORY 65536#define LC3_FRAME_SIZE 64#define LC3_FRAMES 1024

#define LC3_FBT 0x2000#define LC3_RPT 0x2400#define LC3_RPT_END 0x2800#define LC3_MEM 0x3000#define LC3_MEM_END 0x10000

#define LC3_MAX_PAGE (LC3_FRAMES<<2)#define LC3_MAX_SWAP_MEMORY (LC3_MAX_PAGE<<6)

#define LC3_FBT_FRAME (LC3_FBT>>6)#define LC3_RPT_FRAME (LC3_RPT>>6)#define LC3_RPT_END_FRAME (LC3_RPT_END>>6)#define LC3_MEM_FRAME (LC3_MEM>>6)#define LC3_MEM_END_FRAME (LC3_MEM_END>>6)

// parts of a virtual address#define RPTI(va) (((va)&BITS_15_11_MASK)>>10)#define UPTI(va) (((va)&BITS_10_6_MASK)>>5)#define FRAMEOFFSET(va) ((va)&BITS_5_0_MASK)

216 Words26 Words216 / 26 = 210 Frames

Project 5

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CS 345 Project 5 – Virtual Memory 10/24

OS345lc3.h// definitions within a root or user table page#define DEFINED(e1) ((e1)&BIT_15_MASK)#define DIRTY(e1) ((e1)&BIT_14_MASK)#define REFERENCED(e1) ((e1)&BIT_13_MASK)#define PINNED(e1) ((e1)&BIT_12_MASK)#define FRAME(e1) ((e1)&BITS_9_0_MASK)#define PAGED(e2) ((e2)&BIT_15_MASK)#define SWAPPAGE(e2) ((e2)&BITS_11_0_MASK)

#define MEMWORD(a) (memory[a])#define MEMLWORD(a) ((memory[a]<<16)+memory[(a)+1])

#define SET_DEFINED(e1) ((e1)|BIT_15_MASK)#define SET_DIRTY(e1) ((e1)|BIT_14_MASK)#define SET_REF(e1) ((e1)|BIT_13_MASK)#define SET_PINNED(e1) ((e1)|BIT_12_MASK)#define SET_PAGED(e2) ((e2)|BIT_15_MASK)

#define CLEAR_DEFINED(e1) ((e1)&~BIT_15_MASK)#define CLEAR_DIRTY(e1) ((e1)&~BIT_14_MASK)#define CLEAR_REF(e1) ((e1)&~BIT_13_MASK)#define CLEAR_PINNED(e1) ((e1)&~BIT_12_MASK)

Project 5

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CS 345 Project 5 – Virtual Memory 11/24

Page Table Entry

Frame valid (1 bit): one if referenced frame is in main memory; zero otherwise.

Dirty (1 bit): one if referenced frame has been altered; zero otherwise.

Reference (1 bit): one if frame has been referenced; zero otherwise.

Pinned (1 bit): one if frame is pinned in memory; zero otherwise.

Frame number (10 bits): If referenced page is in memory, this value specifies which frame it occupies. (1024 frames 64 words = 210 26 = 216 bytes = 65536 words.)

Swap valid (1 bit): one if referenced page has been allocated in swap space; zero otherwise.

Swap page number (12 bits). This specifies where referenced page is stored in swap space. When you load a page into memory, you should include this value in your frame table summary. (4096 pages 128 bytes = 212 27 = 219 bytes = 524,288 bytes.)

Page # (0 – 4095)

S - - - p p p p p p p p p p p p

Frame # (0 – 1023)

F D R P - - f f f f f f f f f f

4 bytes

Project 5

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CS 345 Project 5 – Virtual Memory 12/24

&memory[(upte1&0x03ff)<<6+((va)&0x003f)]

memory[(rpte1&0x03ff)<<6+((((va)&0x7c0)>>6)<<1)]

Virtual to Physical Address

memory[p.rpt + ((((va)&0xf800)>>11)<<1)]

rpte1 = MEMWORD(p.rpt + RPTI(va));

upte1 = MEMWORD((FRAME(rpte1)<<6) + UPTI(va));

&memory[(FRAME(upte1)<<6) + FRAMEOFFSET(va)];

Project 5

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CS 345 Project 5 – Virtual Memory 13/24

unsigned short int *getMemAdr(int va, int rwFlg){

if (va < 0x3000) return &memory[va]; // turn off virtual addressing for system RAMrpta = p.rpt + RPTI(va); rpte1 = MEMWORD(rpta); rpte2 = MEMWORD(rpta+1);if (DEFINED(rpte1)){ // rpte defined }else // rpte undefined 1. get a UPT frame from memory (may have to free up frame){ // 2. if paged out (DEFINED) load swapped page into UPT frame

// else initialize UPTframe = getFrame(LC3_MEM_FRAME, LC3_MEM_END_FRAME);rpte1 = SET_DEFINED(frame);if (PAGED(rpte2)) // UPT frame paged out - read from SWAPPAGE(rpte2) into frame{ accessPage(SWAPPAGE(rpte2), frame, PAGE_READ);}else // define new upt frame and reference from rpt{ rpte1 = SET_DIRTY(rpte1); rpte2 = 0;

// undefine all upte's }

}MEMWORD(rpta) = rpte1 = SET_REF(SET_PINNED(rpte1)); // set rpt frame access bitMEMWORD(rpta+1) = rpte2;upta = (FRAME(rpte1)<<6) + UPTI(va); upte1 = MEMWORD(upta); upte2 = MEMWORD(upta+1);

if (DEFINED(upte1)){ // upte defined }else // upte undefined 1. get a physical frame (may have to free up frame) (x3000 - limit) (192 - 1023){ // 2. if paged out (DEFINED) load swapped page into physical frame

// else new frame}return &memory[(FRAME(upte1)<<6) + FRAMEOFFSET(va)]; // return physical address}

}

*getMemAdr(int va, int rwFlg)Project 5

MMU turned off for system access

Page Fault

Hit!

Go get a Frame

UPT Page in swap space

New UPT FrameFrame referenced

Hit! Page Fault

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CS 345 Project 5 – Virtual Memory 14/24

Frame Bit Table

2 Frames

Project 5

0x3000

0x8000

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CS 345 Project 5 – Virtual Memory 15/24

setFrameTableBits// ********************************************************************************************// set frames available from sf to ef// flg = 0 -> clear all others// = 1 -> just add bitsvoid setFrameTableBits(int flg, int sf, int ef){ int i, data;

int adr = LC3_FBT-1; // index to frame bit tableint fmask = 0x0001; // bit mask

// 1024 frames in LC-3 memoryfor (i = 0; i < 1024; i++){ if (fmask & 0x0001)

{ fmask = 0x8000;adr++;data = (flg) ? MEMWORD(adr) : 0;

}else fmask = fmask >> 1;// allocate frame if in rangeif ( (i >= sf) && (i < ef)) data = data | fmask;MEMWORD(adr) = data;

}return;

}

Project 5

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CS 345 Project 5 – Virtual Memory 16/24

getAvailableFrame// ********************************************************************************************// get frame number (must be on 16 bit boundary)int getAvailableFrame(int sf, int ef){ int i, data;

int adr = LC3_FBT + (sf>>4) - 1; // index to frame bit tableint fmask = 0x0001; // bit mask

for (i = sf; i < ef; i++){ if (fmask & 0x0001)

{ fmask = 0x8000;adr++;data = MEMWORD(adr);

}else fmask = fmask >> 1;// deallocate frame and return frame #if (data & fmask){ MEMWORD(adr) = data & ~fmask;

return i;}

}return -1;

}

Project 5

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CS 345 Project 5 – Virtual Memory 17/24

accessPage// ********************************************************************************************// read/write to swap spaceint accessPage(int pnum, int frame, int rwnFlg){ static unsigned short int swapMemory[LC3_MAX_SWAP_MEMORY];

switch(rwnFlg){ case PAGE_GET_ADR: // return page address

{ return (int)(&swapMemory[pnum<<6]);}case PAGE_NEW_WRITE: // new write{ pnum = nextPage++;}case PAGE_OLD_WRITE: // write{ memcpy(&swapMemory[pnum<<6], &memory[frame<<6], 1<<7);

return pnum;}case PAGE_READ: // read{ memcpy(&memory[frame<<6], &swapMemory[pnum<<6], 1<<7);

return pnum;}

}return pnum;

}

Project 5

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CS 345 Project 5 – Virtual Memory 18/24

vma

Clock did not advance

2 frames – UPT, Frame

No new frames

Same UPT, new Frame

New UPT, new Frame

No swap pages

Project 5

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CS 345 Project 5 – Virtual Memory 19/24

Clock Replacement Algorithm

01

234

5

0

7

1

0

1

0

7

2

1

2

1

0

7

3

2

3

2

1

0

7

4

3

4

3

2

1

0

7

5

4

7

0

77

0

12

3

4

4

3

2

1

0

5

6

5

4

3

2

1

6

5

7

6

4

3

2

7

6

5

8

7

4

3

8

7

6

5

3

8

5

6

78

1

0

8

7

5

2

6

5

5

4

3

2

1

0

7Frame

4

3

8

7

6

5

0

4

3

8

7

6

5

5

4

4

3

8

7

6

5

4

33

4

4

0

8

7

6

5

1

0

1

0

8

7

6

5

2

1

1

0

8

7

6

2

7

2

1

0

8

7

6

2

8

7

1

0

8

7

6

2

5

8

5

78

0

1 2

1

0

8

6

5

2

6

Project 5

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CS 345 Project 5 – Virtual Memory 20/24

RPTE’s

Global ClockProject 5

UPTE’s Frame’s

Swap Space

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CS 345 Project 5 – Virtual Memory 21/24

Implementationx0000 – x07FFx0800 – x0FFFx1000 – x17FFx1800 – x1FFFx2000 – x27FFx2800 – x2FFFx3000 – x37FFx3800 – x3FFF…

xD800 – xDFFFxE000 – xE7FFxE800 – xEFFFxF000 – xF7FFxF800 – xFFFFx0000 – x07FFx0800 – x0FFF…xF000 – xF7FFxF800 – xFFFF

x2400RPT0

x2440RPT1

x3000

x240C

x3000 – x303F UPTx3040 – x307F …x3780 – x37FF

x2480RPT2

xE800 – xE83F UPTxE840 – xE87F …xEF80 – xEFFF

xD800 – xD83F UPTxD840 – xD87F …xDF80 – xDFFF

x3000 x3040

VirtualAddress

PhysicalAddress

x3040

x3080

x30C0

x3100

x3140

x3180

x31C0

x3200

x3001 x3041x3040 x3080x3041 x3081xEF92 x3112xD851 x3191xD833 x31F3

x3000 memoryx3001 …x303Fx3040 memoryx3041 …x307F

xD800 memoryxD801 …xD83F

xD840 memoryxD841 …xD87F

xEF80 memoryxEF81 …xEFFF

x3833 x30B3

#0 – x3000

#0

x3800 – x383F UPTx3840 – x387F …x3F80 – x3FFF

#1

#1 – x3040

x3840 memoryx3841 …x387F

Project 5

(193)

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CS 345 Project 5 – Virtual Memory 22/24

Implementationx0000 – x07FFx0800 – x0FFFx1000 – x17FFx1800 – x1FFFx2000 – x27FFx2800 – x2FFFx3000 – x37FFx3800 – x3FFF…

xD800 – xDFFFxE000 – xE7FFxE800 – xEFFFxF000 – xF7FFxF800 – xFFFFx0000 – x07FFx0800 – x0FFF…xF000 – xF7FFxF800 – xFFFF

x2400RPT0

x2440RPT1

x3000

x240C

x3000 – x303F UPTx3040 – x307F …x3780 – x37FF

x2480RPT2

xE800 – xE83F UPTxE840 – xE87F …xEF80 – xEFFF

xD800 – xD83F UPTxD840 – xD87F …xDF80 – xDFFF

x3000 x3040

VirtualAddress

PhysicalAddress

x3040

x3080

x30C0

x3100

x3140

x3180

x31C0

x3200

x3001 x3041x3040 x3080x3041 x3081xEF92 x3112xD851 x3191xD833 x31F3

xD800 memoryxD801 …xD83F

xD840 memoryxD841 …xD87F

xEF80 memoryxEF81 …xEFFF

x3833 x30B3

#0 – x3000

#0

x3800 – x383F UPTx3840 – x387F …x3F80 – x3FFF

#1

#1 – x3040

x3840 memoryx3841 …x387F

Project 5

x3000 x31C0

#2 – xD800

#2

x3000 memoryx3001 …x303F

Clock

Clock

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CS 345 Project 5 – Virtual Memory 23/24

Implementation DemoProject 5

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CS 345 Project 5 – Virtual Memory 24/24

Project 5 Grading CriteriaREQUIRED: 8 pts – Successfully execute crawler and memtest in 20k words (x3000 – x7FFF, 320 frames). 1 pt – Correctly implement a command to display physical memory. 1 pt – Correctly implement a command to display virtual memory. 1 pt – Correctly implement a command to display any swap page. 1 pt – Correctly implement a command to display any root page table. 1 pt – Correctly implement a command to display any user page table. 2 pts – Display correct hits/misses/rate statistics. 5 pts – Successfully execute crawler and memtest in 1k words (x3000 – x33FF, 16 frames).

Project 5

BONUS: +2 pts – Early pass-off (at least one day before due date). +1 pt – Simultaneously execute two+ LC-3 processes in LC-3 memory. +1 pt – Implement advanced clock algorithm (Stallings, pp. 357-360). +1 pt – Add a per/task frame/page recovery mechanism of a terminated task. +1 pt – Implement an additional replacement policy (ie. FIFO, LRU, or LFU). +1 pt – Join the 2-frame club (x3000 – x3080, 2 frames). –2 pts – Penalty for each school day late.