course file nas
TRANSCRIPT
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COURSE FILE
(COURSE PLAN)
Year : 2013-14
Sem: III
Faculty Details
Name of the Faculty Mr. RAHUL NIGAM
Designation Assistant Professor
Institution J.I.T. Borawan
Course Details
Name of the
Programme
B. E. Batch A & B
Branch Electronics and Comm. Engineering Semester III
Title of the Subject Network Analysis Subject Code EC - 305
CORE Subject. No. of Students 84
Note to the Faculty Members on how to use this course file format:
1. Get a new file from your office for each course and file each sheet of these formats as and when it is complete.
2. Time Table and syllabus copy provided to you may also be filed in it.
3. Please attach the Marks List of the students in respect of Midterm (Continuous Assessment Exam), and Internal
Assessment for this subject in your Course File
4. Photocopy of the best and the worst answer sheets for midterm; be included in the Course File.
5. List of Assignments / Seminar Topics you have given to students should also be included in the Course File.
6. Model Question Paper, which you have distributed to the students in the beginning of the Semester for the subject should
be included in the Course File.
7. Any additional resources like OHP transparencies, handouts used may also be filed in it.
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STATUS PAPERYear : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : Network Analysis Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
1. TARGET
a) Percentage Pass - 90 %
b) Percentage I class - 75 %
2. COURSE PLAN
(Please write how you intend to cover the contents: i.e., coverage of Units by lectures, guest lectures, design exercises, solvingnumerical problems, demonstration of models, model preparation, or by assignments, etc.)
Course may be completed through Lectures, solving problems and by assignments.
3. METHOD OF EVALUATION
3.1. Continuous Assessment Examinations (Mid Term Exam) marks
3.2. Assignments / Seminars marks
3.3. Mini Projects marks
3.4. Quiz marks
3.5. Term End Examination marks
3.6. Others
4. List out any new topic(s) or any innovation you would like to introduce in teaching the subject in this Semester.
Signature of the Director ofInstitution Signature of FacultyDate: Date:
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GUIDELINES TO STUDY THIS
COURSE
Year : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
4. Guidelines to Study the Subject
Should have own copy of the prescribed text book.
Should concentrate and note down important points during the lecture sessions.
Should ask questions to clarify doubts.
Should discuss with their faculty in charge for more information on the subject.
All the numerical should be worked out from the text book. Refer to books/journals in the library to update information on the topics
Go through the websites to get latest information to update information on recent
developments in the area across the world.
Most important, study the topics discussed in the class on the same day so that it will be
easy to understand
Students need to study more reference books, magazines and related journal articles to
know the latest developments.
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COURSE OBJECTIVESYear : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
4. On completion of this Subject / Course the student shall be able to:
S.No.
Objectives Outcomes
1. To know about circuit elements.
DefineIdentifyDistinguishApplication
Giveexample
2. To know about Network topology and Network Theorems.
DefineApplicationCategorizeExplainGiveexample
3. To know about Transient analysis and Steady state analysis.
DefineIdentifyApplicationDistinguishGive
example
4. To do Frequency domain analysis using Laplace transform and Fourier Series.
DefineIdentifyApplicationGiveexample
5. To understand about Network function & Two port networks and parameters.
DefineComputeApplicationCategorizeJustifyGiveexample
Signature of FacultyDate:
Note: For each of the OBJECTIVE indicate the appropriate OUTCOMES to be achieved.Kindly refer Page 16, to know the illustrative verbs that can be used to state the objectives.
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COURSE OUTCOMESYear : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
4. The expected outcomes of the Course / Subject are:
S.No. General Categories of Outcomes Specific Outcomes of the Course
A.An ability to apply knowledge of mathematics,science, and engineering
Knowledge of Specification of Synchronous sequential systemsand Asynchronous Sequential Machine
B.An ability to design and conduct experiments, as
well as to analyze and interpret data
Can be analyzed and Interpret data in Algorithmic state machinedesign
C.An ability to identify, formulate, and solveengineering problems
Fault Detection in combinational circuit
D.A recognition of the need for, and an ability toengage in life-long learning
CMOS VLSI circuit and CAD Tools
E.
An ability to use the techniques, skills, andmodern engineering tools necessary forengineering practice.
Analysis and knowledge of Fault Detection in combinationalcircuit and PLDs
5. Objectives Outcome Relationship Matrix (Indicate the relationships by mark).
OutcomesObjectives A B C D E
1.
2.
3.
4.
5.
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COURSE SCHEDULEYear : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
4. The Schedule for the whole Course / Subject is:
S.No.
Description
Duration (Date) TotalNo.of
PeriodsFrom To
1.
Introduction to circuit elements R, L, C andtheir characteristics in terms of linearity andtime dependence, KCL and KVL analysis,
dual networks, analysis of magneticallycoupled circuits, Dot convention, coupling co-efficient, Tuned circuits, Series and parallelresonance, voltage and current sources,controlled sources
26/02/13 08/03/13 07
2.
Network topology, Concept of Networkgraph, Tree, tree branches and links, cut setand tie set schedules. Network Theorems Thevenin, Norton, Superposition, Reciprocity,Compensation, Maximum power transfer andMillmans theorems, problems with controlledsources.
17/01/13 22/02/13 14
3.
Transient analysis: Transients in RL, RC
and RLC circuits, initial conditions, timeconstants, networks driven by constantdriving sources and their solutions.Steady state analysis: - Concepts ofphasors and vectors, impedance andadmittance. Node and mesh analysis of RL,RC and RLC networks with sinusoidal andother driving sources. Resonance Circuits.
17/04/13 26/04/13 04
4.
Frequency domain analysis Laplacetransform solution of Integral-differentialequations. Transform of waveform step,ramp, Gate and sinusoidal functions. Initialand final value theorem. Network Theorems
in frequency domain. Fourier Series,Trigonometric & exponential form of fourierseries, Fourier series of basic functions.
27/04/13 03/05/13 04
5.
Network function & Two port networksconcept of complex frequency.Networkfunctions of one and two ports, poles andzeros network of different kinds. Necessaryconditions for driving point & transferfunction. Two port parameters Z, Y, ABCD,hybrid parameters, their inverse and imageparameters, relationship between parameters.Interconnection of two port networks,Terminated two port networks.
12/03/13 17/04/13 9
Total No. of Instructional periods available for the course: 45 Hours / Periods
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SCHEDULE OF
INSTRUCTIONS
UNIT - II
Year : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
SI.No.
DateNo. ofPeriod
Topics / Sub TopicsObjectives &
Outcome Nos.References
(Text Book, Journal)
1. 17/01/13 I Basic of vcs /dcsDefineApplication
Switching and FiniteAutomata theory byKohavi
2. 18/01/13 ISynch. Seq. Circuits, state diagram state
table
DefineApplicationGive example
Switching and FiniteAutomata theory byKohavi
3. 21/01/13 I Basics of flip flop DefineExplain
Switching and FiniteAutomata theory byKohavi
4. 23/01/13 I Sequential machine designDefineApplicationGive example
Switching and FiniteAutomata theory byKohavi
5. 04/02/13 I Synchronous sequential machine Give exampleSwitching and FiniteAutomata theory byKohavi
6. 05/02/13 I Serial adderIdentifyGive example
Switching and FiniteAutomata theory byKohavi
7. 09/02/13 I Sequence detector design Give example DELD-II by NishaShukla
8. 12/02/13 I sequential circuit designDefineApplicationGive example
DELD-II by NishaShukla
9. 13/02/13 I sequential circuit designDefineApplicationGive example
DELD-II by NishaShukla
10. 14/02/13 IMealy and Moore model machines state
table and transition diagramDefineApplication
DELD-II by NishaShukla
11. 15/02/13 I
Mealy - Moore model machines
conversions Give example
DELD-II by Nisha
Shukla
12. 20/02/13 I Minimization of the state tableExplainGive example
Switching and FiniteAutomata theory byKohavi
13. 21/02/13 I Minimization of the state tableExplainGive example
Switching and FiniteAutomata theory byKohavi
14. 22/02/13 I Summary of unit II and Introduction of unit IExplainApplication
DELD-II by NishaShukla
Signature of FacultyDate:
Note: 1. ENSURETHATALLTOPICSSPECIFIEDINTHECOURSEAREMENTIONED.2. ADDITIONALTOPICSCOVERED, IFANY, MAYALSOBESPECIFIEDBOLDLY.3. MENTIONTHECORRESPONDINGCOURSEOBJECTIVEANDOUTCOMENUMBERSAGAINSTEACHTOPIC.
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SCHEDULE OF
INSTRUCTIONS
UNIT - I
Year : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
SI.No.
Date
No.of
Periods
Topics / Sub TopicsObjectives &
OutcomeNos.
References(Text Book, Journal)
Page No___ to ___
1. 26/02/13 IIntroduction to CMOS VLSI circuit, VLSI design
flow
DefineIdentifyApplication
PPT
2. 27/02/13 I MOS Transistor as a Switches, CMOS Logic,DistinguishGiveexample
CMOS VLSI Design-Neil Weste
3. 28/02/13 I Combinational circuit, latches and registerIdentifyGiveexample
CMOS VLSI Design-Neil Weste
4. 29/02/13 IDesign strategies ,Hierarchy, regularity,
modularity, locality
DefineDistinguishApplicationGiveexample
PPT
5. 05/03/13 I Introduction of CAD Tool
Distinguish
ApplicationGiveexample
PPT
6. 06/03/13 IDesign entry, synthesis, functional
simulation
DefineIdentifyApplication
PPT
7. 08/03/13 I Summary of unit I and Introduction of unit VApplicationGiveexample
PPT
Signature of FacultyDate:
Note: 1. ENSURETHATALLTOPICSSPECIFIEDINTHECOURSEAREMENTIONED.2. ADDITIONALTOPICSCOVERED, IFANY, MAYALSOBESPECIFIEDBOLDLY.3. MENTIONTHECORRESPONDINGCOURSEOBJECTIVEANDOUTCOMENUMBERSAGAINSTEACHTOPIC.
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SCHEDULE OF
INSTRUCTIONS
UNIT V
Year : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
SI.No.
Date
No.of
Periods
Topics / Sub TopicsObjectives &
OutcomeNos.
References(Text Book, Journal)
Page No___ to ___
1. 12/03/13 I Introduction to PLD
DefineApplicationCategorizeGiveexample
PPT
2. 13/03/13 I Concept of PROM, PLA, PAL
DefineApplicationCategorizeGiveexample
PPT
3. 14/03/13 I CPLD and FPGA
DefineApplicationGiveexample
PPT
4. 15/03/13 I FPGA and its application
Define
Application PPT
5. 16/03/13 I PALASM software applicationsDefineApplication
DELD-II by NishaShukla
6. 19/03/13 I Fault model, Types of faults
DefineComputeApplicationGiveexample
Switching and FiniteAutomata theory byKohavi
7. 08/04/13 I Fault detection using Boolean Difference
ComputeJustifyGiveexample
Switching and FiniteAutomata theory byKohavi
8. 09/04/13 I path sensitization methodDefineComputeGiveexample
Switching and FiniteAutomata theory byKohavi
9. 17/04/13 ISummary of unit V and Introduction of unitIII
DefineComputeApplication
Switching and FiniteAutomata theory byKohavi
Signature of FacultyDate:
Note: 1. ENSURETHATALLTOPICSSPECIFIEDINTHECOURSEAREMENTIONED.
2. ADDITIONALTOPICSCOVERED, IFANY, MAYALSOBESPECIFIEDBOLDLY.3. MENTIONTHECORRESPONDINGCOURSEOBJECTIVEANDOUTCOMENUMBERSAGAINSTEACHTOPIC.
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SCHEDULE OF
INSTRUCTIONS
UNIT III
Year : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
SI.No.
Date
No.of
Periods
Topics / Sub TopicsObjectives &
OutcomeNos.
References(Text Book, Journal)
Page No___ to ___
1. 17/04/13 IFundamental mode and Pulse mode
asynchronous sequential machine
DefineApplicationDistinguish
Switching and FiniteAutomata theory byKohavi
2. 18/04/13 I Non critical and critical races, cycles
DefineIdentifyGiveexample
Switching and FiniteAutomata theory byKohavi
3. 24/04/13 ISecondary state assignments in asynchronoussequential machine
ApplicationGiveexample
Switching and FiniteAutomata theory byKohavi
4. 26/04/13 I Types of hazards and its removal method
DefineIdentifyGiveexample
Switching and FiniteAutomata theory byKohavi
Signature of FacultyDate:
Note: 1. ENSURETHATALLTOPICSSPECIFIEDINTHECOURSEAREMENTIONED.2. ADDITIONALTOPICSCOVERED, IFANY, MAYALSOBESPECIFIEDBOLDLY.3. MENTIONTHECORRESPONDINGCOURSEOBJECTIVEANDOUTCOMENUMBERSAGAINSTEACHTOPIC.
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SCHEDULE OF
INSTRUCTIONS
UNIT IV
Year : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
SI.No.
Date
No.of
Periods
Topics / Sub TopicsObjectives &
OutcomeNos.
References(Text Book, Journal)
Page No___ to ___
1. 27/04/13 I Algorithmic state machine
DefineIdentifyApplication
DELD-II by NishaShukla
2. 29/04/13 Ifundamental concept of hardware/ firmwarealgorithms
DefineIdentifyApplicationGiveexample
DELD-II by NishaShukla
3. 01/05/13 I Controllers and data system designing
DefineIdentifyApplicationGiveexample
DELD-II by NishaShukla
4. 03/05/13 I Controllers and data system designing
Define
IdentifyApplicationGiveexample
DELD-II by Nisha
Shukla
Signature of FacultyDate:
Note: 1. ENSURETHATALLTOPICSSPECIFIEDINTHECOURSEAREMENTIONED.2. ADDITIONALTOPICSCOVERED, IFANY, MAYALSOBESPECIFIEDBOLDLY.3. MENTIONTHECORRESPONDINGCOURSEOBJECTIVEANDOUTCOMENUMBERSAGAINSTEACHTOPIC.
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COURSE COMPLETION
STATUSYear : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
4. Actual Date of Completion & Remarks, if any
Units RemarksNos. of
ObjectivesAchieved
Unit 1 5
Unit 2 5
Unit 3 4
Unit 4 5
Unit 5 6
Signature of the Director of the Institution Signature of FacultyDate: Date:
NOTE: AFTERTHE COMPLETIONOFEACHUNITMENTIONTHENUMBEROFOBJECTIVESACHIEVED.
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TUTORIAL SHEETS - IYear : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
Date: 22/02/13
This Tutorial corresponds to Unit Nos. II Time:
Q1. Analyse the synchronous circuit of Fig. 1 (the clock is not shown, but is implicit)(a) Write down the excitation and output functions.(b) Form the excitation and state tables.(c) Give a word description of the circuit operation.
Fig 1
Q2. (a) Find the equivalence partition for the machine shown in Table 1.
(b) Show the standard form of the corresponding reduced machine.
(c) Find a minimum-length sequence that distinguishes state A from state B.
Table 1
Signature of the Director of the Institution Signature of Faculty
Date: Date:
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TUTORIAL SHEETS IIYear : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
Date: 26/04/13
This Tutorial corresponds to Unit Nos. III Time:
Q1 Analyze the circuit in Fig. 2 for SIC static hazards. Redesign it to make it SIC hazard-free.
Fig 2
Q2 (a) Find all the races in the flow table of Table 2 and indicate those that are critical and those that are not.
(b) Find another assignment that contains no critical races.
Table 2
Signature of the Director of theInstitution Signature of FacultyDate: Date:
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TUTORIAL SHEETS IIIYear : 2013-14
Sem: III
Name of the Faculty : Mr RAHUL NIGAM
Subject : NETWORK ANALYSIS Subject Code: EC - 305
Branch : Electronics and Comm. Engineering
Date: 17/04/13
This Tutorial corresponds to Unit Nos. I & V Time:
Q1. In the circuit in Fig. 3, suppose that we want to obtain a test vector for the c1 s-a-0 fault.
(a) Show that one-dimensional path sensitization through gates G5 and G8 or G6 and G8 does not yield such a test
vector.
(b) Obtain a test vector by sensitizing both the above paths simultaneously.
Fig 3
Q2 Explain following VLSI structure design principal
Hierarchy
Regularity
Modularity
Locality
Q.3 Explain CPLD and PLD in detail.
Q.4 Describe a 1-bit full adder using an ASM chart.
Signature of the Director of the Institution Signature of FacultyDate: Date:
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JAWAHARLAL INSTITUTE OF TECHNOLOGY BORAWAN (KHARGONE)
MID TERM I EXAMINATION -2013
Subject: VCS ( EC - 605) Branch :EC
Year/ Semester: III/III No. of copies: 90
Max. Marks : 20 Time : 2 Hours
Attempt any four questions. All question carry equal marks.
Q.1 Explain following VLSI structure design principal
Hierarchy
Regularity
Modularity
Locality
Q.2 Write brief description of FPGA or CAD tools and their key features.
Q.3 what are Pass transistors. Built master-slave D flip flop with the help of pass transistors
and explain it briefly.
Q.4 Find Minimal machine of the following machine state table
P.S. N.S., Z
I1 I2 I3 I4
A -,- C,1 E,1 B,1B E,0 -,- -,- -,-
C F,0 F,1 -,- -,-
D -,- -,- B,1 -,-
E -,- F,0 A,0 D,1
F C,0 -,- B,0 C,1
Q.5 A synchronous sequential circuit has two JK flip flops A and B, two inputs x and y and
one output z. obtain (I) logic diagram, (II) state table and (III) state diagram if input andoutput equations are
JA = BX+BY K A = BXY
JB = AX K B = A+XY
Z = AXY+BXY
Signature of the Director of the Institution Signature of FacultyDate: Date:
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JAWAHARLAL INSTITUTE OF TECHNOLOGY BORAWAN (KHARGONE)
MID TERM II EXAMINATION -2013
Subject: VCS (EC - 605) Branch: EC (IIIrd year/III sem)
Max. Marks : 20 Time : 2 Hours
Attempt any four questions. All question carry equal marks.
Q.1 Write difference between Asynchronous sequential circuit and Synchronous sequential
circuit with their Advantages & Disadvantages.
Q.2 Derive a test vector for an s-a-1 fault at line c1 in the circuit in Fig.1(Path sensitizing
method)
Fig.1
Q.3 Find test vector for stuck at 1 and stuck at 0 fault at Y shown in Fig2.(path differences
method)
Fig2
Q.4 Find all critical, noncritical races and cycles in following state table.
State Table
Q.5 Explain PROM, PLA and PAL in detail.
Q.6 Explain CPLD and PLD in detail.
Signature of the Director of the Institution Signature of FacultyDate: Date: