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Correct by construction software development Saddek Bensalem BIP team @ VERIMAG VERIMAG Laboratory (Grenoble, France) May, 12th 2015

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Page 1: Correct by construction software developmentrobotics.estec.esa.int/ASTRA/Astra2015... · correct-by-construction process rather than to find bugs. • Methodology to ensure correctness-by

Correct by construction software development

Saddek Bensalem

BIP team @ VERIMAG

VERIMAG Laboratory (Grenoble, France)

May, 12th 2015

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Outline • Introduction

• System Design • Correct by Construction • Discussion

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The Evolution of Computer Science

Saddek Bensalem/ VERIMAG, University Joseph Fourier Grenoble, CNRS 3

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Systems vs Programs – The Hardest and the Most Important

Systems are hard to design due to unpredictable and subtle interactions with the

environment, emergent behaviors, and occasional catastrophic cascading failures rather than to complex data and algorithms

are increasingly important in modern computing systems: embedded systems, cyber-physical systems, mobile systems, web-services

Programs terminating deterministic platform-independent Theory

System non-terminating non-predictable platform-dependent No theory!

Significant differences

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What is needed?

5/19/2015 5

We need new methods for designing and verifying systems in which physical characteristics are determined (or influenced) computationally and the other way around.

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System Design – About Design

RECIPE (Program)

Put apples in pie plate; Sprinkle with cinnamon and 1 tablespoon sugar; In a bowl mix 1 cup sugar, flour and butter; Blend in unbeaten egg, pinch of salt and the nuts; Mix well and pour over apples; Bake at 350 degrees for 45 minutes

INGREDIENTS (Resources) 1 pie plate buttered 5or 6 apples, cut up ¾ c. butter, melted 1 c. flour ½ c. chopped nuts 1tsp cinnamon 1tbsp sugar 1c. Sugar 1 egg

Design is a universal concept, a par excellence intellectual activity

leading to artifacts meeting given requirements.

Easy Apple Pie

Proc

edur

aliz

atio

n

Mat

eria

lizat

ion

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System Design – Two Main Gaps R

equi

rem

ents

(d

ecla

rativ

e)

App

licat

ion

SW

(e

xecu

tabl

e)

Sys

tem

(H

W+S

W)

Correctness? Correctness?

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System Design – Correctness: Reminder

8

Trustworthiness requirements express assurance that the designed system can be trusted that it will perform as expected despite

HW failures Design Errors Environment Disturbances

Malevolent Actions

Optimization requirements dealing with optimization of functions subject to quantitative constraints on

1) Performance: how well the system does wrt user demands e.g. throughput, jitter, latency, quality.

2) Cost: how well resources are used wrt economic demands e.g. storage efficiency, processor utilizability, energy efficiency.

Usually they determine tradeoffs between performance and cost

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System Design – The V-model

The V-model of the Systems Engineering Process, Source: Wikipedia

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System Design – The V-model

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The V-model of the traditional Systems Engineering process 1. assumes that all the system requirements are initially known, can be

clearly formulated and understood. 2. assumes that system development is top-down from a set of

requirements. Nonetheless, systems are never designed from scratch; they are built by incrementally modifying existing systems and component reuse.

3. considers that global system requirements can be broken down into

requirements satisfied by system components. Furthermore, it implicitly assumes a compositionality principle: if components are proven correct with respect to their individual requirements, then correctness of the whole system can be inferred from correctness of its components.

4. relies mainly on correctness-by-checking (verification or testing)

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The Limits of Correctness-by-checking (1)

• Correctness: designed artifact meets its requirements specifications.

• Ideal for many designers: correctness by checking. • Usually impossible: verification method explodes

exponentially with the number of components in the artifact.

• The best we can do is limit automatic verification to small or medium size models and to specific properties.

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The Limits of Correctness-by-checking: Conclusion

• correctness-by-checking of trustworthiness: limited to requirements that can be formalized and checked efficiently.

• Application to optimization requirements: limited to the validation of scheduling and resource management policies on abstract system models (medium size systems).

• For optimization: a more natural approach for their satisfaction is by enforcing rather than by checking.

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• At the root of any mature engineering discipline. o scalable and do not suffer limitations of correctness-by-

checking. o Testing may be still necessary, but its role is to validate the

correct-by-construction process rather than to find bugs.

• Methodology to ensure correctness-by construction gradually by acting in two different directions:

o Horizontal correctness, within a design step, by providing rules for enforcing global properties of composite components while preserving essential properties of atomic components;

o Vertical Correctness, between design steps to guarantee that if some property is established at some step then it will be preserved at all subsequent steps.

Correct-by-Construction Approaches

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Build a component C satisfying a given property P, from • C0 a set of atomic components modeling behavior • GL ={gl1, …, gli, …} a set of glue operators on components

c1 c’1

gl1 c2 c’2

gl12 sat P gl2

Glue operators • model mechanisms used for communication and control such as protocols, controllers, buses. • restrict the behavior of their arguments, that is gl(C1 ,C2 ,.., Cn)| A1 refines C1

Horizontal Correctness: Property Enforcement

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Horizontal Correctness (1)

Components

Architecture for Mutual Exclusion

Rule1: Property Enforcement

Architecture for Mutual Exclusion

satisfies Mutex

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Horizontal Correctness: Property Composability

Make the new without breaking the old: Rules guaranteeing non interference of solutions

gl

gl

Property stability phenomena are poorly understood. We need composability results e.g. feature interaction in middleware, composability of scheduling algorithms, theory for reconfigurable systems

X sat P

gl c1 cn

and sat P’ gl’ c1 cn

implies sat P∧P’ gl ⊕ gl’ c1 cn

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Horizontal Correctness: Composability

Mutual Exclusion

Rule2: Property Composability

Scheduling Policy

Mutual Exclusion & Scheduling Policy

Feature interaction in telecommunication systems, interference among web services and interference in aspect programming are all manifestations of a lack of composability

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Correct-by-Construction – Architectures

Deadlock-free components

Deadlock-free Routing Protocol

Rule1: Property Preservation

Deadlock-free composite component

Deadlock-free Routing Protocol

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Vertical Correctness: Preservation refinement

≥ Rendezvous

Protocol (Asynch Message Passing)

The Refinement Relation ≥

S1 S2

S1 ≥ S2 (S2 refines S1) if all traces of S2 are traces of S1(modulo some observation criterion) if S1 is deadlock-free then S2 is deadlock-free too ≥ is preserved by

C1 C2 C4 C’1 C3 C’2 C’3 C’4

Question: Propose adequate refinement relations

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gl Protocol

C’1 C’2

Rendezvous

C1 C2

gl Rendezvous

C1 C2

Vertical Correctness: Preservation of ≥ substitution

Protocol

C’1 C’2

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Putting Correctness-by-Construction into Practice: The BIP Design Flow

Application Software Model

Distributed Software Model

Distributed System Model

Instrumented System Model

Application Software Application Software (Programming Models)

(Many-Core) Platform Model

Mapping

D-Finder compositional

verification

SMC-BIP statistical

model-checking

Functional Code

Glue Code

BIP

BIP

BIP

BIP

Runtime

HW Platform

integration of platform and mapping constraints

translation

decentralization + integration of communication protocols

calibration w.r.t. execution times

code generation

correctness checking

performance evaluation

transformation correct-by-construction

transformation correct-by-construction

transformation correct-by-construction

e.g. manycore STHORM/STMicroelectronics MPPA/Kalray

e.g. KPN models

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GenoM - BIP Toolchain

BIP

Codels

+

D-Finder

BIP Models

BIP Controller

BIP Controller

BIP Controller

GenoM Models

+

module Motion { number: 9600; SDI: MOTION_DATA; } request SetPos { type: control; input: pos::pos; control: controlPos; report: BAD_PARAM; } task Move { period: 25; priority: 15; }

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• Thanks for your attention.

Questions?

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