cordic_for vsp ntuee

25
1 VLSI Signal Processing 台台台台台台台 CORDIC (Coordinate rotation digital computer) For VLSI Signal Processing Course Ref: Y. H. Hu, “CORDIC based VLSI arch itecture for digital signal processing,” IEEE Signal Processing Mag., pp.16-35, July 19 92. 2001/4/30

Upload: anandiacr

Post on 28-Nov-2015

76 views

Category:

Documents


2 download

DESCRIPTION

VHSIC Signal Processing PPT

TRANSCRIPT

Page 1: Cordic_for Vsp Ntuee

1

VLSI Signal Processing

台大電機吳安宇

CORDIC(Coordinate rotation digital computer)

For VLSI Signal Processing Course

Ref: Y. H. Hu, “CORDIC based VLSI architecture for digital signal processing,” IEEE Signal Processing Mag., pp.16-35, July 1992.

2001/4/30

Page 2: Cordic_for Vsp Ntuee

2

VLSI Signal Processing

台大電機吳安宇

Rotation Operation

)(

)(.

cossin

sincos

'

'

iy

ix

y

x

You need: 4 multipliers.

2 adders.

or ROM for Table Look-up

Page 3: Cordic_for Vsp Ntuee

3

VLSI Signal Processing

台大電機吳安宇

•What is “CORDIC” ?–COordinate Rotation DIgital Computer

•Why do we use “CORDIC” ?–MAC dominates the implementational cost in some DSP functions.–The DSP approach, CORDIC, helps to save the hardware cost.

Page 4: Cordic_for Vsp Ntuee

4

VLSI Signal Processing

台大電機吳安宇

Basic Concept of The CORDIC

•To decompose the desired rotation angle (θ)

into the weighted sum of a set of predefined

elementary rotation angles (am(i))

•Such that the rotation through each of them

can be accomplished with simple shift-and-

add operation.

Page 5: Cordic_for Vsp Ntuee

5

VLSI Signal Processing

台大電機吳安宇

Behavior of CORDIC

V(0)

V(1)V(3)

122 yx

Page 6: Cordic_for Vsp Ntuee

6

VLSI Signal Processing

台大電機吳安宇

)(

)(.

cossin

sincos

)1(

)1(

iy

ix

aa

aa

iy

ix

mm

mm

In General Case:

)(

)(.

1

1

)1(

)1(

22

iy

ixi

i

iy

ix

i

i

In CORDIC Algorithm:

)(

)(

1tan

tan1cos

)1(

)1(

iy

ix

a

aa

iy

ix

m

mm

Page 7: Cordic_for Vsp Ntuee

7

VLSI Signal Processing

台大電機吳安宇

CORDIC Algorithm

(i)ami

1-n

0

1-n

0

ii

i

)2(tana 1m

i

2atan )(1m

i

).........2(tan)2(tan)2(tan 211101

.........43211

Page 8: Cordic_for Vsp Ntuee

8

VLSI Signal Processing

台大電機吳安宇

Initiation:Given x(0),y(0),z(0)

For i=0 to n-1 ,Do

/*CORDIC iteration equation */

/*Angle updating equation*/

(i)a- miz(i)1)z(i

/*Scaling Operation (required for m=±1 only)*/

End i loop

)(

)(

)(

1

ny

nx

nKy

x

mf

f

)(

)(.

1

1

)1(

)1(

22

iy

ixi

i

iy

ix

i

i

m

n

i

m

anK

cos

1)( 1

0

Page 9: Cordic_for Vsp Ntuee

9

VLSI Signal Processing

台大電機吳安宇

X(i) Y(i)

X-Reg Y-Reg

+/- +/-

Barrel shifter

Barrel shifter

X(i+1) Y(i+1)

a(n-1)

a(1)

a(0) Z-reg

i

Z(i+1)

Basic processor for

CORDIC

Page 10: Cordic_for Vsp Ntuee

10

VLSI Signal Processing

台大電機吳安宇

Modes of Operations• Vector rotation mode (θ is given) :

determined by the set of

)(i

z(n)-z(n)-z(0)1

0

im

n

i

a

The objective is to compute the final vector (Usually, we set z(0)= θ.)

θ

= sign of z(i)

Page 11: Cordic_for Vsp Ntuee

11

VLSI Signal Processing

台大電機吳安宇

Modes of Operations (cont’d)• Angle accumulation mode (θ is

not given)

The objective is to rotate the given initial vector back to x-axis ,and the angle can be accrued.(Now, we let z(0)=0.)

= - sign of x(i)·y(i)θ

V(0)

V(1)

X-axis

Page 12: Cordic_for Vsp Ntuee

12

VLSI Signal Processing

台大電機吳安宇

Scaling Operation

bqp

Q

qq

iq

m

P

p

ip

m

n

i

imsim

kk

knK

Type

knK

Type

mK

q

p

2;1;1

)21()(

1:2.

2)(

1:1.

21

1

1

1

0

),(22

Page 13: Cordic_for Vsp Ntuee

13

VLSI Signal Processing

台大電機吳安宇

X(n) Y(n)

X(n) Y(n)

+/- +/-

Barrel shifter

Barrel shifter

X-Reg Y-Reg

)('2)(')1('

)('2)(')1('

:2

)(2)(')1('

)(2)(')1('

:1

nyiyiy

nxixix

Type

nyiyiy

nxixix

Type

q

q

p

p

i

i

i

i

ff y x

Scaling Stage

Page 14: Cordic_for Vsp Ntuee

14

VLSI Signal Processing

台大電機吳安宇

Advantages and disadvantagesSimple Shift-and-add Operation.(2 adders+2 shifters v.s. 4 mul.+2 adder)

-It needs n iterations to obtain n-bit precision.

-Slow carry-propagate addition.

-Low throughput rate

-Area consuming shifting operations.

Page 15: Cordic_for Vsp Ntuee

15

VLSI Signal Processing

台大電機吳安宇

How to improve CORDIC ?• Use Pipelined Architecture

• Improve the Performance of the Adders (redundant arithmetic, CSA)

• Reduce Iteration Number

– High radix CORDIC. (e.g., Radix-4, Radix-8)

– Find a optimized shift sequence (e.g., AR-CORDIC)

• Improve the Scaling Operation

– Canonical multiplier recoding

– Force Km to 2.

P

p

ip

m

pknK 1

2)(

1

1pk

Page 16: Cordic_for Vsp Ntuee

16

VLSI Signal Processing

台大電機吳安宇

Parallel and Pipelined Arrays

Basic

CORDIC

Processor1

Basic

CORDIC

Processor2

Basic

CORDIC

Processor n+s

x(0)

y(0) f

f

y

x

Basic

CORDIC

Processor

1

Basic

CORDIC

Processor

2

Basic

CORDIC

Processor

n+s

L

A

T

C

H

L

A

T

C

H

L

A

T

C

H

f

f

y

x

)0(

)0(

1

1

sn

sn

y

x

)1(snv )1(2 snv )(1 snv )2(1snv)0(1snv

Page 17: Cordic_for Vsp Ntuee

17

VLSI Signal Processing

台大電機吳安宇

)(

)(.

cossin

sincos

)1(

)1(

iy

ix

aa

aa

iy

ix

mm

mm

In General Case:

)(

)(.

1),(

),(1

)1(

)1(

22

iy

ixims

imsm

iy

ix

i

i

In CORDIC Algorithm:

)(

)(

1tan

tan1cos

)1(

)1(

iy

ix

a

aa

iy

ix

m

mm

Page 18: Cordic_for Vsp Ntuee

18

VLSI Signal Processing

台大電機吳安宇

Generalized CORDIC Algorithm

(i)ami

1-n

0

i

]2

[tanm

1a ),(1m imsm

12tanh1 2tan

0

),1(1

),1(1

)1,0(2

mmm

is

is

s

m0 , linear system ;

m=1 , circular system ;

m=-1 , hyperbolic system.

Page 19: Cordic_for Vsp Ntuee

19

VLSI Signal Processing

台大電機吳安宇

Circular

Linear

V(2)

V(4)

V(0)

V(1)V(3)

122 yx

V(0)

V(2)

V(1)

V(3)

Hyperbolic

V(0)

V(1)

V(2)

V(3)

Different coordinates

Page 20: Cordic_for Vsp Ntuee

20

VLSI Signal Processing

台大電機吳安宇

Initiation: Given x(0),y(0),z(0)

For i=0 to n-1 ,Do

/*CORDIC iteration equation */

/*Angle updating equation*/

(i)a- miz(i)1)z(i

/*Scaling Operation (required for m=±1 only)*/

End i loop

)(

)(

)(

1

ny

nx

nKy

x

mf

f

)(

)(.

1),(

),(1

)1(

)1(

22

iy

ixims

imsm

iy

ix

i

i

Page 21: Cordic_for Vsp Ntuee

21

VLSI Signal Processing

台大電機吳安宇

Shift Sequence{s(m,i); 0in-1}

)1(

- )(1

0)(

na

a

m

im

n

ii

Determine the convergence of the CORDIC iteration, as well as the magnitude of the scaling factor Km(n).

m=0 or 1 , s=(m,i)=i

m=-1 , s(-1,i)=1,2,3,4,4,5,….,12,13,14,14,..

An angle approximation error:

Page 22: Cordic_for Vsp Ntuee

22

VLSI Signal Processing

台大電機吳安宇

Application to DSP Algorithms

• Linear transformation:- DFT, Chirp-Z transform, DHT, and FFT.

• Digital filters:- Orthogonal digital filters, and adaptive lattice filters.

• Matrix based digital signal processing algorithms:- QR factorization, with applications to Kalman filtering - Linear system solvers, such as Toeplitz and covariance system solvers,……,etc.

Page 23: Cordic_for Vsp Ntuee

23

VLSI Signal Processing

台大電機吳安宇

FFT application

Nnkje 2

Nnkjebaa 2'

-1

'a

'b

a

b

Nnkjebab 2'

Page 24: Cordic_for Vsp Ntuee

24

VLSI Signal Processing

台大電機吳安宇

Butterfly unit

+

+

-

-

CORDIC processor

Ra

Ia

Rb

Ib

Ra'

Ia'

Rb'

Ib'

Nnkje 2

Page 25: Cordic_for Vsp Ntuee

25

VLSI Signal Processing

台大電機吳安宇

Conclusions1. In some cases, CORDIC evaluates rotational

functions more efficiently than MAC units.

2. CORDIC saves more hardware cost.

3. By the regularity, the CORDIC based architecture is very suitable for implementation with pipelined VLSI array processors.

4. The utility of the CORDIC based architecture lies in its generality and flexibility.