cordic_for vsp ntuee
DESCRIPTION
VHSIC Signal Processing PPTTRANSCRIPT
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VLSI Signal Processing
台大電機吳安宇
CORDIC(Coordinate rotation digital computer)
For VLSI Signal Processing Course
Ref: Y. H. Hu, “CORDIC based VLSI architecture for digital signal processing,” IEEE Signal Processing Mag., pp.16-35, July 1992.
2001/4/30
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VLSI Signal Processing
台大電機吳安宇
Rotation Operation
)(
)(.
cossin
sincos
'
'
iy
ix
y
x
You need: 4 multipliers.
2 adders.
or ROM for Table Look-up
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VLSI Signal Processing
台大電機吳安宇
•What is “CORDIC” ?–COordinate Rotation DIgital Computer
•Why do we use “CORDIC” ?–MAC dominates the implementational cost in some DSP functions.–The DSP approach, CORDIC, helps to save the hardware cost.
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VLSI Signal Processing
台大電機吳安宇
Basic Concept of The CORDIC
•To decompose the desired rotation angle (θ)
into the weighted sum of a set of predefined
elementary rotation angles (am(i))
•Such that the rotation through each of them
can be accomplished with simple shift-and-
add operation.
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VLSI Signal Processing
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Behavior of CORDIC
V(0)
V(1)V(3)
122 yx
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VLSI Signal Processing
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)(
)(.
cossin
sincos
)1(
)1(
iy
ix
aa
aa
iy
ix
mm
mm
In General Case:
)(
)(.
1
1
)1(
)1(
22
iy
ixi
i
iy
ix
i
i
In CORDIC Algorithm:
)(
)(
1tan
tan1cos
)1(
)1(
iy
ix
a
aa
iy
ix
m
mm
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VLSI Signal Processing
台大電機吳安宇
CORDIC Algorithm
(i)ami
1-n
0
1-n
0
ii
i
)2(tana 1m
i
2atan )(1m
i
).........2(tan)2(tan)2(tan 211101
.........43211
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VLSI Signal Processing
台大電機吳安宇
Initiation:Given x(0),y(0),z(0)
For i=0 to n-1 ,Do
/*CORDIC iteration equation */
/*Angle updating equation*/
(i)a- miz(i)1)z(i
/*Scaling Operation (required for m=±1 only)*/
End i loop
)(
)(
)(
1
ny
nx
nKy
x
mf
f
)(
)(.
1
1
)1(
)1(
22
iy
ixi
i
iy
ix
i
i
m
n
i
m
anK
cos
1)( 1
0
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VLSI Signal Processing
台大電機吳安宇
X(i) Y(i)
X-Reg Y-Reg
+/- +/-
Barrel shifter
Barrel shifter
X(i+1) Y(i+1)
a(n-1)
a(1)
a(0) Z-reg
i
Z(i+1)
Basic processor for
CORDIC
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VLSI Signal Processing
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Modes of Operations• Vector rotation mode (θ is given) :
determined by the set of
)(i
z(n)-z(n)-z(0)1
0
im
n
i
a
The objective is to compute the final vector (Usually, we set z(0)= θ.)
θ
= sign of z(i)
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VLSI Signal Processing
台大電機吳安宇
Modes of Operations (cont’d)• Angle accumulation mode (θ is
not given)
The objective is to rotate the given initial vector back to x-axis ,and the angle can be accrued.(Now, we let z(0)=0.)
= - sign of x(i)·y(i)θ
V(0)
V(1)
X-axis
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VLSI Signal Processing
台大電機吳安宇
Scaling Operation
bqp
Q
iq
m
P
p
ip
m
n
i
imsim
kk
knK
Type
knK
Type
mK
q
p
2;1;1
)21()(
1:2.
2)(
1:1.
21
1
1
1
0
),(22
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VLSI Signal Processing
台大電機吳安宇
X(n) Y(n)
X(n) Y(n)
+/- +/-
Barrel shifter
Barrel shifter
X-Reg Y-Reg
)('2)(')1('
)('2)(')1('
:2
)(2)(')1('
)(2)(')1('
:1
nyiyiy
nxixix
Type
nyiyiy
nxixix
Type
q
q
p
p
i
i
i
i
ff y x
Scaling Stage
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Advantages and disadvantagesSimple Shift-and-add Operation.(2 adders+2 shifters v.s. 4 mul.+2 adder)
-It needs n iterations to obtain n-bit precision.
-Slow carry-propagate addition.
-Low throughput rate
-Area consuming shifting operations.
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How to improve CORDIC ?• Use Pipelined Architecture
• Improve the Performance of the Adders (redundant arithmetic, CSA)
• Reduce Iteration Number
– High radix CORDIC. (e.g., Radix-4, Radix-8)
– Find a optimized shift sequence (e.g., AR-CORDIC)
• Improve the Scaling Operation
– Canonical multiplier recoding
– Force Km to 2.
P
p
ip
m
pknK 1
2)(
1
1pk
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VLSI Signal Processing
台大電機吳安宇
Parallel and Pipelined Arrays
Basic
CORDIC
Processor1
Basic
CORDIC
Processor2
Basic
CORDIC
Processor n+s
x(0)
y(0) f
f
y
x
Basic
CORDIC
Processor
1
Basic
CORDIC
Processor
2
Basic
CORDIC
Processor
n+s
L
A
T
C
H
L
A
T
C
H
L
A
T
C
H
f
f
y
x
)0(
)0(
1
1
sn
sn
y
x
)1(snv )1(2 snv )(1 snv )2(1snv)0(1snv
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VLSI Signal Processing
台大電機吳安宇
)(
)(.
cossin
sincos
)1(
)1(
iy
ix
aa
aa
iy
ix
mm
mm
In General Case:
)(
)(.
1),(
),(1
)1(
)1(
22
iy
ixims
imsm
iy
ix
i
i
In CORDIC Algorithm:
)(
)(
1tan
tan1cos
)1(
)1(
iy
ix
a
aa
iy
ix
m
mm
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VLSI Signal Processing
台大電機吳安宇
Generalized CORDIC Algorithm
(i)ami
1-n
0
i
]2
[tanm
1a ),(1m imsm
12tanh1 2tan
0
),1(1
),1(1
)1,0(2
mmm
is
is
s
m0 , linear system ;
m=1 , circular system ;
m=-1 , hyperbolic system.
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VLSI Signal Processing
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Circular
Linear
V(2)
V(4)
V(0)
V(1)V(3)
122 yx
V(0)
V(2)
V(1)
V(3)
Hyperbolic
V(0)
V(1)
V(2)
V(3)
Different coordinates
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VLSI Signal Processing
台大電機吳安宇
Initiation: Given x(0),y(0),z(0)
For i=0 to n-1 ,Do
/*CORDIC iteration equation */
/*Angle updating equation*/
(i)a- miz(i)1)z(i
/*Scaling Operation (required for m=±1 only)*/
End i loop
)(
)(
)(
1
ny
nx
nKy
x
mf
f
)(
)(.
1),(
),(1
)1(
)1(
22
iy
ixims
imsm
iy
ix
i
i
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VLSI Signal Processing
台大電機吳安宇
Shift Sequence{s(m,i); 0in-1}
)1(
- )(1
0)(
na
a
m
im
n
ii
Determine the convergence of the CORDIC iteration, as well as the magnitude of the scaling factor Km(n).
m=0 or 1 , s=(m,i)=i
m=-1 , s(-1,i)=1,2,3,4,4,5,….,12,13,14,14,..
An angle approximation error:
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VLSI Signal Processing
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Application to DSP Algorithms
• Linear transformation:- DFT, Chirp-Z transform, DHT, and FFT.
• Digital filters:- Orthogonal digital filters, and adaptive lattice filters.
• Matrix based digital signal processing algorithms:- QR factorization, with applications to Kalman filtering - Linear system solvers, such as Toeplitz and covariance system solvers,……,etc.
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VLSI Signal Processing
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FFT application
Nnkje 2
Nnkjebaa 2'
-1
'a
'b
a
b
Nnkjebab 2'
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VLSI Signal Processing
台大電機吳安宇
Butterfly unit
+
+
-
-
CORDIC processor
Ra
Ia
Rb
Ib
Ra'
Ia'
Rb'
Ib'
Nnkje 2
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VLSI Signal Processing
台大電機吳安宇
Conclusions1. In some cases, CORDIC evaluates rotational
functions more efficiently than MAC units.
2. CORDIC saves more hardware cost.
3. By the regularity, the CORDIC based architecture is very suitable for implementation with pipelined VLSI array processors.
4. The utility of the CORDIC based architecture lies in its generality and flexibility.