control of bifurcation and chaos in a class of digital tanlock loops with modified loop structure
TRANSCRIPT
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International Journal of Bifurcation and Chaos, Vol. 24, No. 4 (2014) 1430014 (10 pages)c© World Scientific Publishing CompanyDOI: 10.1142/S0218127414300146
Control of Bifurcation and Chaos in a Class of DigitalTanlock Loops with Modified Loop Structure
Bishnu Charan SarkarDepartment of Physics, The University of Burdwan,
Burdwan-713104, West Bengal, Indiabcsarkar [email protected]
Saumendra Sankar De SarkarDepartment of Physics, Raniganj Girls’ College,
Searsole Rajbari-713358, West Bengal, [email protected]
Tanmoy BanerjeeDepartment of Physics, The University of Burdwan,
Burdwan-713104, West Bengal, [email protected]
Received July 22, 2013; Revised November 1, 2013
A detailed parametric space study of the nonlinear behavior of a kind of Digital Tanlock Loops(DTL) incorporating a modified loop structure using a time delayed feedback technique hasbeen studied in this paper. The analytical study reveals that the modified loop shows betterperformance compared to a conventional DTL (CDTL). The superiority of the modified DTL(MDTL) has been established by a numerical simulation study. Two parameter bifurcationdiagrams, supported by Lyapunov exponent spectrums, have been used to give a detailed ideaabout the nonlinear dynamics of the loop for a wide parameter range. The MDTL shows largefrequency acquisition range (FAR) and faster convergence time (CT) than a CDTL for suitablychosen values of the design parameter. An estimate for the optimum value of the structureparameter for quick convergence has also been presented in the present study.
Keywords : Digital Tanlock loop; time delay feedback; frequency acquisition range; convergencetime; Lyapunov exponent.
1. Introduction
Digital Phase Locked Loops (DPLLs), employing atechnique of synchronizing the signal from a Digi-tally Controlled Oscillator (DCO) with a referencesignal, have found extensive applications in moderncoherent communication systems [Zoltowski, 2001].DPLLs gained popularity as many problems asso-ciated with Analog Phase Locked Loops (APLLs),like sensitivity to dc drifts and component satu-rations, difficulties encountered in building higher
order loops, the need for initial calibration andperiodic adjustments, etc. can be alleviated usingDPLLs [Lindsey & Chie, 1981]. Studies on thenonlinear dynamical behavior of different kind ofDPLLs, e.g. ZC1-DPLLs [Bernstein et al., 1989;Viera et al., 1994; Leonov & Seledzhi, 2005; Baner-jee & Sarkar, 2012], ZC2-DPLLs [Banerjee &Sarkar, 2009], uniform sampling DPLLs [Zoltowski,2001], bang-bang DPLL [Dalt, 2005], gear-shiftingDPLL [Chen et al., 2012] are available in the
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literature. Among different varieties of DPLLs,nonuniform sampling positive going zero crossingDPLLs (ZC1-DPLLs) have been proved to be themost important DPLL because they are the eas-iest to model and the simplest to implement. Assinusoidal phase detectors (PD) are used in theseDPLLs for phase detection techniques, they aresimply called sinusoidal DPLLs. Although a sinu-soidal DPLL has many advantages over other typesof DPLLs, it has some shortcomings like sensitivityof the gain to the variations in the input signalpower and a rather limited lock range. Significantadvantages over the sinusoidal DPLLs have beenobserved in the digital tanlock loop (DTL), pro-posed in [Lee & Un, 1982]. Although DTLs are ofnonuniform sampling and zero crossing type, phasedetection technique are distinct due to the presenceof a linear PD characteristic with modulo 2π-sense.The extended linear characteristics of the PD offersa wide locking range. This has made DTL an impor-tant alternative for ZC1-DPLL. Other importantfeatures of a DTL are larger frequency acquisi-tion range (FAR), smaller steady state phase error(for first order loop) and faster transient response[Hagiwara & Nakagawa, 1987; Sarkar et al., 1992]compared to a conventional DPLL (CDPLL) havingsine type PD.
DTLs having different PD structures can befound in the literature [Sarkar et al., 1992; Hussainet al., 2001; Al-Qutayri et al., 2006; Al-Ali et al.,2012]. Unlike a sine-type ZC1-DPLL, a DTL is com-posed of two samplers. The PD in the DTL modelsin [Hussain et al., 2001; Al-Qutayri et al., 2006; Al-Ali et al., 2012] gives an output which is a function(inverse tangent) of the ratio of the output of twosamplers. Sarkar et al. [1992] used a different typeof PD structure in order to avoid the singularity,which may arise in the previously mentioned PDmodels while finding the ratio of the sampler out-puts. In this model there is an additional structureparameter which gives the weightage of the sampleroutputs entering the PD. The presence of the extradesign parameter in this PD may also be used tocontrol different dynamics of a DTL.
In the present paper, we have studied thedetailed parameter space characteristics of the non-linear dynamics of that particular type of DTL usedby Sarkar et al. with time delay feedback controltechnique. Sarkar and Chattopadhyay proposed thetechnique to achieve quicker convergence to steadystate in a DPLL [Sarkar & Chattopadhyay, 1988].
Later, Pyragas introduced this idea for chaoscontrol in practical applications [Pyragas, 1992].Recently, a detailed parametric study of nonlineardynamical behavior of a time-delay digital tanlockloop (TDTL) has been reported in [Banerjee et al.,2013]. The main difference between the work ofBanerjee et al. and the present work lies, as men-tioned earlier, in the structure of the tanlock PD.A constant π/2 phase shifter has been used in thepresent model instead of a constant time delay unit[Hussain et al., 2001] used by Banerjee et al. In addi-tion, the tanlock type nonlinearity is achieved byprocessing the output of the samplers prior to enter-ing the PD to avoid the singularity of the transfercharacteristics which may arise when the instanta-neous phase error becomes equal to π/2 in the pre-vious model.
From a DPLL designer’s point of view, thechoice of different loop design parameters is of fun-damental importance. For practical applications,wide FAR and small convergence time (CT) aretwo desired features for an optimum DTL. Butrequirments of large FAR and small CT cannotbe achieved simultaneously for a given set of sys-tem design parameters, as increasing the FAR willalso result in increase in the CT. Again, the loopcan have a large acquisition range when the loopgain parameter has a large value. But the gain can-not be increased indefinitely, as the system will bethrown to a chaotic regime beyond a limited valueof the gain parameter. The objective of this studyis to show that the proposed structure modificationextends the upper limit of the loop gain parameterfor a stable operation. Thus incoming signal fre-quency range for the stable operation of the loopis also extended, resulting in a large FAR of themodified DTL (MDTL) than that of a conventionalDTL (CDTL). In addition, the CT of the MDTLcan also be improved for a suitable choice of systemdesign parameters.
The paper is organized as follows. Section 2describes the structure and the system equationof the modified system using time delay feedbackmethod. Stability analysis of the system is includedin Sec. 3. Description of the numerical simulationstudies using two parameter bifurcation diagramssupported by the corresponding Lyapunov expo-nent spectrums has been presented in this sec-tion. Section 4 examines the optimum condition forwhich the system will have quicker convergence. Anexpression for the suitably chosen parameter to be
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Control of Bifurcation and Chaos in a Class of DTL with Modified Loop Structure
used for the modification for obtaining optimumsystem response, found analytically, is also includedhere. Finally the conclusion of the work has beensummarized in Sec. 5.
2. Structure and System Equationof a Modified Digital TanlockLoop (MDTL)
Figure 1(a) shows the block diagram of a first orderDTL incorporating a Tanlock type PD, a Loop Dig-ital Filter (LDF) and a DCO. The block diagramof the Tanlock PD incorporating a derivative con-trol in one arm of the PD circuit is also shownin Fig. 1(b). The PD detects the phase error ateach sampling instant. To detect the phase errorat a sampling instant, Sampler-1 takes a sampleI(k) from the incoming signal and at the same timeSampler-2 takes a sample Q(k) from the 90◦ phaseshifted version of the incoming signal. The samplesare then processed by two squarers, one adder andone square root processor to give the estimate of thesignal amplitude. A difference signal generated from
two consecutive sampled values I(k) and I(k − 1)of the in-phase arm is added to the output fromSampler-1 at each instant k with a proper gain (P )to give the resultant sample Ic(k) = I(k)+P{I(k)−I(k−1)}. Here P is an additional design parameter.Ic(k) and Q(k) samples are amplified by two ampli-fiers of gains
√1 − x2
0 and x0 respectively, where x0
is a design parameter of magnitude less than 1. ThePD output is then obtained as
f(k) =
√1 − x2
0Ic(k)1 + x0Qk
. (1)
Clearly, for x0 = 0, the Tanlock PD is converted toa sin-type PD. In addition, for P = 0, the systembecomes a CDPLL.
Let us now consider the input signal as
s(t) = A0 sin(ω0t + θi(t)) (2)
where
θi(t) = (ωi − ω0)t + θ0. (3)
Here A0, ωi and θ0 are the amplitude, frequencyand the phase of the input signal, respectively, and
(a)
(b)
Fig. 1. (a) Block diagram of a first order Digital Tanlock Loop and (b) block diagram of the Phase Detector of a ModifiedDigital Tanlock Loop.
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ω0 is the nominal frequency of the DCO. For sim-plicity, we take θ0 = 0. The sampling instants (SIs)are determined by the positive edge of the loopDCO output and the sampling is done in each cycleof the input signal. The outputs of the Sampler-1and Sampler-2 at kth SI t(k) can be written as
I(k) = A0 sin(ω0t(k) + θi(k)) (4a)
Q(k) = A0 cos(ω0t(k) + θi(k)). (4b)
The period of the DCO is controlled accordingto the algorithm
T (k + 1) = T0 − Y (k) (5)
where T0 = 2πω0
is the nominal period of the DCO.T (k + 1) is defined as the time elapsed between kthand (k + 1)th SI, i.e.
T (k + 1) = t(k + 1) − t(k). (6)
The DCO control signal Y (k) is given as
Y (k) = G0f(k) (7)
where G0 is the gain of the LDF.Now, assuming the signal amplitude limited to
unity and considering t(0) = 0, we can write
I(k) = sin φ(k) (8a)
Q(k) = cos φ(k) (8b)
where φ(k) is the loop phase error defined as,
φ(k) = θi(k) − ω0
k−1∑i=0
Y (i). (9)
Hence, the output of the Tanlock PD can beexpressed as
f{φ(k), φ(k − 1)}
=
√1 − x2
0[(1 + P ) sin φ(k) − P sin φ(k − 1)]1 + x0 cos φ(k)
.
(10)
Finally, we get the system equation of theMDTL as
φ(k + 1) = φ(k) + Λ0
− ξK0f{φ(k), φ(k − 1)} (11)
where Λ0 = 2π(ξ − 1) and K0 = ω0G0 is the loopgain. For P = 0, i.e. in the absence of the modifica-tion, Eq. (11) will be reduced to the phase governingequation for a CDTL.
3. Stability of MDTL
3.1. Analytical bifurcation analysis
To find the condition for convergence of the MDTL,the second order difference equation (11) is decom-posed into two first order difference equation bydefining a new state variable X(k + 1) = G[X(k)].Here X = (α β)T with α(k) = φ(k − 1) andβ(k) = φ(k). Now, Eq. (11) can be written as
(α(k + 1)
β(k + 1)
)=
β(k)
β(k) + Λ0 − ξK0
√1 − x2
0
1 + x0 cos β(k){(1 + P ) sin β(k) − P sin α(k)}
. (12)
This gives the Jacobian of transformation J(X) as follows
J(X) =
(J1 J2
J3 J4
)(13)
where
J1 = 0 (14a)
J2 = 1 (14b)
J3 = ξK0
√1 − x2
0P cos α(k)1 + x0 cos β(k)
(14c)
J4 = 1 − ξK0
√1 − x2
0
(1 + P ) cos β(k){1 + x0 cos β(k)} + x0 sin β(k){(1 + P ) sin β(k) − P sin α(k)}{1 + x0 cos β(k)}2
.
(14d)
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Control of Bifurcation and Chaos in a Class of DTL with Modified Loop Structure
By determining the eigenvalues of J(X) at thefixed points, i.e. the steady state phase errors (φss)and using Ostrowski’s theorem (1980) one can getthe stability condition of the system.
(1) For a phase step input (ξ = 1), φss = 0. So thecondition for locked state can be found as
0 < K0 <2
(1 + 2P )X, |K0PX | < 1 (15)
where X =√
(1 − x0)/(1 + x0). It is obviousthat the bifurcation of the steady state phaseerror can be controlled by suitably chosen valueof P .
(2) To determine the steady state phase error for afrequency step input (ξ �= 1), we consider theJury stability criteria. According to this, theconditions for stable loop operations are
1 − Tr(J) + Det(J) > 0 (16a)
1 + Tr(J) + Det(J) > 0 (16b)
Det(J) < 1 (16c)
where Tr(J) = J1 + J4 and Det(J) = J1J4 −J2J3.
Using Eqs. (14a)–(14d) we now get thefollowing stability conditions from Eqs. (16a)–(16c), respectively, as
ξK0
√1 − x2
0(x0 + cos φss)(1 + x0 cos φss)2
> 0 (17a)
ξK0
√1 − x2
0
(1 + x0 cos φss)2{(x0 + cos φss)
+ 2P cos φss(1 + x0 cos φss)} < 2
(17b)∣∣∣∣∣−ξK0
√1 − x2
0P cos φss
1 + x0 cos φss
∣∣∣∣∣ < 1. (17c)
The steady state phase error (φss) can be foundfrom the following relation, obtained from Eq. (11),in terms of the loop design parameters, as
ξK0
√1 − x2
0 sin φss
1 + x0 cos φss= Λ0. (18)
Equations (17a)–(17c) give the stability con-dition of the MDTL for a frequency step input(ξ �= 1). If one puts ξ = 1 and φss = 0, these condi-tions will be reduced to the stability condition (15),for a phase step input (ξ = 1).
3.2. Numerical simulation results
The system response has been studied throughextensive numerical simulation of the phase govern-ing Eq. (11). At first we consider a phase step input(ξ = 1) with x0 = 0.6. Figure 2 shows the bifurca-tion diagrams of the steady state phase error (φ(k))with the loop gain parameter K0 for a CDTL inFig. 2(a) and a MDTL in Fig. 2(b) with P = −0.2.The CDTL remains in steady phase locked state upto K0 = 4, while for the MDTL bifurcation occursat K0 = 6.6. This is in complete agreement withEq. (15).
To have a complete idea of the dynamicalbehavior of a MDTL (with P = −0.25) we drawa 2D-bifurcation diagram in the (K0 − ξ) space.For each set of parameter values, the time series
(a)
(b)
Fig. 2. Steady state phase error versus loop gain for (a) aCDTL and (b) a MDTL.
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(a)
(b)
Fig. 3. Two parameter bifurcation diagram in the K0 − ξspace; (a) for a CDTL and (b) for a MDTL (P = −0.25).The black region indicates steady phase locked states. Whiteregion indicates chaotic or higher periodic states.
of φ(k) has been analyzed and the nature of thefixed points has been detected. Different color cod-ings in the bifurcation diagrams correspond to dif-ferent fixed points. Color code-1, 2, . . . , 16 indicateperiod-1, period-2, . . . , period-16 states, respec-tively and color code 0 has been used to indicatehigher order or chaotic states. It is obvious fromFig. 3 that the MDTL remains stable for larger loopgain parameters than a CDTL for a particular ξ. Itis well known that a large K0 value gives wide FAR.Figure 4 shows the effect of the modification on theFAR of a DTL graphically. Red and blue dots havebeen used to mark the FAR of CDTL and MDTL(P = −0.25), respectively. It is seen that the modi-fication enhances the upper limit of the FAR of theMDTL when the value of K0 increases beyond 2,
Fig. 4. Comparison of the Frequency Aquisition Range ofa CDTL (P = 0) (red dots) and a MDTL (P = −0.25)(blue dots).
but the lower side remains almost the same. ForK0 < 2 both the upper and lower limits of the FARremain almost unaltered.
For a quantitative measure of the systemdynamics we have computed the Lyapunov Expo-nent (LE) of the system following [Sprott, 2003].Maximum LE (MLE) of a two-dimensional systemis given by
λ = limn→∞
12N
N−1∑n=0
ln(J1 + J2Y
′n)2 + (J3 + J4Y
′n)2
1 + Y ′2n
(19)
where J1, J4 are the diagonal elements and J2,J3 are the off-diagonal elements of the Jacobian
Fig. 5. Maximum Lyapunov Exponent spectrum of theMDTL (x0 = 0.6, P = −0.25) in (K0 − ξ) space. The grayregion corresponds to negative LE indicating stable region.The bluish zone indicates the chaotic region.
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Control of Bifurcation and Chaos in a Class of DTL with Modified Loop Structure
(a)
(b)
Fig. 6. (a) Two parameter bifurcation diagram of MDTL(ξ = 1.1, x0 = 0.6) in K0–P space. Black zone indicates sta-ble zone and white zone corresponds to the chaotic regionand (b) corresponding MLE spectrum; gray zone indicatesstable region and bluish zone corresponds to chaotic region.
matrix J(X). Y ′ is the tangent to the direction ofmaximum growth which evolves according to
Y ′n+1 =
J3 + J4Y′n
J1 + J2Y ′n
. (20)
The MLE spectrum corresponding to Fig. 3(b) hasbeen shown in Fig. 5. The bluish region correspondsto positive MLE indicating that the correspondingparameter values will yield chaotic outputs. Thedeep blue region (more positive LE) gives the setof parameter values for which the system becomesmore chaotic than those corresponding to the lightblue region (less positive LE). Similarly, some region
of the diagram is darker gray than the other indicat-ing more negative LE, i.e. most stable states for thecorresponding parameter values. Since the higherperiodic orbits have also been assigned by colorcode “0” [a part of the white zone in Fig. 3(b)],the corresponding region of Fig. 5 shows light grayshade (corresponding to MLE having negative val-ues but nearly equal to “0”), indicating that thecorresponding parameter zone produces higher peri-odic orbits and is in the vicinity of the chaoticzone. We have also studied the 2D-bifurcation dia-grams in the K0–P and K0–x0 space to examine theeffect of variation of more than one system designparameter simultaneously. In practice, we generallydeal with input signals whose frequency does not
(a)
(b)
Fig. 7. Two parameter bifurcation diagram (ξ = 1.1) inK0–x0 space; (a) a CDTL (P = 0) and (b) a MDTL(P = −0.25). Black zone corresponds to stable region whilethe white zone represents the out of lock state.
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exactly match with the DCO nominal frequency. Sowhile exploring the nonlinear dynamics of MDTLusing 2D-bifurcation diagrams we have consideredthe frequency step input (ξ �= 1) only.
Figure 6(a) represents the two parameter bifur-cation diagram for ξ = 1.1 in the K0–P space (withx0 = 0.6). It is obvious from the figure that thebifurcation of the steady state phase error occurs atlarger K0 values for |P | < 0.25. For P = −0.25 theMDTL remains stable up to K0 = 7.07 whereas theCDTL (i.e. P = 0) remains stable up to K0 = 3.57,which is much lower than that of a MDTL. For aquantitative analysis of the bifurcation diagram wedraw the two parameter MLE spectrum [Fig. 6(b)].The gray zone indicates the parameter range inwhich the system remains stable. The chaotic regionis represented by the blue zone. This is in completeagreement with Fig. 6(a). To show the effect of P onthe system (with ξ = 1.1) for the variation of thestructure parameters x0 and K0 we plot the twoparameter bifurcation diagram in the K0–x0 space.
It is noted from Fig. 7 that with the introductionof the time delayed feedback the parameter range(black zone) for stability (period-1 state) of the sys-tem has been increased.
4. Convergence Time: OptimumValue of P
So far, we have seen that we can extend the largestvalue of K0 in the stable phase locked zone. As aconsequence of it the convergence time of the sys-tem will be increased. So it is necessary to find anoptimum value of P for which the system will havethe fastest convergence. Following [Callier & Des-oer, 1991], we can find the optimum value of Pby making the spectral radius of J minimum. Thismakes the discriminant of Eq. (13) equal to zero,i.e.
J24 + 4J3 = 0. (21)
Thus we get the optimum value of P as
P = −[1 + x0 cos φss −
√ξK0
√1 − x2
0{(1 + x0 cos φss) cos φss + x0 sin φ2ss}]2
ξK0
√1 − x2
0(1 + x0 cos φss) cos φss
. (22)
For an illustrative example, we choose ξ = 1.1,K0 = 4 and x0 = 0.6. It is difficult to find anexact expression for the steady state phase error φss
from Eq. (18) in terms of the system parameters. Toavoid any mathematical complexity, we evaluate φss
easily by a graphical method. Equation (18) can berewritten as
ξK0
√1 − x2
0 sin φss = Λ0(1 + x0 cos φss). (23)
The Left Hand Side (LHS) and the Right HandSide (RHS) of Eq. (23) have been evaluated numeri-cally for all values of φss ranging from −π to π witha stepsize of 0.00001 rad and plotted in a graph(Fig. 8). The point at which the two curves for theLHS and RHS of Eq. (23) intersect gives the valueof the required φss.
For the particular choice of system parametersφss comes to be nearly equal to 0.2852 rad. Usingthis value of φss in Eq. (22), we get a rough estimateof P (≈ −0.11). Figure 9 shows the real time varia-tion of φ(k) for the optimum and two nonoptimumvalues of P . It is clear that the system requires 36steps to converge to steady state with P = −0.08and 23 steps are required for P = −0.25, while for
P = −0.11, the system reaches the steady state in14 steps only. The variation of the optimum valuesof P for different K0 and ξ values, found numeri-cally, has been shown in Fig. 10. Again to have anidea on the effect of the modification, a two param-eter color diagram (Fig. 11) indicating the numberof iterations required to converge to a steady statefor a particular set of ξ and x0 has been drawn.
Fig. 8. Plot of LHS and RHS of Eq. (23) to find φss of aMDTL with ξ = 1.1, K0 = 4 and x0 = 0.6.
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(a)
(b)
(c)
Fig. 9. Real time variation of the phase error φ(k) with sam-pling instant k; (a) P = −0.08 (nonoptimum), (b) P = −0.11(optimum) and (c) P = −0.25 (nonoptimum).
Fig. 10. Plot of optimum value of P with loop gain K0 for(a) ξ = 0.9, (b) ξ = 1 and (c) ξ = 1.1.
Fig. 11. Number of iterations to reach the phase locked statein K0–P space.
The white region indicates out of lock states. Themore dark the region the less number of iterationsare required to converge to the steady state. Thusoptimum value of P for quicker convergence of aMDTL can be estimated from Eq. (22) as well asthe two parameter bifurcation diagram (Fig. 11) inK0–P space.
5. Conclusion
The effect of delayed feedback control on a class ofDTLs has been investigated through an extensiveparametric study. Using two parameter bifurca-tion diagrams it has been shown that the maxi-mum range of the system gain parameter K0 canbe increased by suitably chosen additional systemdesign parameter P . As a consequence of it, the sig-nal tracking capability of the loop is also increased.In other words, the FAR of the loop is extended.The MLE spectrum confirms the superiority ofthe proposed technique. Hence the bifurcation andchaos in DTLs can be controlled using the timedelay feedback control technique. In addition, forthe proper choice of design parameters the systemcan have faster convergence even with large gainvalues. It has also been confirmed by analytical andsimulation studies. Thus the proposed modificationoffers advantages for designing an optimum DTLsystem for communication applications.
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