computers of 2020 and 2030
DESCRIPTION
My new year thought experiment for computers in not so close futureTRANSCRIPT
COMPUTERS OF 2020 AND 2030
Tat IwamotoJanuary 2013
Saturday, January 19, 13
WHERE ARE WE NOW?
•Most popular computer of 2012, iPhone 5•No longer PC. Desktop and laptops are irrelevant.
Saturday, January 19, 13
IPHONE 5 SYSTEM
4Gb LPDDR2
4Gb LPDDR2
Modem
128Gbit NAND
Wifi/BT
Misc Peripherals
CPU
GPU
x21.3GHz
x3325MHz
Saturday, January 19, 13
DIE SIZE
• A6 (32nm) 100mm^2
• LPDDR2 (20nm) 100mm^2 x2
• Flash (20nm) 200mm^2
• = 400mm^2
• Just very rough estimate
Saturday, January 19, 13
MOORE’S LAW
• 2013 = 400mm^2
•Density increase
• 2020 = 16x
• 2030 = 1000x1
10
100
1,000
10,000
100,000
1,000,000
2010 2015 2020 2025 2030
Density converted to 2013 mm^2
Saturday, January 19, 13
SCALE THE SAME CONFIGURATION
• 2020
• 32 core ARM CPU
• 48 core GPU
• 16GB DRAM
• 256GB Flash
• 2030
• 2000 core ARM CPU
• 3000 core GPU
• 1TB DRAM
• 16TB Flash
Saturday, January 19, 13
LIMITERS (1)
• IO Speed
•Do not scale with density
• Assume scale with linear length
• 1.4x for 2x density
• 10Gbit/s limit for PCB
Saturday, January 19, 13
MEMORY IO BANDWIDTH
4Gb LPDDR2
4Gb LPDDR2
128Gbit NAND
1Gbit/s x64 bit=8GB/s
40Mbit/s x4 bit=20MB/s
CPU
GPU
x21.3GHz
x3325MHz
Saturday, January 19, 13
CPU
GPU
x32
x48
MEMORY IO BANDWIDTH 2020
64GB DRAM
256GB Flash
10Gbit/s x100 bit=128GB/s
640Mbit/s x4 bit=320MB/s
1Gbit/s x16 > 10Gbit/sMore pins needed to scale
Saturday, January 19, 13
MEMORY IO BANDWIDTH 2030
1TB DRAM
16TB Flash
10Gbit/s x800 bit=8TB/s
10Gbit/s x16 bit=20GB/s
800 pins is impossible
20Mbit/s x1000 >10Gbit/sMore pins needed to scale
CPU
GPU
x2000
x3000
Saturday, January 19, 13
LIMITERS (2)
• Process difference
• Logic
•DRAM
• Flash
• Use different process
Saturday, January 19, 13
LIMITERS (3)
• Power
•Need to keep battery time
• Frequency and power roughly scales with linear length
• 2x Density = 1.4x Speed, 0.7x Power
•Need to lower activity to keep heat at same level
Saturday, January 19, 13
LIMITERS (4)
• Chips can’t get smaller
• Pad limit
• Package pin limit
Saturday, January 19, 13
INTEGRATE DRAM DIES
• DRAM pins run out first
• Memory is cooler than logic
• Keep flash off chip
• 2x transistors = 1.4x logic + 0.7x additional area
• Use additional area for memory
• DRAM -> SRAM
• DRAM : SRAM 6:1 bit density
Saturday, January 19, 13
2020 RAM ON-CHIP
• 16x Density
•Die -> 7mm^2
• x 4 for same power= 28mm^2
• 72mm^2 for memory
• 1GB DRAM -> 12mm^2
•DRAM vs Logic density gap 2:1
•DRAM:SRAM = 1:6
• 1GB SRAM = 144mm^2
• 72mm^2 = 512MB SRAM
Saturday, January 19, 13
CPU
GPU
x8
x12
2020 SOC256GB Flash
640Mbit/s x4 bit=320MB/s
No external DRAMNo pinsNo IO power
512MBSRAM
CPU 1.3 x 4 = 5.2GHzGPU 325 x 4 = 1.3GHzEnough memory bandwidth
Saturday, January 19, 13
2030 ONE CHIP• 1000x Density
•Die -> 0.1mm^2
• x 32 for same power= 3mm^2
• 97mm^2 for memory
• Logic only 3%
•Not dominant area
• 1GB DRAM -> 0.2mm^2
• 16GB Flash -> 0.2mm^2
• 1 GB SRAM = 2.4mm^2
• 97mm^2 = 40GB
• Build chip on Flash process
• SRAM + Flash
•Maybe lower frequencySaturday, January 19, 13
CPU
GPU
x64
x96
2030 SOC
No external DRAM/FlashNo pinsNo IO power40GB
SRAMor Flash CPU 1.3 x 32 = 40GHz
GPU 325 x 32 = 10GHzConsider SRAM / Flash mix
Saturday, January 19, 13
TWEAKS
• Use better CPU/GPU
• Less cores / more memory
• Smaller overall die?
Saturday, January 19, 13
MORE OPTIONS
• Integrate other IO peripherals
• Should be enough room for that, too
•OK as long as pin count is low
• Special IO may require lower density
Saturday, January 19, 13
OTHER DEVELOPMENTS
•Mixed process technology: logic + DRAM + Flash
• Package technology: more pins, more interconnect speed
• Interconnect technology: 10Gbit/s+
Saturday, January 19, 13