computer architecture & operations i instructor: hao ji
TRANSCRIPT
![Page 1: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/1.jpg)
COMPUTER ARCHITECTURE & OPERATIONS I
Instructor: Hao Ji
![Page 2: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/2.jpg)
Review This Class
Conditional Instructions Procedure Quiz 3
![Page 3: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/3.jpg)
Instructions for Making Decisions
High-level programming languageC/C++:
if … else … (conditional)
goto (unconditional)
for, while, until (loops) Assembly Languages
MIPS:
beq (branch if equal)
bne (branch if not equal)
j (unconditional jump)
![Page 4: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/4.jpg)
Conditional Operations Branch to a labeled instruction if a
condition is true Otherwise, continue sequentially
beq rs, rt, L1 if (rs == rt) branch to instruction labeled L1;
bne rs, rt, L1 if (rs != rt) branch to instruction labeled L1;
j L1 unconditional jump to instruction labeled L1
![Page 5: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/5.jpg)
Compiling If Statements C code:
if (i==j) f = g+h;else f = g-h;
![Page 6: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/6.jpg)
Compiling If Statements C code:
if (i==j) f = g+h;else f = g-h;
f ($s0), g ($s1), h($s2), i($s3), j($s4) Compiled MIPS code:
bne $s3, $s4, Else add $s0, $s1, $s2 j ExitElse: sub $s0, $s1, $s2Exit: …
Assembler calculates addresses
![Page 7: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/7.jpg)
Compiling Loop Statements C code:
while (save[i] == k) i = i+1; i in $s3, k in $s5, address of save in $s6
Flowchart?
![Page 8: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/8.jpg)
Compiling Loop Statements C code:
while (save[i] == k) i = i+1; i in $s3, k in $s5, address of save in $s6
Compiled MIPS code:
Loop: sll $t1, $s3, 2 add $t1, $t1, $s6 lw $t0, 0($t1) bne $t0, $s5, Exit addi $s3, $s3, 1 j LoopExit: …
![Page 9: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/9.jpg)
Basic Blocks A basic block is a sequence of instructions
with No embedded branches (except at end) No branch targets (except at beginning)
A compiler identifies basic blocks for optimization
An advanced processor can accelerate execution
of basic blocks
![Page 10: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/10.jpg)
More Conditional Operations Less than Greater than Combination of logical operations
![Page 11: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/11.jpg)
More Conditional Operations Set result to 1 if a condition is true
Otherwise, set to 0 slt rd, rs, rt
if (rs < rt) rd = 1; else rd = 0; slti rt, rs, constant
if (rs < constant) rt = 1; else rt = 0; Use in combination with beq, bne
slt $t0, $s1, $s2 # if ($s1 < $s2)bne $t0, $zero, L # branch to L
![Page 12: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/12.jpg)
Exercise Convert the following C++ statement into
MIPS
if (i>j && i<k) {
a++;
}
Assume i in $s0, j in $s1, k in $s2, a in $s3
![Page 13: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/13.jpg)
Exerciseif (i>j && i<k) {
a++;
}
Assume i in $s0, j in $s1, k in $s2, a in $s3
slt $t0, $s1, $s0
slt $t1, $s0, $s2
and $t0, $t0, $t1
beq $t0, $zero, L
addi $s3, $s3, 1
L: …
![Page 14: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/14.jpg)
Better Solutionif (i>j && i<k) {
a++;
}
Assume i in $s0, j in $s1, k in $s2, a in $s3
slt $t0, $s1, $s0
beq $t0, $zero, L
slt $t0, $s0, $s2
beq $t0, $zero, L
addi $s3, $s3, 1
L: …
![Page 15: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/15.jpg)
Branch Instruction Design Why not blt, bge, etc? Hardware for <, ≥, … slower than =, ≠
Combining with branch involves more work per instruction, requiring a slower clock
All instructions penalized! beq and bne are the common case This is a good design compromise
![Page 16: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/16.jpg)
Signed vs. Unsigned Signed comparison: slt, slti Unsigned comparison: sltu, sltui Example
$s0 = 1111 1111 1111 1111 1111 1111 1111 1111 $s1 = 0000 0000 0000 0000 0000 0000 0000 0001 slt $t0, $s0, $s1 # signed
–1 < +1 $t0 = 1 sltu $t0, $s0, $s1 # unsigned
+4,294,967,295 > +1 $t0 = 0
![Page 17: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/17.jpg)
Branch Addressing Branch instructions specify
Opcode, two registers, target address
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
![Page 18: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/18.jpg)
Branch Addressing Branch instructions specify
Opcode, two registers, target address
Addresses of the program have to fit in the 16-bit field. Directly using branch address
Problem: Is far too small to be a realistic.
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
![Page 19: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/19.jpg)
Branch Addressing Branch instructions specify
Opcode, two registers, target address
Addresses of the program have to fit in the 16-bit field. Directly using branch address
Problem: Is far too small to be a realistic. Solution: use a register and branch address
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
![Page 20: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/20.jpg)
Program Counter (PC)
![Page 21: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/21.jpg)
PC-relative addressing In PC-relative addressing
Because it is convenient for the hardware to increment the PC early to point to the next instruction, (which will be discussed in Chapter 4)
The MIPS address is actually relative to the address of the following instruction (PC+4) instead of the current instruction (PC)
![Page 22: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/22.jpg)
Branch Addressing Branch instructions specify
Opcode, two registers, target address Most branch targets are near branch
Forward or backward
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
PC-relative addressing Target address = PC + offset × 4
PC already incremented by 4 by this time
![Page 23: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/23.jpg)
Jump Addressing Branch instructions
target are near branch
Jump instructions Invoke procedure that may not be near the call With long addresses in the format Use other forms of addressing
![Page 24: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/24.jpg)
Jump Addressing Jump (j and jal) targets could be anywhere in text segment
Encode full address in instruction
(Pseudo)Direct jump addressing Target address = PC31…28 : (address × 4)
op address
6 bits 26 bits
![Page 25: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/25.jpg)
Jump Addressing Jump (j and jal) targets could be anywhere in text segment
Encode full address in instruction
(Pseudo)Direct jump addressing Target address = PC31…28 : (address × 4)
op address
6 bits 26 bits
Replaces only the lower 28 bits of the PC, leaving the upper 4 bits of the PC unchanged.
![Page 26: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/26.jpg)
Target Addressing Example Loop code from earlier example
Assume Loop starting at location 80000 in memory.
Loop: sll $t1, $s3, 2 80000 0 0 19 9 2 0
add $t1, $t1, $s6 80004 0 9 22 9 0 32
lw $t0, 0($t1) 80008 35 9 8 0
bne $t0, $s5, Exit 80012 5 8 21 2
addi $s3, $s3, 1 80016 8 19 19 1
j Loop 80020 2 20000
Exit: … 80024
![Page 27: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/27.jpg)
Branching Far Away If branch target is too far to encode with
16-bit offset, assembler rewrites the code Example
beq $s0,$s1, L1↓
bne $s0,$s1, L2j L1
L2: …
Replace the short-address condition branch
![Page 28: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/28.jpg)
Addressing Mode Summary
![Page 29: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/29.jpg)
Time for a Break
(10 mins)
![Page 30: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/30.jpg)
Review Last Session
Procedure Call Steps of procedure call caller and callee
Branch Addressing
This Session Leaf procedure
Next Session Non-leaf procedure Quiz
![Page 31: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/31.jpg)
Procedure Procedure (function)
A stored subroutine that performs a specific task based on the parameters with which it is provided
Important when writing a large program Make code easier to understand Allow code to be reused Allow a programmer to focus on a specific task
![Page 32: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/32.jpg)
Procedure Parameters of procedure
Act as an interface between the procedure and the rest of the program and data
Pass values Return results
![Page 33: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/33.jpg)
Procedure Calling The exaction of a procedure, the program
requires the following steps:1. Place parameters in registers
2. Transfer control to procedure
3. Acquire storage for procedure
4. Perform procedure’s operations
5. Place result in register for caller
6. Return to place of call
![Page 34: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/34.jpg)
Caller and Callee Caller
The program that instigates a procedure and provides the necessary parameter values
Callee A procedure that executes a series of stored
instructions based on parameters provided by the caller and then returns control to the caller
![Page 35: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/35.jpg)
Register Usage Registers are the fastest place to hold data in
computer, $a0 – $a3: arguments (reg’s 4 – 7) $v0, $v1: result values (reg’s 2 and 3) $t0 – $t9: temporaries
Can be overwritten by callee $s0 – $s7: saved
Must be saved/restored by callee $gp: global pointer for static data (reg 28) $sp: stack pointer (reg 29) $fp: frame pointer (reg 30) $ra: return address (reg 31)
![Page 36: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/36.jpg)
Procedure Call Instructions Procedure call: jump and linkjal ProcedureLabel Address of following instruction put in $ra Jumps to target address
Procedure return: jump registerjr $ra Jump to the address specified in the register $ra
( Copies $ra to program counter )
![Page 37: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/37.jpg)
Using More Registers Four arguments and two return value
registers: $a0 – $a3: arguments (reg’s 4 – 7) $v0, $v1: result values (reg’s 2 and 3)
If compiler needs more registers, Spill registers The process of putting less commonly used
variables (or those needed later) into memory.
![Page 38: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/38.jpg)
Using More Registers Stack
A last-in-first-out queue for spilling registers Stack pointer
$sp (register 29) Point to the address of the most recent element in
the stack Push
Add element onto the stack Pop
Remove element from the stack
![Page 39: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/39.jpg)
Stack Stack
By historical precedent, stack “grows” from higher addresses to lower addresses.
Push Add element onto the stack By subtracting from the stack pointer addi $sp, $sp, -12
Pop Remove element from the stack By adding to the stack pointer addi $sp, $sp, 12
![Page 40: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/40.jpg)
Leaf Procedure and non-Leaf Procedure
Leaf Procedure Procedures that do not call other procedures
Non-leaf Procedure Procedures that call other procedures
![Page 41: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/41.jpg)
Leaf Procedure Example C code:int leaf_example (int g, int h, int i, int j){ int f; f = (g + h) - (i + j); return f;} Arguments g, …, j in $a0, …, $a3 f in $s0 (hence, need to save $s0 on stack) Result in $v0
![Page 42: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/42.jpg)
Leaf Procedure Example MIPS code: (leaf example)
addi $sp, $sp, -12
sw $t1, 8($sp)
sw $t0, 4($sp) sw $s0, 0($sp)
add $t0, $a0, $a1 add $t1, $a2, $a3 sub $s0, $t0, $t1
add $v0, $s0, $zero
lw $s0, 0($sp)
lw $t0, 4($sp)
lw $t1, 8($sp)
addi $sp, $sp, 12
jr $ra
Save $s0, $t1, $t0 on stack
Procedure body
Restore $s0, $t1, $t0 from the stack
Result
Return
![Page 43: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/43.jpg)
Status of Stack
![Page 44: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/44.jpg)
Temporary Registers MIPS Assumption$t0 – $t9: temporary registers that are not
preserved by the callee on a procedure call
$s0 – $s7: saved registersMust be preserved by callee on a procedure callIf used, the callees saves and restores them
![Page 45: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/45.jpg)
Simplified Leaf Procedure Example MIPS code: (leaf example)
addi $sp, $sp, -4 sw $s0, 0($sp)
add $t0, $a0, $a1 add $t1, $a2, $a3 sub $s0, $t0, $t1
add $v0, $s0, $zero
lw $s0, 0($sp)addi $sp, $sp, 4
jr $ra
Save $s0 on stack
Procedure body
Restore $s0 from the stack
Result
Return
![Page 46: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/46.jpg)
Time for a Break
(10 mins)
![Page 47: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/47.jpg)
Review Last Session
Registers used Stack jal and jr leaf and no-leaf procedure Allocating space for new data on the heap
This Session Non-leaf Procedure Quiz
![Page 48: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/48.jpg)
Non-Leaf Procedures Procedures that call other procedures For nested call, caller needs to save on the
stack: Its return address Any arguments and temporaries needed after
the call Restore from the stack after the call
![Page 49: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/49.jpg)
Non-Leaf Procedure Example C code:int fact (int n){ if (n < 1) return 1; else return n * fact(n - 1);} Argument n in $a0 Result in $v0
![Page 50: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/50.jpg)
Non-Leaf Procedure Example MIPS code:
fact: addi $sp, $sp, -8 # adjust stack for 2 items sw $ra, 4($sp) # save return address sw $a0, 0($sp) # save argument slti $t0, $a0, 1 # test for n < 1 beq $t0, $zero, L1 addi $v0, $zero, 1 # if so, result is 1 addi $sp, $sp, 8 # pop 2 items from stack jr $ra # and returnL1: addi $a0, $a0, -1 # else decrement n = n - 1 jal fact # recursive call lw $a0, 0($sp) # restore original n lw $ra, 4($sp) # and return address addi $sp, $sp, 8 # pop 2 items from stack mul $v0, $a0, $v0 # multiply to get result jr $ra # and return
![Page 51: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/51.jpg)
What is preserved and what is not?
Data and registers preserved and not preserved across a procedure call
![Page 52: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/52.jpg)
Procedure Frame Revisiting Stack
Stack not only stores the saved registers but also local variables that do not fit in
registers local arrays or structures
Procedure Frame (activation record) Segment of the stack containing a procedure’s
saved registers and local variables Frame pointer $fp
Point to the location of the saved registers and local variables for a given procedure
![Page 53: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/53.jpg)
Local Data on the Stack
The frame pointer points to the location where the stack pointer was.
Procedure frame (activation record) Used by some compilers to manage stack storage
![Page 54: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/54.jpg)
Global Pointer Two kinds of C/C++ variables
automatic Local to a procedure Discarded when the procedure exits
static Global to a procedure Still exist after procedure exits Can be revisited
Global Pointer $gp Point to static area
![Page 55: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/55.jpg)
MIPS Memory Layout 32-bit address space
0x80000000 ~ 0xFFFFFFFF Not available for user program For OS and ROM
0x10000000~0x7FFFFFFF Data
Stack Dynamic
Malloc() in C, New in java Static
Static variables Constants
0x00400000~0x0FFFFFFF Text: Machine language of the user program
0x00000000~0x003FFFFF Reserved
![Page 56: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/56.jpg)
Memory Layout
![Page 57: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/57.jpg)
Memory Layout
Stack and Heap grow toward each other
![Page 58: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/58.jpg)
Register Summary Register 1: $at
reserved for the assembler Register 26-27: $k0-$k1
reserved for the OS
![Page 59: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/59.jpg)
Summary Conditional Instructions Procedure Call Next Class Characters Starting a Program Linking
![Page 60: COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji](https://reader036.vdocuments.site/reader036/viewer/2022062314/56649d765503460f94a57e6e/html5/thumbnails/60.jpg)
What I want you to do Review Chapter 2 Work on your assignment 3