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Computer Architecture I (1DT016) Cary Laxer, Ph.D. Visiting Lecturer

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Computer Architecture I (1DT016)

Cary Laxer, Ph.D.Visiting Lecturer

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Friday, September 28, 2007 Computer Architecture I - Class 1 2

Today’s classIntroductionsComputer organization overviewIntroduction to assembly language programming

Introductions

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Friday, September 28, 2007 Computer Architecture I - Class 1 4

InstructorCary LaxerVisiting lecturerHome institution is Rose-Hulman Institute of Technology, Terre Haute, Indiana, USAProfessor and Head of Computer Science and Software EngineeringBachelor’s degree in computer science and mathematics from New York UniversityPh.D. in biomedical engineering from Duke University

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Friday, September 28, 2007 Computer Architecture I - Class 1 5

CourseInformation is maintained on the course website: www.it.uu.se/edu/course/homepage/dark/ht07Three weekend meetings

Friday and Saturday each timeLecture and lab time both days

TextsStructured Computer Organization (Fifth Edition) by Andrew S. TanenbaumIntroduction to RISC Assembly Language Programming by John Waldron

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Friday, September 28, 2007 Computer Architecture I - Class 1 6

Introduce yourselvesTell us:

Your nameYour hometownYour computer backgroundSomething interesting about yourself

Computer organization overview

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Friday, September 28, 2007 Computer Architecture I - Class 1 8

Programs and languagesProgram – a sequence of instructions to perform a certain taskHigh level language – English-like programming languages such as C++, Java, etc.Machine language – computer’s primitive instruction set (e.g. add two numbers, compare a number to 0)Assembly language – mnemonics for machine language instructions

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Friday, September 28, 2007 Computer Architecture I - Class 1 9

Languages, Levels, Virtual Machines

A multilevel machine

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Friday, September 28, 2007 Computer Architecture I - Class 1 10

Contemporary Multilevel Machines

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Friday, September 28, 2007 Computer Architecture I - Class 1 11

Milestones in Computer Architecture (1)

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Friday, September 28, 2007 Computer Architecture I - Class 1 12

Milestones in Computer Architecture (2)

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Friday, September 28, 2007 Computer Architecture I - Class 1 13

Computer GenerationsZeroth GenerationMechanical Computers (1642 – 1945)First GenerationVacuum Tubes (1945 – 1955)Second GenerationTransistors (1955 – 1965)Third GenerationIntegrated Circuits (1965 – 1980)Fourth GenerationVery Large Scale Integration (1980 – ?)

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Friday, September 28, 2007 Computer Architecture I - Class 1 14

Von Neumann Machine

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Friday, September 28, 2007 Computer Architecture I - Class 1 15

PDP-8 Innovation – Single Bus

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Friday, September 28, 2007 Computer Architecture I - Class 1 16

IBM 360

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Friday, September 28, 2007 Computer Architecture I - Class 1 17

The Computer Spectrum

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Friday, September 28, 2007 Computer Architecture I - Class 1 18

Personal Computer

1. Pentium 4 socket2. 875P Support chip3. Memory sockets4. AGP connector5. Disk interface6. Gigabit Ethernet7. Five PCI slots8. USB 2.0 ports9. Cooling technology10. BIOS

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Friday, September 28, 2007 Computer Architecture I - Class 1 19

Intel Computer Family

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Friday, September 28, 2007 Computer Architecture I - Class 1 20

The Pentium 4 Chip

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Friday, September 28, 2007 Computer Architecture I - Class 1 21

Metric Units

The principal metric prefixes.

Introduction to Assembly Language

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Friday, September 28, 2007 Computer Architecture I - Class 1 23

Number systemsDecimal (base 10)Binary (base 2)Hexadecimal (base 16)

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Friday, September 28, 2007 Computer Architecture I - Class 1 24

Two’s complement numbersRepresent negative integers to the computerTo determine the two’s complement of an integer:

Invert all the bits (make zeroes ones and ones zeroes)Add 1

Example: 29 = 0001 1101Invert all the bits: 1110 0010Add 1: 1110 0011 (this is -29)

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Friday, September 28, 2007 Computer Architecture I - Class 1 25

Integer storage and capacities

Bit – 0 or 1 (one binary digit)Nibble – 4 bits, 0-15 (one hex digit)Byte – 8 bits, 2 hex digits, 0-255 or -128 to +127Word – 4 bytes, 32 bits, 8 hex digits

0 to 232-1 or 0 to 4,294,967,295 unsigned-(231) to 231-1 or -2,147,483,648 to +2,147,483,647 signed

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Friday, September 28, 2007 Computer Architecture I - Class 1 26

CharactersASCII (American Standard Code for Information Interchange)EBCDIC (Extended Binary-Coded Decimal Interchange Code)Unicode

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Friday, September 28, 2007 Computer Architecture I - Class 1 27

In-class exerciseWrite the number 30010 in:

BinaryHex

Write the number -7810 in:Eight-bit two’s complement binary notation32-bit two’s complement hexadecimal notation

Using one byte to store integers, what happens when you add:

255 + 1 using unsigned numbers127 + 1 using signed numbers

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Friday, September 28, 2007 Computer Architecture I - Class 1 28

The MIPS ProcessorMIPS = Microprocessor without Interlocked Pipeline StagesIt is a RISC (reduced instruction set computer) architectureCurrently used in many embedded systems, such as TiVO, Windows CE devices, Nintendo 64, and Sony Playstation 2

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Friday, September 28, 2007 Computer Architecture I - Class 1 29

MIPS Memory OrganizationMemory is byte-addressable

0x00000000 0x00

0x00000001 0xA0

0x00000002 0x3E

0x00000003 0x10

0xFFFFFFFC 0x90

0xFFFFFFFD 0x6F

0xFFFFFFFE 0xA1

0xFFFFFFFF 0x00

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Addresses of memory cells

Each cell holds one byte

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Friday, September 28, 2007 Computer Architecture I - Class 1 30

MIPS Memory LayoutA program’s address space is composed of three parts:

At the bottom of the user address space (0x00400000) is the text segment, which holds the program’s instructionsStarting at address 0x10000000 is the data segmentThe program stack resides at the top of the address space (0x7FFFFFFF) and grows down

Stack segment

Reserved

Text segment

Data segment

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0x7FFFFFFF

0x00400000

0x10000000

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Friday, September 28, 2007 Computer Architecture I - Class 1 31

MIPS RegistersProgram counter (PC) – holds address of next instruction to be executed32 general purpose registers, numbered 0-31

Register n is designated by $n or RnRegister zero, $0, always contains the hardwired value 0There are conventions governing their use (see Table 3.1 on page 20 of Waldron)

16 floating point registers $f0…$f15 to hold floating point numbers

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Friday, September 28, 2007 Computer Architecture I - Class 1 32

SPIM SimulatorRuns programs for the MIPS assembly language on other platformsFree versions available online (I got a Windows version at http://pages.cs.wisc.edu/~larus/spim.html)

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Friday, September 28, 2007 Computer Architecture I - Class 1 33

SPIM I/O10 operating system-like services through the syscall instructionLoad the system call code (see Table 3.2 on page 22 of Waldron) into register $v0 ($2)Load the arguments into registers $a0…$a3($4…$7) (or $f12 for floating point values)Return values are placed in register $v0 (or $f0 for floating point results)

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Friday, September 28, 2007 Computer Architecture I - Class 1 34

Hello World.text.globl __start

__start: # execution starts herela $a0,str # put string address into a0li $v0,4 # system call to printsyscall # out a string

li $v0,10syscall # au revoir...

.datastr: .asciiz "hello world\n"

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Friday, September 28, 2007 Computer Architecture I - Class 1 35

DemonstrationDemo of PCSpim using the Hello World program